/Linux-v6.1/arch/mips/jazz/ |
D | Kconfig | 9 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at 10 <http://www.linux-mips.org/>. 13 bool "Support for MIPS Magnum 4000" 20 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at 21 <http://www.linux-mips.org/>. 30 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at 31 <http://www.linux-mips.org/>.
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/Linux-v6.1/arch/mips/ |
D | Makefile | 15 $(Q)$(MAKE) $(build)=arch/mips/tools elf-entry 17 $(Q)$(MAKE) $(build)=arch/mips/tools loongson3-llsc-check 19 $(Q)$(MAKE) $(build)=arch/mips/boot/tools relocs 35 32bit-tool-archpref = mips 45 UTS_MACHINE := mips 93 # The DECStation requires an ECOFF kernel for remote booting, other MIPS 127 # stack space, else a SEGV is generated. This is not desirable for MIPS 138 # binutils from v2.35 when built with --enable-mips-fix-loongson3-llsc=yes, 203 # Warning: the 64-bit MIPS architecture does not support the `smartmips' extension 206 mips-cflags := $(cflags-y) [all …]
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D | Kconfig | 2 config MIPS config 136 bool "Generic board-agnostic MIPS kernel" 390 This enables support for DEC's MIPS based workstations. For details 391 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 429 This a family of machines based on the MIPS R4030 chipset which was 431 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 472 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 526 bool "MIPS Malta board" 580 This enables support for the MIPS Technologies Malta evaluation 588 Microchip PIC32 is a family of general-purpose 32 bit MIPS core [all …]
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/Linux-v6.1/arch/mips/crypto/ |
D | Kconfig | 3 menu "Accelerated Cryptographic Algorithms for CPU (mips)" 12 Architecture: mips 16 depends on MIPS 21 Architecture: mips 31 Architecture: mips OCTEON using crypto instructions, when available 41 Architecture: mips OCTEON 51 Architecture: mips OCTEON using crypto instructions, when available 61 Architecture: mips OCTEON using crypto instructions, when available
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D | Makefile | 3 # Makefile for MIPS crypto files.. 6 obj-$(CONFIG_CRYPTO_CRC32_MIPS) += crc32-mips.o 8 obj-$(CONFIG_CRYPTO_CHACHA_MIPS) += chacha-mips.o 9 chacha-mips-y := chacha-core.o chacha-glue.o 12 obj-$(CONFIG_CRYPTO_POLY1305_MIPS) += poly1305-mips.o 13 poly1305-mips-y := poly1305-core.o poly1305-glue.o 21 $(obj)/poly1305-core.S: $(src)/poly1305-mips.pl FORCE
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D | chacha-glue.c | 3 * MIPS accelerated ChaCha and XChaCha stream ciphers, 83 .base.cra_driver_name = "chacha20-mips", 98 .base.cra_driver_name = "xchacha20-mips", 113 .base.cra_driver_name = "xchacha12-mips", 144 MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (MIPS accelerated)"); 148 MODULE_ALIAS_CRYPTO("chacha20-mips"); 150 MODULE_ALIAS_CRYPTO("xchacha20-mips"); 152 MODULE_ALIAS_CRYPTO("xchacha12-mips");
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/Linux-v6.1/scripts/package/ |
D | buildtar | 103 mips) 104 if [ -f "${objtree}/arch/mips/boot/compressed/vmlinux.bin" ]; then 105 …cp -v -- "${objtree}/arch/mips/boot/compressed/vmlinux.bin" "${tmpdir}/boot/vmlinuz-${KERNELRELEAS… 106 elif [ -f "${objtree}/arch/mips/boot/compressed/vmlinux.ecoff" ]; then 107 …cp -v -- "${objtree}/arch/mips/boot/compressed/vmlinux.ecoff" "${tmpdir}/boot/vmlinuz-${KERNELRELE… 108 elif [ -f "${objtree}/arch/mips/boot/compressed/vmlinux.srec" ]; then 109 …cp -v -- "${objtree}/arch/mips/boot/compressed/vmlinux.srec" "${tmpdir}/boot/vmlinuz-${KERNELRELEA… 114 elif [ -f "${objtree}/arch/mips/boot/vmlinux.bin" ]; then 115 cp -v -- "${objtree}/arch/mips/boot/vmlinux.bin" "${tmpdir}/boot/vmlinux-${KERNELRELEASE}" 116 elif [ -f "${objtree}/arch/mips/boot/vmlinux.ecoff" ]; then [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/bus/ |
D | mti,mips-cdmm.yaml | 4 $id: http://devicetree.org/schemas/bus/mti,mips-cdmm.yaml# 7 title: MIPS Common Device Memory Map 10 Defines a location of the MIPS Common Device Memory Map registers. 17 const: mti,mips-cdmm 22 used to map the MIPS CDMM registers block. 34 compatible = "mti,mips-cdmm";
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/Linux-v6.1/Documentation/devicetree/bindings/power/ |
D | mti,mips-cpc.yaml | 4 $id: http://devicetree.org/schemas/power/mti,mips-cpc.yaml# 7 title: MIPS Cluster Power Controller 10 Defines a location of the MIPS Cluster Power Controller registers. 17 const: mti,mips-cpc 22 used to map the MIPS CPC registers block. 34 compatible = "mti,mips-cpc";
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/Linux-v6.1/arch/mips/ralink/ |
D | Platform | 4 cflags-$(CONFIG_RALINK) += -I$(srctree)/arch/mips/include/asm/mach-ralink 10 cflags-$(CONFIG_SOC_RT288X) += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt288x 16 cflags-$(CONFIG_SOC_RT305X) += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt305x 22 cflags-$(CONFIG_SOC_RT3883) += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt3883 28 cflags-$(CONFIG_SOC_MT7620) += -I$(srctree)/arch/mips/include/asm/mach-ralink/mt7620 33 cflags-$(CONFIG_SOC_MT7621) += -I$(srctree)/arch/mips/include/asm/mach-ralink/mt7621
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/Linux-v6.1/arch/mips/kernel/ |
D | vmlinux.lds.S | 20 #undef mips 21 #define mips mips macro 22 OUTPUT_ARCH(mips) 123 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) { 125 KEEP(*(.mips.machines.init)) 211 /* This is the MIPS specific mdebug section. */ 234 *(.MIPS.abiflags) 235 *(.MIPS.options)
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/Linux-v6.1/arch/mips/include/asm/ |
D | isa-rev.h | 3 * Copyright (C) 2018 MIPS Tech, LLC 4 * Author: Matt Redfearn <matt.redfearn@mips.com> 11 * The ISA revision level. This is 0 for MIPS I to V and N for 12 * MIPS{32,64}rN. 19 /* The compiler hasn't defined the isa rev so assume it's MIPS I - V (0) */
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/Linux-v6.1/include/linux/bcma/ |
D | bcma_driver_mips.h | 6 /* which sbflags get routed to mips interrupt 1 */ 9 /* which sbflags get routed to mips interrupt 2 */ 12 /* which sbflags get routed to mips interrupt 3 */ 15 /* which sbflags get routed to mips interrupt 4 */ 19 /* MIPS 74K core registers */
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/Linux-v6.1/arch/mips/pci/ |
D | pci-malta.c | 3 * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. 5 * Authors: Carsten Langgaard <carstenl@mips.com> 6 * Maciej W. Rozycki <macro@mips.com> 8 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 10 * MIPS boards specific PCI support. 18 #include <asm/mips-cps.h> 19 #include <asm/mips-boards/generic.h> 20 #include <asm/mips-boards/bonito64.h> 21 #include <asm/mips-boards/msc01_pci.h> 89 * fixed in a later revision of YAMON (the MIPS boards in mips_pcibios_init()
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D | ops-msc.c | 3 * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. 5 * Authors: Carsten Langgaard <carstenl@mips.com> 6 * Maciej W. Rozycki <macro@mips.com> 7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) 9 * MIPS boards specific PCI support. 15 #include <asm/mips-boards/msc01_pci.h>
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/Linux-v6.1/drivers/ssb/ |
D | Kconfig | 35 depends on SSB && (PCI = y || PCI = SSB) && (PCI_DRIVERS_LEGACY || !MIPS) 119 bool "SSB Broadcom MIPS core driver" 120 depends on SSB && MIPS 125 Broadcom MIPS core. 134 # Assumption: We are on embedded, if we compile the MIPS core. 151 depends on SSB_PCIHOST_POSSIBLE && SSB_EMBEDDED && MIPS
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/Linux-v6.1/sound/mips/ |
D | Kconfig | 2 # ALSA MIPS drivers 5 bool "MIPS sound devices" 6 depends on MIPS 9 Support for sound devices of MIPS architectures.
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/Linux-v6.1/drivers/irqchip/ |
D | irq-mips-cpu.c | 7 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved. 8 * Author: Maciej W. Rozycki <macro@mips.com> 10 * This file define the irq handler for MIPS CPU interrupts. 14 * Almost all MIPS CPUs define 8 interrupt sources. They are typically 53 .name = "MIPS", 113 .name = "MIPS", 247 panic("Failed to add MIPS CPU IPI domain"); in mips_cpu_register_ipi_domain() 267 panic("Failed to add irqdomain for MIPS CPU"); in __mips_cpu_irq_init() 271 * for CPUs which implement the MIPS MT (multi-threading) ASE. in __mips_cpu_irq_init()
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/Linux-v6.1/arch/mips/include/asm/mips-boards/ |
D | generic.h | 6 * Defines of the MIPS boards specific address-MAP, registers, etc. 8 * Copyright (C) 2000,2012 MIPS Technologies, Inc. 10 * Authors: Carsten Langgaard <carstenl@mips.com> 11 * Steven J. Hill <sjhill@mips.com> 18 #include <asm/mips-boards/bonito64.h>
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/Linux-v6.1/arch/mips/mti-malta/ |
D | malta-int.c | 6 * Carsten Langgaard, carstenl@mips.com 7 * Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc. 11 * Routines for generic manipulation of the interrupts found on the MIPS 31 #include <asm/mips-boards/malta.h> 32 #include <asm/mips-boards/maltaint.h> 33 #include <asm/mips-cps.h> 35 #include <asm/mips-boards/generic.h> 36 #include <asm/mips-boards/msc01_pci.h>
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D | malta-init.c | 8 * Copyright (C) 1999,2000,2004,2005,2012 MIPS Technologies, Inc. 10 * Authors: Carsten Langgaard <carstenl@mips.com> 11 * Maciej W. Rozycki <macro@mips.com> 12 * Steven J. Hill <sjhill@mips.com> 24 #include <asm/mips-cps.h> 25 #include <asm/mips-boards/generic.h> 26 #include <asm/mips-boards/malta.h> 38 /* MIPS System controller register base */
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D | malta-setup.c | 3 * Carsten Langgaard, carstenl@mips.com 4 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 19 #include <asm/mips-cps.h> 20 #include <asm/mips-boards/generic.h> 21 #include <asm/mips-boards/malta.h> 22 #include <asm/mips-boards/maltaint.h> 68 return "MIPS Malta"; in get_system_type()
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/Linux-v6.1/arch/mips/include/asm/mach-malta/ |
D | mc146818rtc.h | 3 * Carsten Langgaard, carstenl@mips.com 4 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. 14 #include <asm/mips-boards/generic.h> 15 #include <asm/mips-boards/malta.h>
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/Linux-v6.1/Documentation/devicetree/bindings/interrupt-controller/ |
D | mti,gic.yaml | 7 title: MIPS Global Interrupt Controller 14 The MIPS GIC routes external interrupts to individual VPEs and IRQ pins. 27 file 'dt-bindings/interrupt-controller/mips-gic.h'. The 2nd cell is the 69 MIPS GIC includes a free-running global timer, per-CPU count/compare 107 #include <dt-bindings/interrupt-controller/mips-gic.h> 125 #include <dt-bindings/interrupt-controller/mips-gic.h>
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/Linux-v6.1/arch/mips/sibyte/ |
D | Platform | 9 -I$(srctree)/arch/mips/include/asm/mach-sibyte \ 13 -I$(srctree)/arch/mips/include/asm/mach-sibyte \ 17 -I$(srctree)/arch/mips/include/asm/mach-sibyte \ 21 -I$(srctree)/arch/mips/include/asm/mach-sibyte \
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