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/Linux-v5.15/Documentation/devicetree/bindings/display/exynos/
Dexynos_dsim.txt1 Exynos MIPI DSI Master
4 - compatible: value should be one of the following
5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
10 - reg: physical base address and length of the registers set for the device
11 - interrupts: should contain DSI interrupt
12 - clocks: list of clock specifiers, must contain an entry for each required
[all …]
Dexynos-mic.txt1 Device-Tree bindings for Samsung Exynos SoC mobile image compressor (MIC)
3 MIC (mobile image compressor) resides between decon and mipi dsi. Mipi dsi is
6 transferred through mipi dsi. The compressed frame data must be uncompressed in
10 - compatible: value should be "samsung,exynos5433-mic".
11 - reg: physical base address and length of the MIC registers set and system
13 - clocks: must include clock specifiers corresponding to entries in the
14 clock-names property.
15 - clock-names: list of clock names sorted in the same order as the clocks
17 - samsung,disp-syscon: the reference node for syscon for DISP block.
18 - ports: contains a port which is connected to decon node and dsi node.
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/display/bridge/
Dintel,keembay-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/intel,keembay-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Devicetree bindings for Intel Keem Bay mipi dsi controller
10 - Anitha Chrisanthus <anitha.chrisanthus@intel.com>
11 - Edmond J Dea <edmund.j.dea@intel.com>
15 const: intel,keembay-dsi
19 - description: MIPI registers range
21 reg-names:
[all …]
Dchipone,icn6211.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Chipone ICN6211 MIPI-DSI to RGB Converter bridge
10 - Jagan Teki <jagan@amarulasolutions.com>
13 ICN6211 is MIPI-DSI to RGB Converter bridge from chipone.
15 It has a flexible configuration of MIPI DSI signal input and
21 - chipone,icn6211
25 description: virtual channel number of a DSI peripheral
27 enable-gpios:
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Dtoshiba,tc358762.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba TC358762 MIPI DSI to MIPI DPI bridge
10 - Marek Vasut <marex@denx.de>
13 The TC358762 is bridge device which converts MIPI DSI to MIPI DPI.
18 - toshiba,tc358762
22 description: virtual channel number of a DSI peripheral
24 vddc-supply:
34 Video port for MIPI DSI input
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Dti,sn65dsi83.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip
10 - Marek Vasut <marex@denx.de>
13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI
14 to 1x Single-link LVDS
16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI
17 to 1x Dual-link or 2x Single-link LVDS
23 - ti,sn65dsi83
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Dsnps,dw-mipi-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/snps,dw-mipi-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MIPI DSI host controller
10 - Philippe CORNU <philippe.cornu@st.com>
13 This document defines device tree properties for the Synopsys DesignWare MIPI
14 DSI host controller. It doesn't constitue a device tree binding specification
15 by itself but is meant to be referenced by platform-specific device tree
23 - $ref: ../dsi-controller.yaml#
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Dnwl-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs
10 - Guido Gúnther <agx@sigxcpu.org>
11 - Robert Chiras <robert.chiras@nxp.com>
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
18 - $ref: ../dsi-controller.yaml#
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/display/
Dallwinner,sun6i-a31-mipi-dsi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 MIPI-DSI Controller Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - allwinner,sun6i-a31-mipi-dsi
17 - allwinner,sun50i-a64-mipi-dsi
28 - description: Bus Clock
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/Linux-v5.15/drivers/gpu/drm/panel/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
17 Y030XX067A 320x480 3.0" panel as found in the YLM RG-280M, RG-300
18 and RG-99 handheld gaming consoles.
47 TFT-LCD modules. The panel has a 1200x1920 resolution and uses
48 24 bit RGB per pixel. It provides a MIPI DSI interface to
49 the host and has a built-in LED backlight.
58 45NA WUXGA PANEL DSI Video Mode panel
61 tristate "Generic DSI command mode panels"
66 DRM panel driver for DSI command mode panels with support for
75 This driver supports LVDS panels that don't require device-specific
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/Linux-v5.15/Documentation/devicetree/bindings/display/rockchip/
Ddw_mipi_dsi_rockchip.txt1 Rockchip specific extensions to the Synopsys Designware MIPI DSI
5 - #address-cells: Should be <1>.
6 - #size-cells: Should be <0>.
7 - compatible: one of
8 "rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi"
9 "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"
10 "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"
11 - reg: Represent the physical address range of the controller.
12 - interrupts: Represent the controller's interrupt to the CPU(s).
13 - clocks, clock-names: Phandles to the controller's pll reference
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/Linux-v5.15/drivers/phy/mediatek/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
7 obj-$(CONFIG_PHY_MTK_UFS) += phy-mtk-ufs.o
8 obj-$(CONFIG_PHY_MTK_XSPHY) += phy-mtk-xsphy.o
10 phy-mtk-hdmi-drv-y := phy-mtk-hdmi.o
11 phy-mtk-hdmi-drv-y += phy-mtk-hdmi-mt2701.o
12 phy-mtk-hdmi-drv-y += phy-mtk-hdmi-mt8173.o
13 obj-$(CONFIG_PHY_MTK_HDMI) += phy-mtk-hdmi-drv.o
15 phy-mtk-mipi-dsi-drv-y := phy-mtk-mipi-dsi.o
16 phy-mtk-mipi-dsi-drv-y += phy-mtk-mipi-dsi-mt8173.o
[all …]
/Linux-v5.15/drivers/gpu/drm/bridge/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 tristate "Cadence DPI/DSI bridge"
27 Support Cadence DPI to DSI bridge. This is an internal
31 tristate "Chipone ICN6211 MIPI-DSI/RGB Converter bridge"
36 ICN6211 is MIPI-DSI/RGB Converter bridge from chipone.
38 It has a flexible configuration of MIPI DSI signal input
60 ChromeOS EC ANX7688 is an ultra-low power
61 4K Ultra-HD (4096x2160p60) mobile HD transmitter
63 2.0 to DisplayPort 1.3 Ultra-HD. It is connected
70 Driver for display connectors with support for DDC and hot-plug
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/Linux-v5.15/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,dsi.txt1 Mediatek DSI Device
4 The Mediatek DSI function block is a sink of the display subsystem and can
5 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-
9 - compatible: "mediatek,<chip>-dsi"
10 - the supported chips are mt2701, mt7623, mt8167, mt8173 and mt8183.
11 - reg: Physical base address and length of the controller's registers
12 - interrupts: The interrupt signal from the function block.
13 - clocks: device clocks
14 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
15 - clock-names: must contain "engine", "digital", and "hs"
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dmediatek,dsi-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek MIPI Display Serial Interface (DSI) PHY binding
11 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
12 - Philipp Zabel <p.zabel@pengutronix.de>
13 - Chunfeng Yun <chunfeng.yun@mediatek.com>
15 description: The MIPI DSI PHY supports up to 4-lane output.
19 pattern: "^dsi-phy@[0-9a-f]+$"
[all …]
Dmixel,mipi-dsi-phy.txt1 Mixel DSI PHY for i.MX8
3 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the
4 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
5 electrical signals for DSI.
8 - compatible: Must be:
9 - "fsl,imx8mq-mipi-dphy"
10 - clocks: Must contain an entry for each entry in clock-names.
11 - clock-names: Must contain the following entries:
12 - "phy_ref": phandle and specifier referring to the DPHY ref clock
13 - reg: the register range of the PHY controller
[all …]
/Linux-v5.15/drivers/gpu/drm/
Ddrm_mipi_dsi.c2 * MIPI DSI Bus
4 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
41 * DOC: dsi helpers
43 * These functions contain some common logic and helpers to deal with MIPI DSI
46 * Helpers are provided for a number of standard MIPI DSI command as well as a
47 * subset of the MIPI DCS command set.
52 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_device_match() local
58 /* compare DSI device and driver names */ in mipi_dsi_device_match()
59 if (!strcmp(dsi->name, drv->name)) in mipi_dsi_device_match()
[all …]
/Linux-v5.15/include/drm/
Ddrm_mipi_dsi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * MIPI DSI Bus
5 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
24 * struct mipi_dsi_msg - read/write DSI buffer
49 * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
67 * struct mipi_dsi_host_ops - DSI bus operations
68 * @attach: attach DSI device to DSI host
69 * @detach: detach DSI device from DSI host
70 * @transfer: transmit a DSI packet
72 * DSI packets transmitted by .transfer() are passed in as mipi_dsi_msg
[all …]
/Linux-v5.15/include/video/
Dmipi_display.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Defines for Mobile Industry Processor Interface (MIPI(R))
4 * Display Working Group standards: DSI, DCS, DBI, DPI
13 /* MIPI DSI Processor-to-Peripheral transaction types */
66 /* MIPI DSI Peripheral-to-Processor transaction types */
78 /* MIPI DCS commands */
111 MIPI_DCS_SET_PARTIAL_ROWS = 0x30, /* MIPI DCS 1.02 - MIPI_DCS_SET_PARTIAL_AREA before that */
128 MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
129 MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
130 MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
[all …]
/Linux-v5.15/drivers/gpu/drm/tegra/
Ddsi.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "dsi.h"
30 #include "mipi-phy.h"
73 struct tegra_mipi_device *mipi; member
81 /* for ganged-mode support */
102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/display/panel/
Dorisetech,otm8009a.yaml1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Orise Tech OTM8009A 3.97" 480x800 TFT LCD panel (MIPI-DSI video mode)
10 - Philippe CORNU <philippe.cornu@st.com>
14 a MIPI-DSI video interface. Its backlight is managed through the DSI link.
16 - $ref: panel-common.yaml#
25 description: DSI virtual channel
27 enable-gpios: true
29 power-supply: true
[all …]
Dsitronix,st7701.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jagan Teki <jagan@amarulasolutions.com>
15 several system interfaces like MIPI/RGB/SPI.
17 Techstar TS8550B is 480x854, 2-lane MIPI DSI LCD panel which has
21 - $ref: panel-common.yaml#
26 - enum:
27 - techstar,ts8550b
28 - const: sitronix,st7701
[all …]
Draydium,rm68200.yaml1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Raydium Semiconductor Corporation RM68200 5.5" 720p MIPI-DSI TFT LCD panel
10 - Philippe CORNU <philippe.cornu@st.com>
14 panel connected using a MIPI-DSI video interface.
17 - $ref: panel-common.yaml#
26 description: DSI virtual channel
29 enable-gpios: true
31 power-supply: true
[all …]
/Linux-v5.15/drivers/gpu/drm/sun4i/
Dsun6i_mipi_dsi.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (C) 2017-2018 Bootlin
11 #include <linux/crc-ccitt.h>
14 #include <linux/phy/phy-mipi-dphy.h>
291 static void sun6i_dsi_inst_abort(struct sun6i_dsi *dsi) in sun6i_dsi_inst_abort() argument
293 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_abort()
297 static void sun6i_dsi_inst_commit(struct sun6i_dsi *dsi) in sun6i_dsi_inst_commit() argument
299 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_commit()
304 static int sun6i_dsi_inst_wait_for_completion(struct sun6i_dsi *dsi) in sun6i_dsi_inst_wait_for_completion() argument
308 return regmap_read_poll_timeout(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_wait_for_completion()
[all …]
/Linux-v5.15/drivers/video/fbdev/omap2/omapfb/dss/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
24 dispc, dsi, hdmi and rfbi.
34 <debugfs>/omapdss/dsi_irq for DSI interrupts.
46 OMAP Video Encoder support for S-Video and composite TV-out.
71 SDI is a high speed one-way display serial bus between the host
75 bool "DSI support"
77 MIPI DSI (Display Serial Interface) support.
79 DSI is a high speed half-duplex serial interface between the host
82 See https://www.mipi.org/ for DSI specifications.

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