| /Linux-v6.1/Documentation/admin-guide/ |
| D | ras.rst | 400 |->mc0
408 .../mc/mc0/
446 │ ├── mc0
703 …EDAC MC0: CE page 0x283, offset 0xce0, grain 8, syndrome 0x6ec3, row 0, channel 1 "DIMM_B1": amd76…
704 …EDAC MC0: CE page 0x1e5, offset 0xfb0, grain 8, syndrome 0xb741, row 0, channel 1 "DIMM_B1": amd76…
712 | The memory controller | MC0 |
1057 echo 2 >/sys/devices/system/edac/mc/mc0/inject_addrmatch/dimm
1058 echo 1 >/sys/devices/system/edac/mc/mc0/inject_addrmatch/rank
1062 echo any >/sys/devices/system/edac/mc/mc0/inject_addrmatch/dimm
1063 echo any >/sys/devices/system/edac/mc/mc0/inject_addrmatch/rank
[all …]
|
| /Linux-v6.1/drivers/scsi/csiostor/ |
| D | csio_hw_t5.c | 336 * csio_t5_dfs_create_ext_mem - setup debugfs for MC0 or MC1 to read the values
340 * MC0 & MC1.
350 csio_add_debugfs_mem(hw, "mc0", MEM_MC0, in csio_t5_dfs_create_ext_mem()
|
| /Linux-v6.1/arch/arm/boot/dts/ |
| D | ste-hrefprev60.dtsi | 90 function = "mc0";
|
| D | ste-dbx5x0-pinctrl.dtsi | 252 function = "mc0";
307 function = "mc0";
|
| D | ste-snowball.dts | 533 function = "mc0";
|
| /Linux-v6.1/arch/x86/events/intel/ |
| D | uncore_snbep.c | 1981 { /* MC0 Channel 0 */
1985 { /* MC0 Channel 1 */
1989 { /* MC0 Channel 3 */
1993 { /* MC0 Channel 4 */
2429 * 0x7841 MC0 UClk, MC1 UClk
2430 * 0x7843 MC0 DClk CH 0, MC0 DClk CH 1, MC0 DClk CH 2,
2441 { /* MC0 UClk */
2449 { /* MC0 DClk CH 0 */
2453 { /* MC0 DClk CH 1 */
2457 { /* MC0 DClk CH 2 */
[all …]
|
| /Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/ |
| D | nvidia,tegra186-mc.yaml | 246 <0x0 0x02c20000 0x0 0x10000>, /* MC0 */
|
| /Linux-v6.1/drivers/interconnect/qcom/ |
| D | sm8350.c | 175 DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
194 DEFINE_QBCM(bcm_mc0_disp, "MC0", false, &ebi_disp);
|
| D | sdx55.c | 80 DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
|
| D | sdx65.c | 74 DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
|
| D | sc7180.c | 157 DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
|
| D | sdm845.c | 150 DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
|
| D | sm6350.c | 152 DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
|
| D | sm8450.c | 1391 .name = "MC0",
1500 .name = "MC0",
|
| D | sm8150.c | 160 DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
|
| D | sm8250.c | 170 DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
|
| D | sc7280.c | 1353 .name = "MC0",
|
| D | sc8180x.c | 1368 .name = "MC0",
|
| D | sc8280xp.c | 1855 .name = "MC0",
|
| /Linux-v6.1/drivers/edac/ |
| D | mce_amd.c | 769 pr_emerg(HW_ERR "MC0 Error: "); in decode_mc0_mce()
782 pr_emerg(HW_ERR "Corrupted MC0 MCE info?\n"); in decode_mc0_mce()
|
| D | sb_edac.c | 585 * MC0 is mapped to CH3,4,5 and MC1 is mapped to CH0,1,2
3004 * MC0 channels 0-2 are device 9 function 2-4, in knl_mci_bind_devs()
3166 * bank15 means mc0 and bank16 means mc1. in sbridge_mce_output_error()
|
| /Linux-v6.1/drivers/pinctrl/nomadik/ |
| D | pinctrl-nomadik-db8500.c | 853 DB8500_FUNC_GROUPS(mc0, "mc0_a_1", "mc0_a_2", "mc0_dat47_a_1", "mc0dat31dir_a_1");
931 FUNCTION(mc0),
|
| /Linux-v6.1/drivers/net/ethernet/smsc/ |
| D | epic100.c | 198 MC0=80, /* Multicast filter table. */ enumerator
1386 ew16(MC0 + i*4, ((u16 *)mc_filter)[i]); in set_rx_mode()
|
| /Linux-v6.1/drivers/misc/habanalabs/gaudi2/ |
| D | gaudi2_coresight.c | 2680 /* Set HBM (MC0 and MC1) disable components */ in gaudi2_coresight_init()
2684 dev_err(hdev->dev, "Failed to set disabled cs_dbg units for hbm mc0 coresight\n"); in gaudi2_coresight_init()
|
| /Linux-v6.1/drivers/net/ethernet/chelsio/cxgb4/ |
| D | cxgb4_main.c | 2278 * with no breaks as: EDC0, EDC1, MC0, MC1. All cards have both EDC0 in cxgb4_read_tpte()
2279 * and EDC1. Some cards will have neither MC0 nor MC1, most cards have in cxgb4_read_tpte()
2280 * MC0, and some have both MC0 and MC1. in cxgb4_read_tpte()
|
