| /Linux-v5.10/Documentation/devicetree/bindings/mfd/ |
| D | aspeed-lpc.txt | 2 Device tree bindings for the Aspeed Low Pin Count (LPC) Bus Controller
5 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
7 primary use case of the Aspeed LPC controller is as a slave on the bus
11 The LPC controller is represented as a multi-function device to account for the
14 "basically compatible with the [LPC registers from the] popular BMC controller
22 * An LPC Host Controller: Manages LPC functions such as host vs slave mode, the
23 physical properties of some LPC pins, configuration of serial IRQs, and
24 APB-to-LPC bridging amonst other functions.
26 * An LPC Host Interface Controller: Manages functions exposed to the host such
27 as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
[all …]
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| /Linux-v5.10/drivers/phy/ |
| D | phy-lpc18xx-usb-otg.c | 29 struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy); in lpc18xx_usb_otg_phy_init() local
33 ret = clk_set_rate(lpc->clk, 480000000); in lpc18xx_usb_otg_phy_init()
37 return clk_prepare(lpc->clk); in lpc18xx_usb_otg_phy_init()
42 struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy); in lpc18xx_usb_otg_phy_exit() local
44 clk_unprepare(lpc->clk); in lpc18xx_usb_otg_phy_exit()
51 struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy); in lpc18xx_usb_otg_phy_power_on() local
54 ret = clk_enable(lpc->clk); in lpc18xx_usb_otg_phy_power_on()
59 ret = regmap_update_bits(lpc->reg, LPC18XX_CREG_CREG0, in lpc18xx_usb_otg_phy_power_on()
62 clk_disable(lpc->clk); in lpc18xx_usb_otg_phy_power_on()
71 struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy); in lpc18xx_usb_otg_phy_power_off() local
[all …]
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| /Linux-v5.10/drivers/clocksource/ |
| D | clksrc_st_lpc.c | 3 * Clocksource using the Low Power Timer found in the Low Power Controller (LPC)
18 #include <dt-bindings/mfd/st-lpc.h>
55 "clksrc-st-lpc", rate, 300, 32, in st_clksrc_init()
58 pr_err("clksrc-st-lpc: Failed to register clocksource\n"); in st_clksrc_init()
71 pr_err("clksrc-st-lpc: Failed to get LPC clock\n"); in st_clksrc_setup_clk()
76 pr_err("clksrc-st-lpc: Failed to enable LPC clock\n"); in st_clksrc_setup_clk()
81 pr_err("clksrc-st-lpc: Failed to get LPC clock rate\n"); in st_clksrc_setup_clk()
96 ret = of_property_read_u32(np, "st,lpc-mode", &mode); in st_clksrc_of_register()
98 pr_err("clksrc-st-lpc: An LPC mode must be provided\n"); in st_clksrc_of_register()
102 /* LPC can either run as a Clocksource or in RTC or WDT mode */ in st_clksrc_of_register()
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/watchdog/ |
| D | st_lpc_wdt.txt | 1 STMicroelectronics Low Power Controller (LPC) - Watchdog
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
7 [See: ../rtc/rtc-st-lpc.txt for RTC options]
8 [See: ../timer/st,stih407-lpc for Clocksource options]
12 - compatible : Should be: "st,stih407-lpc"
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
33 lpc@fde05000 {
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| /Linux-v5.10/Documentation/devicetree/bindings/rtc/ |
| D | rtc-st-lpc.txt | 1 STMicroelectronics Low Power Controller (LPC) - RTC
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
8 [See: ../timer/st,stih407-lpc for Clocksource options]
12 - compatible : Must be: "st,stih407-lpc"
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
23 lpc@fde05000 {
24 compatible = "st,stih407-lpc";
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/timer/ |
| D | st,stih407-lpc | 1 STMicroelectronics Low Power Controller (LPC) - Clocksource
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
8 [See: ../rtc/rtc-st-lpc.txt for RTC options]
12 - compatible : Must be: "st,stih407-lpc"
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
23 lpc@fde05000 {
24 compatible = "st,stih407-lpc";
[all …]
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| /Linux-v5.10/drivers/soc/aspeed/ |
| D | Kconfig | 10 tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
12 Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
14 region where the host LPC read/write region can be buffered.
17 tristate "Aspeed ast2500 HOST LPC snoop support"
20 Provides a driver to control the LPC snoop interface which
22 the host to an arbitrary LPC I/O port.
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| D | aspeed-lpc-ctrl.c | 16 #include <linux/aspeed-lpc-ctrl.h>
18 #define DEVICE_NAME "aspeed-lpc-ctrl"
104 * The bottom half of HICR7 is the MSB of the HOST LPC in aspeed_lpc_ctrl_ioctl()
161 * addr (host lpc address) is safe regardless of values. This in aspeed_lpc_ctrl_ioctl()
163 * side of the LPC bus. This cannot impact the hosts own in aspeed_lpc_ctrl_ioctl()
164 * memory space by surprise as LPC specific accessors are in aspeed_lpc_ctrl_ioctl()
180 * Enable LPC FHW cycles. This is required for the host to in aspeed_lpc_ctrl_ioctl()
292 { .compatible = "aspeed,ast2400-lpc-ctrl" },
293 { .compatible = "aspeed,ast2500-lpc-ctrl" },
311 MODULE_DESCRIPTION("Control for aspeed 2400/2500 LPC HOST to BMC mappings");
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| D | aspeed-lpc-snoop.c | 5 * Provides a simple driver to control the ASPEED LPC snoop interface which
7 * the host to an arbitrary LPC I/O port.
26 #define DEVICE_NAME "aspeed-lpc-snoop"
207 /* Enable LPC snoop channel at requested port */ in aspeed_lpc_enable_snoop()
324 { .compatible = "aspeed,ast2400-lpc-snoop",
326 { .compatible = "aspeed,ast2500-lpc-snoop",
345 MODULE_DESCRIPTION("Linux driver to control Aspeed LPC snoop functionality");
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| D | Makefile | 2 obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o
3 obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o
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| /Linux-v5.10/drivers/bus/ |
| D | hisi_lpc.c | 22 #define DRV_NAME "hisi-lpc"
50 #define LPC_REG_OP_LEN 0x10 /* LPC cycles count per start */
58 /* The minimal nanosecond interval for each query on LPC cycle status */
66 * for extra 256 lpc clocks, so (256 + 13) * 30ns = 8 us. The maximum burst
92 * hisi_lpc_target_in - trigger a series of LPC cycles for read operation
93 * @lpcdev: pointer to hisi lpc device
94 * @para: some parameters used to control the lpc I/O operations
95 * @addr: the lpc I/O target port address
145 * hisi_lpc_target_out - trigger a series of LPC cycles for write operation
146 * @lpcdev: pointer to hisi lpc device
[all …]
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| /Linux-v5.10/drivers/watchdog/ |
| D | st_lpc_wdt.c | 3 * ST's LPC Watchdog
23 #include <dt-bindings/mfd/st-lpc.h>
29 /* LPC as WDT */
58 .compatible = "st,stih407-lpc",
129 .identity = "ST LPC WDT",
162 ret = of_property_read_u32(np, "st,lpc-mode", &mode); in st_wdog_probe()
164 dev_err(dev, "An LPC mode must be provided\n"); in st_wdog_probe()
168 /* LPC can either run as a Clocksource or in RTC or WDT mode */ in st_wdog_probe()
236 dev_info(dev, "LPC Watchdog driver registered, reset type is %s", in st_wdog_probe()
296 .name = "st-lpc-wdt",
[all …]
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| /Linux-v5.10/arch/powerpc/platforms/powernv/ |
| D | opal-lpc.c | 3 * PowerNV LPC bus handling.
187 struct lpc_debugfs_entry *lpc = filp->private_data; in lpc_debug_read() local
204 if (lpc->lpc_type == OPAL_LPC_FW) { in lpc_debug_read()
210 rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos, in lpc_debug_read()
224 * respective positions (ie, LPC position). in lpc_debug_read()
229 * IE. If the LPC transaction has bytes B0, B1, B2 and B3 in that in lpc_debug_read()
278 struct lpc_debugfs_entry *lpc = filp->private_data; in lpc_debug_write() local
295 if (lpc->lpc_type == OPAL_LPC_FW) { in lpc_debug_write()
334 rc = opal_lpc_write(opal_lpc_chip_id, lpc->lpc_type, pos, in lpc_debug_write()
374 root = debugfs_create_dir("lpc", powerpc_debugfs_root); in opal_lpc_init_debugfs()
[all …]
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| /Linux-v5.10/include/linux/ |
| D | dtlk.h | 21 (that is, all but LPC) */
43 /* LPC speak commands */
49 /* LPC Port Status Flags (valid only after one of the LPC
52 indicates the LPC synthesizer is
55 indicates that the hardware LPC
60 indicates that the LPC data buffer
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| /Linux-v5.10/Documentation/devicetree/bindings/arm/hisilicon/ |
| D | low-pin-count.yaml | 13 Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which
17 LPC device node.
28 - hisilicon,hip06-lpc
29 - hisilicon,hip07-lpc
50 compatible = "hisilicon,hip06-lpc";
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| /Linux-v5.10/drivers/rtc/ |
| D | rtc-st-lpc.c | 3 * rtc-st-lpc.c - ST's LPC RTC, powered by the Low Power Timer
25 #include <dt-bindings/mfd/st-lpc.h>
37 /* LPC as WDT */
191 ret = of_property_read_u32(np, "st,lpc-mode", &mode); in st_rtc_probe()
193 dev_err(&pdev->dev, "An LPC mode must be provided\n"); in st_rtc_probe()
197 /* LPC can either run as a Clocksource or in RTC or WDT mode */ in st_rtc_probe()
302 { .compatible = "st,stih407-lpc" },
309 .name = "st-lpc-rtc",
318 MODULE_DESCRIPTION("STMicroelectronics LPC RTC driver");
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| /Linux-v5.10/arch/x86/kernel/ |
| D | i8237.c | 17 * 8237A DMA controller (used for ISA and LPC).
57 * LPC traffic for POST codes. Original LPC only decodes one byte of in i8237A_init_ops()
58 * port 0x80 but some BIOS may choose to enhance PCH LPC port 0x8x in i8237A_init_ops()
66 * support 8237 DMA or bus mastering from LPC. Platform firmware in i8237A_init_ops()
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| /Linux-v5.10/Documentation/devicetree/bindings/ipmi/ |
| D | aspeed-kcs-bmc.txt | 13 - kcs_chan : The LPC channel number in the controller
23 - aspeed,lpc-io-reg : The host CPU LPC IO address for the device
30 aspeed,lpc-reg = <0xca2>;
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| /Linux-v5.10/arch/powerpc/include/asm/ |
| D | mpc5121.h | 47 * LPC Module
75 u32 data_word; /* LPC RX/TX FIFO Data Word Register */
76 u32 fifo_status; /* LPC RX/TX FIFO Status Register */
77 u32 fifo_ctrl; /* LPC RX/TX FIFO Control Register */
78 u32 fifo_alarm; /* LPC RX/TX FIFO Alarm Register */
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| /Linux-v5.10/drivers/mcb/ |
| D | Kconfig | 33 tristate "LPC (non PCI) based MCB carrier"
37 This is a MCB carrier on a LPC or non PCI device.
39 If build as a module, the module is called mcb-lpc.ko
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| /Linux-v5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | aspeed,ast2500-pinctrl.yaml | 105 lpc: lpc@1e789000 {
106 compatible = "aspeed,ast2500-lpc", "simple-mfd";
113 lpc_host: lpc-host@80 {
114 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
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| /Linux-v5.10/Documentation/ABI/stable/ |
| D | sysfs-driver-aspeed-vuart | 5 will appear on the host <-> BMC LPC bus.
13 the UART will appear on the host <-> BMC LPC bus.
21 host via the BMC LPC bus.
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| /Linux-v5.10/drivers/net/ethernet/nxp/ |
| D | Kconfig | 3 tristate "NXP ethernet MAC on LPC devices"
9 some NXP LPC devices. You can safely enable this option for LPC32xx
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| /Linux-v5.10/drivers/mfd/ |
| D | lpc_sch.c | 3 * lpc_sch.c - LPC interface for Intel Poulsbo SCH
5 * LPC bridge function of the Intel SCH contains many other
7 * Power Management, System Management, GPIO, RTC, and LPC
207 MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
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| /Linux-v5.10/arch/sh/include/cpu-sh4/cpu/ |
| D | sh7757.h | 145 /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */
150 /* PTH (mobule: SPI1, LPC, DMAC, ADC) */
197 /* PTQ (mobule: LPC) */
217 /* PTU (mobule: LPC, APM) */
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