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/Linux-v6.1/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra20-pmc.yaml91 Mode 0 is for LP0, CPU + Core voltage off and DRAM in self-refresh
113 nvidia,lp0-vec:
116 <start length> Starting address and length of LP0 vector.
117 The LP0 vector contains the warm boot code that is executed
118 by AVP when resuming from the LP0 state.
/Linux-v6.1/arch/arm/mach-tegra/
Dsleep-tegra20.S138 * Enters suspend in LP0 or LP1 by turning off the mmu and jumping to
265 * puts memory in self-refresh for LP0 and LP1
275 * In LP0 and LP1 all PLLs will be turned off. Switch the CPU and system clock
321 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
Dsleep-tegra30.S37 #define PMC_CTRL_SIDE_EFFECT_LP0 (1 << 14) /* enter LP0 when CPU pwr gated */
279 * Enters suspend in LP0 or LP1 by turning off the MMU and jumping to
293 * LP0 / LP1 use physical address, since the MMU needs to be
646 * puts memory in self-refresh for LP0 and LP1
656 * In LP0 and LP1 all PLLs will be turned off. Switching the CPU and System CLK
743 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
Dpm.c261 * copy these code to IRAM before LP0/LP1 suspend and restore the content
343 [TEGRA_SUSPEND_LP0] = "LP0",
418 "self-refresh -- LP0/LP1 unavailable\n", in tegra_pm_init_suspend()
Dreset-handler.S27 * an LP2 transition. Also branched to by LP0 and LP1 resume after
/Linux-v6.1/Documentation/admin-guide/
Dparport.rst221 Both the above examples would inform lp that you want ``/dev/lp0`` to be
226 name, so ``/dev/lp0`` was always the port at 0x3bc. This is no longer the
227 case - if you only have one port, it will default to being ``/dev/lp0``,
Dserial-console.rst25 lp0 for the first parallel port
Ddevices.txt167 0 = /dev/lp0 Parallel printer on parport0
975 0 = /dev/pd_bdm0 PD BDM interface on lp0
978 4 = /dev/icd_bdm0 ICD BDM interface on lp0
2454 0 = /dev/usb/lp0 First USB printer
/Linux-v6.1/arch/arm/include/asm/mach/
Darch.h40 unsigned char reserve_lp0 :1; /* never has lp0 */
/Linux-v6.1/drivers/char/
Dlp.c44 * lp=parport1,none,parport2 (bind lp0 to parport1, disable lp1 and
71 * lp0 0x3bc
77 * to lp0 regardless of its I/O address. If you need the old behaviour, you
DKconfig67 option "console=lp0" to the kernel at boot time.
/Linux-v6.1/arch/arm/kernel/
Dsetup.c216 #define lp0 io_res[0] macro
914 * possessing lp0, lp1 or lp2 in request_standard_resources()
917 request_resource(&ioport_resource, &lp0); in request_standard_resources()
/Linux-v6.1/Documentation/usb/
Dgadget-testing.rst890 If udev is active, then e.g. /dev/usb/lp0 should appear.
900 # cat > /dev/usb/lp0
908 # cat /dev/usb/lp0
/Linux-v6.1/drivers/soc/tegra/
Dpmc.c65 #define PMC_CNTRL_SIDE_EFFECT_LP0 BIT(14) /* LP0 when CPU pwr gated */
367 * LP0 or SC7). Wakeup from other sleep states (such as LP1 or LP2)
402 * @lp0_vec_phys: physical base address of the LP0 warm boot code
403 * @lp0_vec_size: size of the LP0 warm boot code
1922 if (of_property_read_u32_array(np, "nvidia,lp0-vec", values, in tegra_pmc_parse_dt()
3178 "LP0"
3472 "LP0",
Dregulators-tegra30.c372 * hardware for resuming from LP0. in tegra30_regulator_prepare_suspend()
Dregulators-tegra20.c387 * hardware for resuming from LP0. in tegra20_regulator_prepare_suspend()
/Linux-v6.1/drivers/gpu/drm/i915/
Dintel_pm.c2768 * and thus fail gracefully if LP0 watermarks in ilk_validate_wm_level()
2859 /* ILK primary LP0 latency is 700 ns */ in ilk_read_wm_latency()
2868 /* ILK sprite LP0 latency is 1300 ns */ in intel_fixup_spr_wm_latency()
2876 /* ILK cursor LP0 latency is 1300 ns */ in intel_fixup_cur_wm_latency()
3022 /* LP0 watermark maximums depend on this pipe alone */ in ilk_validate_pipe_wm()
3030 /* LP0 watermarks always use 1/2 DDB partitioning */ in ilk_validate_pipe_wm()
3033 /* At least LP0 must be valid */ in ilk_validate_pipe_wm()
3035 drm_dbg_kms(&dev_priv->drm, "LP0 watermark invalid\n"); in ilk_validate_pipe_wm()
3324 /* LP0 register values */ in ilk_compute_wm_results()
3627 * For active pipes LP0 watermark is marked as in ilk_pipe_wm_get_hw_state()
/Linux-v6.1/drivers/ata/
Dahci_tegra.c617 /* LP0 suspend support not implemented */
/Linux-v6.1/arch/arm/boot/dts/
Dtegra124-nyan.dtsi724 vdd_3v3_lp0: regulator-lp0 {
Dtegra124-venice2.dts1192 vdd_3v3_lp0: regulator-lp0 {
/Linux-v6.1/drivers/scsi/isci/
Dport_config.c153 * hardware. The SCU hardware allows for port configurations as follows. LP0
/Linux-v6.1/arch/arm64/boot/dts/nvidia/
Dtegra132-norrin.dts1179 vdd_3v3_lp0: regulator-vdd-3v3-lp0 {
/Linux-v6.1/drivers/gpu/drm/i915/display/
Dintel_atomic_plane.c516 * down to LP0 and wait for vblank in order to make sure the in intel_plane_atomic_calc_changes()
/Linux-v6.1/
D.mailmap403 Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu>
/Linux-v6.1/drivers/gpu/drm/vc4/
Dvc4_dsi.c1467 DSI_PORT_BIT(INT_ERR_CONT_LP0), "LP0 contention"); in vc4_dsi_irq_handler()

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