| /Linux-v5.10/drivers/clk/ |
| D | clk-lochnagar.c | 147 struct lochnagar_clk *lclk = lochnagar_hw_to_lclk(hw); in lochnagar_clk_prepare() local
148 struct lochnagar_clk_priv *priv = lclk->priv; in lochnagar_clk_prepare()
152 ret = regmap_update_bits(regmap, lclk->cfg_reg, in lochnagar_clk_prepare()
153 lclk->ena_mask, lclk->ena_mask); in lochnagar_clk_prepare()
156 lclk->name, ret); in lochnagar_clk_prepare()
163 struct lochnagar_clk *lclk = lochnagar_hw_to_lclk(hw); in lochnagar_clk_unprepare() local
164 struct lochnagar_clk_priv *priv = lclk->priv; in lochnagar_clk_unprepare()
168 ret = regmap_update_bits(regmap, lclk->cfg_reg, lclk->ena_mask, 0); in lochnagar_clk_unprepare()
171 lclk->name, ret); in lochnagar_clk_unprepare()
176 struct lochnagar_clk *lclk = lochnagar_hw_to_lclk(hw); in lochnagar_clk_set_parent() local
[all …]
|
| /Linux-v5.10/drivers/usb/host/ |
| D | xhci-rcar.c | 38 #define RCAR_USB3_LCLK 0xa44 /* LCLK Select */
64 /* LCLK Select */
90 /* LCLK Select */ in xhci_rcar_start_gen2()
|
| /Linux-v5.10/drivers/gpu/drm/msm/dp/ |
| D | dp_debug.c | 52 u64 lclk = 0; in dp_debug_read_info() local
176 lclk = debug->link->link_params.rate * 1000; in dp_debug_read_info()
178 "\t\tlclk = %lld\n", lclk); in dp_debug_read_info()
|
| D | dp_ctrl.c | 41 u64 lclk; /* 162, 270, 540 and 810 */ member
130 /* Default-> LSCLK DIV: 1/4 LCLK */ in dp_ctrl_config_ctrl()
318 tu->lclk_fp = drm_fixp_from_fraction(in->lclk, 1); in dp_panel_update_tu_timings()
945 in.lclk = ctrl->link->link_params.rate / 1000; in dp_ctrl_calc_tu_parameters()
|
| /Linux-v5.10/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| D | arcturus_ppt.h | 56 uint32_t lclk[MAX_PCIE_CONF]; member
|
| /Linux-v5.10/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | dispc.c | 67 int (*calc_scaling) (unsigned long pclk, unsigned long lclk,
2106 static int check_horiz_timing_omap3(unsigned long pclk, unsigned long lclk, in check_horiz_timing_omap3() argument
2124 blank = div_u64((u64)(t->hbp + t->hsw + t->hfp) * lclk, pclk); in check_horiz_timing_omap3()
2138 val = div_u64((u64)(nonactive - pos_x) * lclk, pclk); in check_horiz_timing_omap3()
2149 val = div_u64((u64)nonactive * lclk, pclk); in check_horiz_timing_omap3()
2251 static int dispc_ovl_calc_scaling_24xx(unsigned long pclk, unsigned long lclk, in dispc_ovl_calc_scaling_24xx() argument
2297 static int dispc_ovl_calc_scaling_34xx(unsigned long pclk, unsigned long lclk, in dispc_ovl_calc_scaling_34xx() argument
2328 error = check_horiz_timing_omap3(pclk, lclk, mgr_timings, in dispc_ovl_calc_scaling_34xx()
2363 if (check_horiz_timing_omap3(pclk, lclk, mgr_timings, pos_x, in_width, in dispc_ovl_calc_scaling_34xx()
2382 static int dispc_ovl_calc_scaling_44xx(unsigned long pclk, unsigned long lclk, in dispc_ovl_calc_scaling_44xx() argument
[all …]
|
| D | sdi.c | 170 * LCLK and PCLK divisors are located in shadow registers, and we in sdi_display_enable()
|
| /Linux-v5.10/drivers/video/fbdev/ |
| D | pxafb.c | 993 * PixelClock = LCLK
997 * PCD = LCLK
1002 * LCLK = LCD/Memory Clock
1008 * The function get_lclk_frequency_10khz returns LCLK in units of
1009 * 10khz. Calling the result of this function lclk gives us the
1012 * PCD = (lclk * 10^4 ) * ( pixclock * 10^-12 )
1238 unsigned long lclk = clk_get_rate(fbi->clk); in setup_smart_timing() local
1248 LCCR1_BegLnDel(__smart_timing(t1, lclk)) | in setup_smart_timing()
1249 LCCR1_EndLnDel(__smart_timing(t2, lclk)) | in setup_smart_timing()
1250 LCCR1_HorSnchWdth(__smart_timing(t3, lclk)); in setup_smart_timing()
[all …]
|
| /Linux-v5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | aspeed,ast2500-pinctrl.yaml | 50 I2C6, I2C7, I2C8, I2C9, LAD0, LAD1, LAD2, LAD3, LCLK, LFRAME, LPCHC,
|
| D | nuvoton,npcm7xx-pinctrl.txt | 86 "GPIO162/SERIRQ", "GPIO163/LCLK/ESPICLK", "GPIO164/LAD0/ESPI_IO0",
|
| /Linux-v5.10/drivers/gpu/drm/radeon/ |
| D | smu7.h | 43 #define SMU7_MAX_LEVELS_GIO SMU__NUM_LCLK_DPM_LEVELS // LCLK Levels
|
| /Linux-v5.10/drivers/gpu/drm/omapdrm/dss/ |
| D | dispc.c | 101 unsigned long pclk, unsigned long lclk,
2130 static int check_horiz_timing_omap3(unsigned long pclk, unsigned long lclk, in check_horiz_timing_omap3() argument
2150 lclk, pclk); in check_horiz_timing_omap3()
2164 val = div_u64((u64)(nonactive - pos_x) * lclk, pclk); in check_horiz_timing_omap3()
2175 val = div_u64((u64)nonactive * lclk, pclk); in check_horiz_timing_omap3()
2278 unsigned long pclk, unsigned long lclk, in dispc_ovl_calc_scaling_24xx() argument
2327 unsigned long pclk, unsigned long lclk, in dispc_ovl_calc_scaling_34xx() argument
2360 error = check_horiz_timing_omap3(pclk, lclk, vm, in dispc_ovl_calc_scaling_34xx()
2395 if (check_horiz_timing_omap3(pclk, lclk, vm, pos_x, in_width, in dispc_ovl_calc_scaling_34xx()
2415 unsigned long pclk, unsigned long lclk, in dispc_ovl_calc_scaling_44xx() argument
[all …]
|
| D | sdi.c | 226 * LCLK and PCLK divisors are located in shadow registers, and we in sdi_bridge_enable()
|
| /Linux-v5.10/drivers/gpu/drm/amd/pm/inc/ |
| D | smu7.h | 43 #define SMU7_MAX_LEVELS_GIO SMU__NUM_LCLK_DPM_LEVELS // LCLK Levels
|
| D | smu72.h | 111 #define SMU72_MAX_LEVELS_GIO SMU__NUM_LCLK_DPM_LEVELS /* LCLK Levels */
|
| D | smu73.h | 110 #define SMU73_MAX_LEVELS_GIO SMU__NUM_LCLK_DPM_LEVELS // LCLK Levels
|
| D | smu74.h | 136 #define SMU74_MAX_LEVELS_GIO SMU__NUM_LCLK_DPM_LEVELS /* LCLK Levels */
|
| /Linux-v5.10/Documentation/devicetree/bindings/media/ |
| D | samsung-fimc.txt | 72 - clock-frequency: maximum FIMC local clock (LCLK) frequency;
|
| /Linux-v5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | vega12_hwmgr.h | 122 uint32_t lclk[MAX_PCIE_CONF]; member
|
| D | vega10_hwmgr.h | 143 uint32_t lclk[MAX_PCIE_CONF]; member
|
| D | vega20_hwmgr.h | 174 uint32_t lclk[MAX_PCIE_CONF]; member
|
| /Linux-v5.10/drivers/gpu/drm/rockchip/ |
| D | cdn-dp-reg.c | 654 * 1. chose Lclk freq(162Mhz, 270Mhz, 540Mhz), set TU to 32 in cdn_dp_config_video()
655 * 2. calculate VS(valid symbol) = TU * Pclk * Bpp / (Lclk * Lanes) in cdn_dp_config_video()
|
| /Linux-v5.10/drivers/pinctrl/aspeed/ |
| D | pinctrl-aspeed-g5.c | 1830 SIG_EXPR_LIST_DECL_SINGLE(C22, LCLK, LCLK, SIG_DESC_SET(SCUAC, 4));
1831 PIN_DECL_2(C22, GPIOAC4, ESPICK, LCLK);
1832 FUNC_GROUP_DECL(LCLK, C22);
2185 ASPEED_PINCTRL_GROUP(LCLK),
2355 ASPEED_PINCTRL_FUNC(LCLK),
|
| /Linux-v5.10/arch/mips/alchemy/common/ |
| D | clock.c | 33 * the static bus. The Au1000/1500/1100 manuals call it LCLK, on
341 * On Au1000, Au1500, Au1100 it's called LCLK, in alchemy_clk_setup_lrclk()
|
| /Linux-v5.10/arch/arm/boot/dts/ |
| D | aspeed-g5.dtsi | 1045 function = "LCLK";
1046 groups = "LCLK";
|
