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/Linux-v6.1/drivers/clk/ingenic/
Djz4740-cgu.c94 [JZ4740_CLK_PLL_HALF] = {
151 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
161 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
167 .parents = { JZ4740_CLK_EXT, JZ4740_CLK_PLL_HALF, -1, -1 },
183 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
190 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
197 .parents = { JZ4740_CLK_EXT, JZ4740_CLK_PLL_HALF, -1, -1 },
/Linux-v6.1/include/dt-bindings/clock/
Dingenic,jz4740-cgu.h18 #define JZ4740_CLK_PLL_HALF 3 macro
/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dingenic,aic.yaml87 <&cgu JZ4740_CLK_PLL_HALF>;
/Linux-v6.1/arch/mips/boot/dts/ingenic/
Djz4740.dtsi198 <&cgu JZ4740_CLK_PLL_HALF>;