Searched full:jz4740_clk_pll_half (Results 1 – 4 of 4) sorted by relevance
| /Linux-v5.10/drivers/clk/ingenic/ |
| D | jz4740-cgu.c | 94 [JZ4740_CLK_PLL_HALF] = {
141 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
151 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
157 .parents = { JZ4740_CLK_EXT, JZ4740_CLK_PLL_HALF, -1, -1 },
173 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
180 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
187 .parents = { JZ4740_CLK_EXT, JZ4740_CLK_PLL_HALF, -1, -1 },
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| /Linux-v5.10/include/dt-bindings/clock/ |
| D | jz4740-cgu.h | 18 #define JZ4740_CLK_PLL_HALF 3 macro
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| /Linux-v5.10/Documentation/devicetree/bindings/sound/ |
| D | ingenic,aic.yaml | 87 <&cgu JZ4740_CLK_PLL_HALF>;
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| /Linux-v5.10/arch/mips/boot/dts/ingenic/ |
| D | jz4740.dtsi | 198 <&cgu JZ4740_CLK_PLL_HALF>;
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