Home
last modified time | relevance | path

Searched full:j7200 (Results 1 – 24 of 24) sorted by relevance

/Linux-v5.15/arch/arm64/boot/dts/ti/
Dk3-j7200.dtsi3 * Device Tree Source for J7200 SoC Family
14 model = "Texas Instruments K3 J7200 SoC";
15 compatible = "ti,j7200";
171 #include "k3-j7200-main.dtsi"
172 #include "k3-j7200-mcu-wakeup.dtsi"
Dk3-j7200-mcu-wakeup.dtsi3 * Device Tree Source for J7200 SoC Family MCU/WAKEUP Domain peripherals
340 compatible = "ti,j7200-r5fss";
349 compatible = "ti,j7200-r5f";
357 firmware-name = "j7200-mcu-r5f0_0-fw";
364 compatible = "ti,j7200-r5f";
372 firmware-name = "j7200-mcu-r5f0_1-fw";
Dk3-j7200-main.dtsi3 * Device Tree Source for J7200 SoC Family Main Domain peripherals
489 compatible = "ti,j7200-sdhci-8bit", "ti,j721e-sdhci-8bit";
513 compatible = "ti,j7200-sdhci-4bit", "ti,j721e-sdhci-4bit";
592 compatible = "ti,j7200-pcie-host", "ti,j721e-pcie-host";
621 compatible = "ti,j7200-pcie-ep", "ti,j721e-pcie-ep";
739 compatible = "ti,j7200-r5fss";
748 compatible = "ti,j7200-r5f";
756 firmware-name = "j7200-main-r5f0_0-fw";
763 compatible = "ti,j7200-r5f";
771 firmware-name = "j7200-main-r5f0_1-fw";
Dk3-j7200-common-proc-board.dts8 #include "k3-j7200-som-p0.dtsi"
252 * The j7200 CPB board is identical to the CPB used for J721E, the SOMs can be
255 * main_i2c1 of J7200 is connected to the CPB i2c bus labeled as i2c3.
256 * The i2c1 of the CPB (as it is labeled) is not connected to j7200.
DMakefile15 dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb
Dk3-j7200-som-p0.dtsi8 #include "k3-j7200.dtsi"
/Linux-v5.15/Documentation/devicetree/bindings/arm/ti/
Dk3.yaml34 - description: K3 J7200 SoC
36 - const: ti,j7200
/Linux-v5.15/Documentation/devicetree/bindings/sound/
Dti,j721e-cpb-audio.yaml32 Clocking setup for j7200:
41 - ti,j7200-cpb-audio
105 const: ti,j7200-cpb-audio
/Linux-v5.15/Documentation/devicetree/bindings/pci/
Dti,j721e-pci-ep.yaml24 - description: PCIe EP controller in J7200
26 - const: ti,j7200-pcie-ep
Dti,j721e-pci-host.yaml24 - description: PCIe controller in J7200
26 - const: ti,j7200-pcie-host
/Linux-v5.15/Documentation/devicetree/bindings/remoteproc/
Dti,k3-r5f-rproc.yaml39 - ti,j7200-r5fss
67 most SoCs (AM65x, J721E, J7200), default is LockStep mode if omitted;
105 - ti,j7200-r5f
/Linux-v5.15/drivers/dma/ti/
DMakefile10 k3-psil-j7200.o \
Dk3-psil.c22 { .family = "J7200", .data = &j7200_ep_map },
Dk3-psil-j7200.c170 .name = "j7200",
Dk3-udma.c4357 { .family = "J7200", .data = &j7200_soc_data },
/Linux-v5.15/Documentation/devicetree/bindings/mmc/
Dsdhci-am654.yaml25 - const: ti,j7200-sdhci-8bit
28 - const: ti,j7200-sdhci-4bit
/Linux-v5.15/include/dt-bindings/mux/
Dti-serdes.h71 /* J7200 */
/Linux-v5.15/Documentation/devicetree/bindings/hwlock/
Dti,omap-hwspinlock.yaml17 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs
/Linux-v5.15/Documentation/devicetree/bindings/mailbox/
Dti,omap-mailbox.yaml37 K3 AM65x, J721E and J7200 SoCs has each of these instances form a cluster and
122 - ti,am654-mailbox # for K3 AM65x, J721E and J7200 SoCs
/Linux-v5.15/drivers/soc/ti/
Dk3-socinfo.c42 { 0xBB6D, "J7200" },
/Linux-v5.15/drivers/remoteproc/
Dti_k3_r5_remoteproc.c41 /* Available from J7200 SoCs onwards */
74 * Split mode : AM65x, J721E, J7200 and AM64x SoCs
75 * LockStep mode : AM65x, J721E and J7200 SoCs
421 * Newer IP revisions like on J7200 SoCs support h/w auto-initialization in k3_r5_rproc_prepare()
971 * otherwise been unusable (Eg: LockStep-mode on J7200 SoCs, Single-CPU mode on
1553 { .compatible = "ti,j7200-r5fss", .data = &j7200_soc_data, },
/Linux-v5.15/drivers/pci/controller/cadence/
Dpci-j721e.c334 .compatible = "ti,j7200-pcie-host",
338 .compatible = "ti,j7200-pcie-ep",
/Linux-v5.15/sound/soc/ti/
Dj721e-evm.c553 .compatible = "ti,j7200-cpb-audio",
/Linux-v5.15/drivers/net/ethernet/ti/
Dcpsw_ale.c194 /* K3 j721e/j7200 cpsw9g/5g, am64x cpsw3g */