Searched full:imx7ulp_clk_apll_pfd1 (Results 1 – 6 of 6) sorted by relevance
41 assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>;
81 assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>;
274 <&scg1 IMX7ULP_CLK_APLL_PFD1>,306 <&scg1 IMX7ULP_CLK_APLL_PFD1>,
34 #define IMX7ULP_CLK_APLL_PFD1 21 macro
99 <&scg1 IMX7ULP_CLK_APLL_PFD1>,
99 hws[IMX7ULP_CLK_APLL_PFD1] = imx_clk_hw_pfdv2("apll_pfd1", "apll", base + 0x50c, 1); in imx7ulp_clk_scg1_init()