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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_resource.h166 #define ABM_DCN32_REG_LIST_RI(id) \ argument
168 SRI_ARR(DC_ABM1_HG_SAMPLE_RATE, ABM, id), \
169 SRI_ARR(DC_ABM1_LS_SAMPLE_RATE, ABM, id), \
170 SRI_ARR(BL1_PWM_BL_UPDATE_SAMPLE_RATE, ABM, id), \
171 SRI_ARR(DC_ABM1_HG_MISC_CTRL, ABM, id), \
172 SRI_ARR(DC_ABM1_IPCSC_COEFF_SEL, ABM, id), \
173 SRI_ARR(BL1_PWM_CURRENT_ABM_LEVEL, ABM, id), \
174 SRI_ARR(BL1_PWM_TARGET_ABM_LEVEL, ABM, id), \
175 SRI_ARR(BL1_PWM_USER_LEVEL, ABM, id), \
176 SRI_ARR(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, ABM, id), \
[all …]
/Linux-v6.1/drivers/staging/media/atomisp/pci/
Disp2401_input_system_private.h27 static inline hrt_data ibuf_ctrl_reg_load(const ibuf_ctrl_ID_t ID, in ibuf_ctrl_reg_load() argument
30 assert(ID < N_IBUF_CTRL_ID); in ibuf_ctrl_reg_load()
31 assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); in ibuf_ctrl_reg_load()
32 return ia_css_device_load_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data)); in ibuf_ctrl_reg_load()
36 static inline void ibuf_ctrl_reg_store(const ibuf_ctrl_ID_t ID, in ibuf_ctrl_reg_store() argument
40 assert(ID < N_IBUF_CTRL_ID); in ibuf_ctrl_reg_store()
41 assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); in ibuf_ctrl_reg_store()
43 ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in ibuf_ctrl_reg_store()
47 static inline void ibuf_ctrl_get_proc_state(const ibuf_ctrl_ID_t ID, in ibuf_ctrl_get_proc_state() argument
57 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_ITEMS_PER_STORE); in ibuf_ctrl_get_proc_state()
[all …]
/Linux-v6.1/Documentation/userspace-api/media/v4l/
Dbayer.svg3 …id="svg2" width="164.15mm" height="46.771mm" fill-rule="evenodd" stroke-linejoin="round" stroke-wi…
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Dnv12mt_example.svg17 id="svg2"
21 id="metadata953"><rdf:RDF><cc:Work
34 id="namedview951"
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Dnv12mt.svg17 id="svg2"
21 id="metadata383"><rdf:RDF><cc:Work
34 id="namedview381"
48 id="defs4"><clipPath
49 id="presentation_clip_path"
55 id="rect7" /></clipPath></defs><defs
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/Linux-v6.1/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
Dfifo_monitor.c44 const fifo_monitor_ID_t ID,
49 const fifo_monitor_ID_t ID,
54 const fifo_monitor_ID_t ID, in fifo_channel_get_state() argument
63 state->src_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
66 state->fifo_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
69 state->fifo_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
72 state->sink_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
77 state->src_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
80 state->fifo_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
83 state->fifo_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
[all …]
Dirq.c25 const irq_ID_t ID);
28 const irq_ID_t ID);
60 const irq_ID_t ID) in irq_clear_all() argument
64 assert(ID < N_IRQ_ID); in irq_clear_all()
65 assert(IRQ_N_CHANNEL[ID] <= HRT_DATA_WIDTH); in irq_clear_all()
67 if (IRQ_N_CHANNEL[ID] < HRT_DATA_WIDTH) { in irq_clear_all()
68 mask = ~((~(hrt_data)0) >> IRQ_N_CHANNEL[ID]); in irq_clear_all()
71 irq_reg_store(ID, in irq_clear_all()
80 const irq_ID_t ID, in irq_enable_channel() argument
83 unsigned int mask = irq_reg_load(ID, in irq_enable_channel()
[all …]
Dinput_formatter.c61 const input_formatter_ID_t ID) in input_formatter_rst() argument
66 assert(ID < N_INPUT_FORMATTER_ID); in input_formatter_rst()
68 addr = HIVE_IF_SRST_ADDRESS[ID]; in input_formatter_rst()
69 rst = HIVE_IF_SRST_MASK[ID]; in input_formatter_rst()
75 if (!HIVE_IF_BIN_COPY[ID]) { in input_formatter_rst()
76 input_formatter_reg_store(ID, addr, rst); in input_formatter_rst()
83 const input_formatter_ID_t ID) in input_formatter_get_alignment() argument
85 assert(ID < N_INPUT_FORMATTER_ID); in input_formatter_get_alignment()
87 return input_formatter_alignment[ID]; in input_formatter_get_alignment()
91 const input_formatter_ID_t ID, in input_formatter_set_fifo_blocking_mode() argument
[all …]
Dsp_private.h26 const sp_ID_t ID, in sp_ctrl_store() argument
30 assert(ID < N_SP_ID); in sp_ctrl_store()
31 assert(SP_CTRL_BASE[ID] != (hrt_address)-1); in sp_ctrl_store()
32 ia_css_device_store_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in sp_ctrl_store()
37 const sp_ID_t ID, in sp_ctrl_load() argument
40 assert(ID < N_SP_ID); in sp_ctrl_load()
41 assert(SP_CTRL_BASE[ID] != (hrt_address)-1); in sp_ctrl_load()
42 return ia_css_device_load_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data)); in sp_ctrl_load()
46 const sp_ID_t ID, in sp_ctrl_getbit() argument
50 hrt_data val = sp_ctrl_load(ID, reg); in sp_ctrl_getbit()
[all …]
Dgp_device.c24 const gp_device_ID_t ID, in gp_device_get_state() argument
27 assert(ID < N_GP_DEVICE_ID); in gp_device_get_state()
30 state->syncgen_enable = gp_device_reg_load(ID, in gp_device_get_state()
32 state->syncgen_free_running = gp_device_reg_load(ID, in gp_device_get_state()
34 state->syncgen_pause = gp_device_reg_load(ID, in gp_device_get_state()
36 state->nr_frames = gp_device_reg_load(ID, in gp_device_get_state()
38 state->syngen_nr_pix = gp_device_reg_load(ID, in gp_device_get_state()
40 state->syngen_nr_pix = gp_device_reg_load(ID, in gp_device_get_state()
42 state->syngen_nr_lines = gp_device_reg_load(ID, in gp_device_get_state()
44 state->syngen_hblank_cycles = gp_device_reg_load(ID, in gp_device_get_state()
[all …]
Disp.c28 const isp_ID_t ID, in cnd_isp_irq_enable() argument
32 isp_ctrl_setbit(ID, ISP_IRQ_READY_REG, ISP_IRQ_READY_BIT); in cnd_isp_irq_enable()
34 isp_ctrl_setbit(ID, ISP_IRQ_CLEAR_REG, ISP_IRQ_CLEAR_BIT); in cnd_isp_irq_enable()
36 isp_ctrl_clearbit(ID, ISP_IRQ_READY_REG, in cnd_isp_irq_enable()
43 const isp_ID_t ID, in isp_get_state() argument
47 hrt_data sc = isp_ctrl_load(ID, ISP_SC_REG); in isp_get_state()
58 state->pc = isp_ctrl_load(ID, ISP_PC_REG); in isp_get_state()
60 state->is_broken = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_BROKEN_BIT); in isp_get_state()
61 state->is_idle = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_IDLE_BIT); in isp_get_state()
62 state->is_sleeping = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_SLEEPING_BIT); in isp_get_state()
[all …]
/Linux-v6.1/drivers/staging/media/atomisp/pci/css_2401_system/host/
Dpixelgen_private.h33 const pixelgen_ID_t ID, in pixelgen_ctrl_reg_load() argument
36 assert(ID < N_PIXELGEN_ID); in pixelgen_ctrl_reg_load()
37 assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address) - 1); in pixelgen_ctrl_reg_load()
38 return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof( in pixelgen_ctrl_reg_load()
47 const pixelgen_ID_t ID, in pixelgen_ctrl_reg_store() argument
51 assert(ID < N_PIXELGEN_ID); in pixelgen_ctrl_reg_store()
52 assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1); in pixelgen_ctrl_reg_store()
54 ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data), in pixelgen_ctrl_reg_store()
70 const pixelgen_ID_t ID, in pixelgen_ctrl_get_state() argument
74 pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_IDX); in pixelgen_ctrl_get_state()
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Dcsi_rx_private.h38 const csi_rx_frontend_ID_t ID, in csi_rx_fe_ctrl_reg_load() argument
41 assert(ID < N_CSI_RX_FRONTEND_ID); in csi_rx_fe_ctrl_reg_load()
42 assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); in csi_rx_fe_ctrl_reg_load()
43 return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof( in csi_rx_fe_ctrl_reg_load()
52 const csi_rx_frontend_ID_t ID, in csi_rx_fe_ctrl_reg_store() argument
56 assert(ID < N_CSI_RX_FRONTEND_ID); in csi_rx_fe_ctrl_reg_store()
57 assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); in csi_rx_fe_ctrl_reg_store()
59 ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data), in csi_rx_fe_ctrl_reg_store()
68 const csi_rx_backend_ID_t ID, in csi_rx_be_ctrl_reg_load() argument
71 assert(ID < N_CSI_RX_BACKEND_ID); in csi_rx_be_ctrl_reg_load()
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/Linux-v6.1/tools/testing/selftests/drivers/net/netdevsim/
Dnexthop.sh81 count=$($IP nexthop bucket show id $group_id nhid $nhid |
117 $IP nexthop add id 1 via 192.0.2.2 dev dummy1
118 nexthop_check "id 1" "id 1 via 192.0.2.2 dev dummy1 scope link trap"
124 $IP nexthop del id 1
137 $IP nexthop add id 1 via 192.0.2.2 dev dummy1
139 $IP nexthop add id 2 via 192.0.2.3 dev dummy1 &> /dev/null
155 $IP nexthop add id 1 via 192.0.2.2 dev dummy1
156 $IP nexthop add id 2 via 192.0.2.3 dev dummy1
158 $IP nexthop add id 10 group 1/2
159 nexthop_check "id 10" "id 10 group 1/2 trap"
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/Linux-v6.1/drivers/i2c/busses/
Di2c-sh7760.c114 struct cami2c *id = ptr; in sh7760_i2c_irq() local
115 struct i2c_msg *msg = id->msg; in sh7760_i2c_irq()
119 msr = IN32(id, I2CMSR); in sh7760_i2c_irq()
120 fsr = IN32(id, I2CFSR); in sh7760_i2c_irq()
124 OUT32(id, I2CMCR, 0); in sh7760_i2c_irq()
125 OUT32(id, I2CSCR, 0); in sh7760_i2c_irq()
126 OUT32(id, I2CSAR, 0); in sh7760_i2c_irq()
127 id->status |= IDS_DONE | IDS_ARBLOST; in sh7760_i2c_irq()
139 OUT32(id, I2CFCR, FCR_RFRST | FCR_TFRST); in sh7760_i2c_irq()
140 OUT32(id, I2CMCR, MCR_MIE | MCR_FSB); in sh7760_i2c_irq()
[all …]
Di2c-cadence.c135 #define cdns_i2c_readreg(offset) readl_relaxed(id->membase + offset)
136 #define cdns_i2c_writereg(val, offset) writel_relaxed(val, id->membase + offset)
229 * @id: Pointer to driver data struct
233 static void cdns_i2c_clear_bus_hold(struct cdns_i2c *id) in cdns_i2c_clear_bus_hold() argument
240 static inline bool cdns_is_holdquirk(struct cdns_i2c *id, bool hold_wrkaround) in cdns_is_holdquirk() argument
243 (id->curr_recv_count == CDNS_I2C_FIFO_DEPTH + 1)); in cdns_is_holdquirk()
247 static void cdns_i2c_set_mode(enum cdns_i2c_mode mode, struct cdns_i2c *id) in cdns_i2c_set_mode() argument
256 id->dev_mode = mode; in cdns_i2c_set_mode()
257 id->slave_state = CDNS_I2C_SLAVE_STATE_IDLE; in cdns_i2c_set_mode()
262 cdns_i2c_writereg(id->ctrl_reg_diva_divb | in cdns_i2c_set_mode()
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/Linux-v6.1/Documentation/userspace-api/media/
Dtypical_media_device.svg3 …id="svg2" width="235mm" height="179mm" clip-path="url(#a)" fill-rule="evenodd" stroke-linejoin="ro…
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/Linux-v6.1/Documentation/userspace-api/media/dvb/
Ddvbstb.svg3 …id="svg2" width="15.847cm" height="8.4187cm" fill-rule="evenodd" stroke-linejoin="round" stroke-wi…
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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce/
Ddce_link_encoder.h39 #define AUX_REG_LIST(id)\ argument
40 SRI(AUX_CONTROL, DP_AUX, id), \
41 SRI(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \
42 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id)
44 #define HPD_REG_LIST(id)\ argument
45 SRI(DC_HPD_CONTROL, HPD, id)
47 #define LE_COMMON_REG_LIST_BASE(id) \ argument
52 SRI(DIG_BE_CNTL, DIG, id), \
53 SRI(DIG_BE_EN_CNTL, DIG, id), \
54 SRI(DP_CONFIG, DP, id), \
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dpp.h33 #define DPP_REG_LIST_DCN30_COMMON(id)\ argument
34 SRI(CM_DEALPHA, CM, id),\
35 SRI(CM_MEM_PWR_STATUS, CM, id),\
36 SRI(CM_BIAS_CR_R, CM, id),\
37 SRI(CM_BIAS_Y_G_CB_B, CM, id),\
38 SRI(PRE_DEGAM, CNVC_CFG, id),\
39 SRI(CM_GAMCOR_CONTROL, CM, id),\
40 SRI(CM_GAMCOR_LUT_CONTROL, CM, id),\
41 SRI(CM_GAMCOR_LUT_INDEX, CM, id),\
42 SRI(CM_GAMCOR_LUT_INDEX, CM, id),\
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/bios/
Dbios_parser_common.c63 enum object_enum_id id; in enum_id_from_bios_object_id() local
67 id = ENUM_ID_1; in enum_id_from_bios_object_id()
70 id = ENUM_ID_2; in enum_id_from_bios_object_id()
73 id = ENUM_ID_3; in enum_id_from_bios_object_id()
76 id = ENUM_ID_4; in enum_id_from_bios_object_id()
79 id = ENUM_ID_5; in enum_id_from_bios_object_id()
82 id = ENUM_ID_6; in enum_id_from_bios_object_id()
85 id = ENUM_ID_7; in enum_id_from_bios_object_id()
88 id = ENUM_ID_UNKNOWN; in enum_id_from_bios_object_id()
92 return id; in enum_id_from_bios_object_id()
[all …]
/Linux-v6.1/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/
Dsp_public.h25 /*! Enable or disable the program complete irq signal of SP[ID]
27 \param ID[in] SP identifier
30 \return none, if(cnd) enable(SP[ID].irq) else disable(SP[ID].irq)
33 const sp_ID_t ID,
36 /*! Read the state of cell SP[ID]
38 \param ID[in] SP identifier
42 \return none, state = SP[ID].state, stall = SP[ID].stall
45 const sp_ID_t ID,
49 /*! Write to the status and control register of SP[ID]
51 \param ID[in] SP identifier
[all …]
/Linux-v6.1/scripts/
Dextract_xc3028.pl163 # Firmware 0, type: BASE FW F8MHZ (0x00000003), id: (0000000000000000), size: 6635
167 write_le64(0x00000000, 0x00000000); # ID
172 # Firmware 1, type: BASE FW F8MHZ MTS (0x00000007), id: (0000000000000000), size: 6635
176 write_le64(0x00000000, 0x00000000); # ID
181 # Firmware 2, type: BASE FW FM (0x00000401), id: (0000000000000000), size: 6525
185 write_le64(0x00000000, 0x00000000); # ID
190 # Firmware 3, type: BASE FW FM INPUT1 (0x00000c01), id: (0000000000000000), size: 6539
194 write_le64(0x00000000, 0x00000000); # ID
199 # Firmware 4, type: BASE FW (0x00000001), id: (0000000000000000), size: 6633
203 write_le64(0x00000000, 0x00000000); # ID
[all …]
/Linux-v6.1/tools/testing/selftests/net/
Dfib_nexthops.sh328 run_cmd "$IP nexthop add id $nhidstr via $ipstr$iter dev veth1"
329 check_nexthop "id $nhidstr" "id $nhidstr via $ipstr$iter dev veth1 scope link"
344 run_cmd "$IP nexthop add id $grpidstr group $grpstr"
345 check_nexthop "id $grpidstr" "id $grpidstr group $grpstr"
367 run_cmd "$IP nexthop add id 100 via $ipstr dev veth1"
368 run_cmd "$IP nexthop add id 1000 group 100 type resilient buckets $buckets"
432 run_cmd "$IP nexthop add id 61 via 2001:db8:91::2 fdb"
433 run_cmd "$IP nexthop add id 62 via 2001:db8:91::3 fdb"
434 run_cmd "$IP nexthop add id 102 group 61/62 fdb"
435 check_nexthop "id 102" "id 102 group 61/62 fdb"
[all …]
/Linux-v6.1/Documentation/filesystems/
Didmappings.rst24 we're talking about an id in the upper or lower idmapset.
58 and id ``k11000`` which has been generated by the first idmapping by mapping
62 what id ``k11000`` corresponds to in the second or third idmapping. The
79 an id mapped. We can simply say that ``u1000`` is unmapped in the second and
83 The algorithm to calculate what a given id maps to is pretty simple. First, we
84 need to verify that the range can contain our target id. We will skip this step
85 for simplicity. After that if we want to know what ``id`` maps to we can do
91 id - u + k = n
96 id - k + u = n
108 want to know what id this was mapped from in the upper idmapset of the first
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