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/Linux-v5.15/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra20-i2c.txt1 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
11 controller. This only support master mode of I2C communication. Register
12 interface/offset and interrupts handling are different than generic I2C
13 controller. Driver of DVC I2C controller is only compatible with
14 "nvidia,tegra20-i2c-dvc".
[all …]
Dsnps,designware-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB I2C Controller
10 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
[all …]
Di2c-pxa-pci-ce4100.txt1 CE4100 I2C
2 ----------
4 CE4100 has one PCI device which is described as the I2C-Controller. This
5 PCI device has three PCI-bars, each bar contains a complete I2C
6 controller. So we have a total of three independent I2C-Controllers
8 The driver is probed via the PCI-ID and is gathering the information of
10 Grant Likely recommended to use the ranges property to map the PCI-Bar
12 of the specific I2C controller. This were his exact words:
22 non-zero if you had 2 or more devices mapped off
30 ------------------------------------------------
[all …]
Di2c-s3c2410.txt1 * Samsung's I2C controller
3 The Samsung's I2C controller is used to interface with I2C devices.
6 - compatible: value should be either of the following.
7 (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c.
8 (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c.
9 (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used
11 (d) "samsung, exynos5-sata-phy-i2c", for s3c2440-like i2c used as
12 a host to SATA PHY controller on an internal bus.
13 - reg: physical base address of the controller and length of memory mapped
15 - interrupts: interrupt number to the cpu.
[all …]
Di2c-pxa.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-pxa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP I2C controller bindings
10 - Rob Herring <robh+dt@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
17 - mrvl,i2c-polling
20 - interrupts
[all …]
Di2c-owl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-owl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Actions Semi Owl I2C Controller
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 This I2C controller is found in the Actions Semi Owl SoCs:
17 - $ref: /schemas/i2c/i2c-controller.yaml#
22 - actions,s500-i2c # Actions Semi S500 compatible SoCs
23 - actions,s700-i2c # Actions Semi S700 compatible SoCs
[all …]
Di2c-ocores.txt1 Device tree configuration for i2c-ocores
4 - compatible : "opencores,i2c-ocores"
6 "sifive,fu540-c000-i2c", "sifive,i2c0"
7 For Opencore based I2C IP block reimplemented in
8 FU540-C000 SoC.
9 "sifive,fu740-c000-i2c", "sifive,i2c0"
10 For Opencore based I2C IP block reimplemented in
11 FU740-C000 SoC.
12 Please refer to sifive-blocks-ip-versioning.txt for
14 - reg : bus address start and address range size of device
[all …]
Dbrcm,iproc-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/brcm,iproc-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom iProc I2C controller
10 - Rafał Miłecki <rafal@milecki.pl>
15 - brcm,iproc-i2c
16 - brcm,iproc-nic-i2c
21 clock-frequency:
26 Should contain the I2C interrupt. For certain revisions of the I2C
[all …]
Dcdns,i2c-r1p10.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Cadence I2C controller Device Tree Bindings
10 - Michal Simek <michal.simek@xilinx.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - cdns,i2c-r1p10 # cadence i2c controller version 1.0
19 - cdns,i2c-r1p14 # cadence i2c controller version 1.4
30 clock-frequency:
[all …]
Di2c-rk3x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
[all …]
Dnuvoton,npcm7xx-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: nuvoton NPCM7XX I2C Controller Device Tree Bindings
10 The NPCM750x includes sixteen I2C bus controllers. All Controllers support
11 both master and slave mode. Each controller can switch between master and slave
12 at run time (i.e. IPMB mode). Each controller has two 16 byte HW FIFO for TX and
16 - Tali Perry <tali.perry1@gmail.com>
20 const: nuvoton,npcm750-i2c
[all …]
Di2c-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
10 - Oleksij Rempel <o.rempel@pengutronix.de>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: fsl,imx1-i2c
19 - const: fsl,imx21-i2c
20 - const: fsl,vf610-i2c
[all …]
Dingenic,i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/ingenic,i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs I2C controller devicetree bindings
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
17 pattern: "^i2c@[0-9a-f]+$"
21 - enum:
22 - ingenic,jz4770-i2c
[all …]
Di2c-mux-gpmux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: General Purpose I2C Bus Mux
10 - Peter Rosin <peda@axentia.se>
13 This binding describes an I2C bus multiplexer that uses a mux controller
14 from the mux subsystem to route the I2C signals.
16 .-----. .-----.
18 .------------. '-----' '-----'
[all …]
Dnvidia,tegra186-bpmp-i2c.txt1 NVIDIA Tegra186 BPMP I2C controller
4 devices, such as the I2C controller for the power management I2C bus. Software
6 transactions on that I2C bus. This binding describes an I2C bus that is
9 The BPMP I2C node must be located directly inside the main BPMP node. See
10 ../firmware/nvidia,tegra186-bpmp.txt for details of the BPMP binding.
12 This node represents an I2C controller. See ../i2c/i2c.txt for details of the
13 core I2C binding.
16 - compatible:
19 - "nvidia,tegra186-bpmp-i2c".
20 - #address-cells: Address cells for I2C device address.
[all …]
Di2c-mux-pca954x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-pca954x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PCA954x I2C bus switch
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 The binding supports NXP PCA954x and PCA984x I2C mux/switch devices.
16 - $ref: /schemas/i2c/i2c-mux.yaml#
21 - enum:
22 - nxp,pca9540
[all …]
Di2c-mt65xx.txt1 * MediaTek's I2C controller
3 The MediaTek's I2C controller is used to interface with I2C devices.
6 - compatible: value should be either of the following.
7 "mediatek,mt2701-i2c", "mediatek,mt6577-i2c": for MediaTek MT2701
8 "mediatek,mt2712-i2c": for MediaTek MT2712
9 "mediatek,mt6577-i2c": for MediaTek MT6577
10 "mediatek,mt6589-i2c": for MediaTek MT6589
11 "mediatek,mt6797-i2c", "mediatek,mt6577-i2c": for MediaTek MT6797
12 "mediatek,mt7622-i2c": for MediaTek MT7622
13 "mediatek,mt7623-i2c", "mediatek,mt6577-i2c": for MediaTek MT7623
[all …]
/Linux-v5.15/drivers/i2c/busses/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 menu "I2C Hardware Bus support"
9 comment "PC SMBus host controller drivers"
17 Host controller on Acer Labs Inc. (ALI) M1535 South Bridges. The SMB
18 controller is part of the 7101 device, which is an ACPI-compliant
22 will be called i2c-ali1535.
29 Host controller on Acer Labs Inc. (ALI) M1563 South Bridges. The SMB
30 controller is part of the 7101 device, which is an ACPI-compliant
34 will be called i2c-ali1563.
41 Acer Labs Inc. (ALI) M1514 and M1543 motherboard I2C interfaces.
[all …]
/Linux-v5.15/drivers/clk/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
40 tristate "MSM8916 APCS Clock Controller"
43 Support for the APCS Clock Controller on msm8916 devices. The
49 tristate "MSM8996 CPU Clock Controller"
53 Support for the CPU clock controller on msm8996 devices.
58 tristate "SDX55 APCS Clock Controller"
61 Support for the APCS Clock Controller on SDX55 platform. The
67 tristate "RPM based Clock Controller"
80 tristate "RPM over SMD based Clock Controller"
102 tristate "APQ8084 Global Clock Controller"
[all …]
/Linux-v5.15/drivers/input/touchscreen/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 support for the built-in touchscreen.
25 module will be called 88pm860x-ts.
33 ADS7846/TSC2046/AD7873 or ADS7843/AD7843 controller,
34 and your board-specific setup code includes that in its
51 AD7877 controller, and your board-specific initialization
60 tristate "Analog Devices AD7879-1/AD7889-1 touchscreen interface"
63 the AD7879-1/AD7889-1 controller.
71 tristate "support I2C bus connection"
72 depends on TOUCHSCREEN_AD7879 && I2C
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/
Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Trivial I2C and SPI devices that have simple device tree bindings
10 - Rob Herring <robh@kernel.org>
13 This is a list of trivial I2C and SPI devices that have simple device tree
27 spi-max-frequency: true
31 - enum:
32 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
[all …]
/Linux-v5.15/include/linux/i3c/
Dmaster.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include <linux/i2c.h>
31 * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
32 * @node: node element used to insert the slot into the I2C or I3C device
35 * I2C/I3C transfers
39 * This structure is describing common I3C/I2C dev information.
54 * struct i2c_dev_boardinfo - I2C device board information
55 * @node: used to insert the boardinfo object in the I2C boardinfo list
56 * @base: regular I2C board information
58 * the I2C device limitations
[all …]
/Linux-v5.15/drivers/mfd/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 tristate "Active-semi ACT8945A"
47 depends on I2C && OF
49 Support for the ACT8945A PMIC from Active-semi. This device
50 features three step-down DC/DC converters and four low-dropout
66 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
69 called sun4i-gpadc.
76 depends on I2C=y
85 depends on I2C=y && OF
88 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/soc/qcom/
Dqcom,geni-se.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: GENI Serial Engine QUP Wrapper Controller
10 - Mukesh Savaliya <msavaliy@codeaurora.org>
11 - Akash Asthana <akashast@codeaurora.org>
16 like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial
18 Wrapper controller is modeled as a node with zero or more child nodes each
24 - qcom,geni-se-qup
[all …]
/Linux-v5.15/arch/arm/mach-s3c/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
5 source "arch/arm/mach-s3c/Kconfig.s3c24xx"
6 source "arch/arm/mach-s3c/Kconfig.s3c64xx"
33 int "S3C UART to use for low-level messages"
37 Choice of which UART port to use for the low-level messages,
40 must have been initialised by the boot-loader before use.
110 Compile in platform device definitions for I2C channel 1
115 Compile in platform device definitions for I2C channel 2
120 Compile in platform device definition for I2C controller 3
125 Compile in platform device definition for I2C controller 4
[all …]

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