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/Linux-v5.10/arch/arm/boot/dts/
Dhip01-ca9x2.dts3 * Hisilicon Ltd. HiP01 SoC
16 #include "hip01.dtsi"
19 model = "Hisilicon HIP01 Development Board";
20 compatible = "hisilicon,hip01-ca9x2", "hisilicon,hip01";
25 enable-method = "hisilicon,hip01-smp";
Dhip01.dtsi3 * Hisilicon Ltd. HiP01 SoC
86 compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
DMakefile235 hip01-ca9x2.dtb
/Linux-v5.10/Documentation/devicetree/bindings/arm/hisilicon/controller/
Dsysctrl.yaml16 There are some variants of the Hisilicon system controller, such as HiP01,
19 offset. In addition, the HiP01 system controller has some specific control
20 registers for HIP01 SoC family, such as slave core boot.
24 HiP01 system controller --> hisilicon,hip01-sysctrl
48 - const: hisilicon,hip01-sysctrl
113 /* HiP01 system controller */
115 compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
/Linux-v5.10/Documentation/devicetree/bindings/arm/hisilicon/
Dhisilicon.yaml42 - description: HiP01 based boards.
44 - const: hisilicon,hip01-ca9x2
45 - const: hisilicon,hip01
/Linux-v5.10/arch/arm/mach-hisi/
DKconfig28 bool "Hisilicon HIP01 family"
34 Support for Hisilicon HIP01 SoC family
Dplatsmp.c159 node = of_find_compatible_node(NULL, NULL, "hisilicon,hip01-sysctrl"); in hip01_boot_secondary()
183 CPU_METHOD_OF_DECLARE(hip01_smp, "hisilicon,hip01-smp", &hip01_smp_ops);
Dhotplug.c229 np = of_find_compatible_node(NULL, NULL, "hisilicon,hip01-sysctrl"); in hip01_set_cpu()
/Linux-v5.10/arch/arm/
DKconfig.debug358 bool "Hisilicon Hip01 Debug UART"
363 on HIP01 UART.