Searched full:hantro (Results 1 – 25 of 39) sorted by relevance
12
3 tristate "Hantro VPU driver"13 Support for the Hantro IP based Video Processing Units present on17 will be called hantro-vpu.20 bool "Hantro VPU i.MX8M support"28 bool "Hantro VDEC SAMA5D4 support"36 bool "Hantro VPU Rockchip support"
3 obj-$(CONFIG_VIDEO_HANTRO) += hantro-vpu.o5 hantro-vpu-y += \25 hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \28 hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \31 hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \
3 * Hantro VPU codec driver19 #include "hantro.h"
3 * Hantro VPU codec driver11 #include "hantro.h"
3 * Hantro VPU codec driver8 #include "hantro.h"
3 * Hantro VDEC driver8 #include "hantro.h"
3 * Hantro G1 post-processor support11 #include "hantro.h"
3 * Hantro VPU codec driver28 #include "hantro.h"
3 * Hantro VPU codec driver28 #include "hantro.h"31 #define DRIVER_NAME "hantro-vpu"454 .name = "Hantro HEVC slice header skip bytes",1073 MODULE_DESCRIPTION("Hantro VPU codec driver");
3 * Hantro VPU HEVC codec driver11 #include "hantro.h"
3 * Hantro VPU codec driver125 * struct hantro_func - Hantro VPU functionality
3 Hantro video decoder driver6 The Hantro video decoder driver implements the following driver-specific controls:9 Specifies to Hantro HEVC video decoder driver the number of data (in bits) to
36 hantro
8 title: Hantro G1 VPU codec implemented on Microchip SAMA5D4 SoCs14 Hantro G1 video decode accelerator present on Microchip SAMA5D4 SoCs.
8 title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs14 Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs.
8 title: Hantro G1 VPU codecs implemented on Rockchip SoCs14 Hantro G1 video encode and decode accelerators present on Rockchip SoCs.
10 obj-$(CONFIG_VIDEO_HANTRO) += hantro/
25 source "drivers/staging/media/hantro/Kconfig"
228 /* MPEG-class control IDs specific to the Hantro driver as defined by V4L2 */
