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/Linux-v5.10/drivers/spi/
Dspi-fsl-espi.c3 * Freescale eSPI controller driver.
22 /* eSPI Controller registers */
23 #define ESPI_SPMODE 0x00 /* eSPI mode register */
24 #define ESPI_SPIE 0x04 /* eSPI event register */
25 #define ESPI_SPIM 0x08 /* eSPI mask register */
26 #define ESPI_SPCOM 0x0c /* eSPI command register */
27 #define ESPI_SPITF 0x10 /* eSPI transmit FIFO access register*/
28 #define ESPI_SPIRF 0x14 /* eSPI receive FIFO access register*/
29 #define ESPI_SPMODE0 0x20 /* eSPI cs0 mode register */
33 /* eSPI Controller mode register definitions */
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Dspi-ep93xx.c115 struct ep93xx_spi *espi = spi_master_get_devdata(master); in ep93xx_spi_calc_divisors() local
116 unsigned long spi_clk_rate = clk_get_rate(espi->clk); in ep93xx_spi_calc_divisors()
150 struct ep93xx_spi *espi = spi_master_get_devdata(master); in ep93xx_spi_chip_setup() local
173 writel(div_cpsr, espi->mmio + SSPCPSR); in ep93xx_spi_chip_setup()
174 writel(cr0, espi->mmio + SSPCR0); in ep93xx_spi_chip_setup()
181 struct ep93xx_spi *espi = spi_master_get_devdata(master); in ep93xx_do_write() local
187 val = ((u16 *)xfer->tx_buf)[espi->tx]; in ep93xx_do_write()
188 espi->tx += 2; in ep93xx_do_write()
191 val = ((u8 *)xfer->tx_buf)[espi->tx]; in ep93xx_do_write()
192 espi->tx += 1; in ep93xx_do_write()
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Dspi-fsl-lib.h3 * Freescale SPI/eSPI controller driver library.
19 /* SPI/eSPI Controller driver's private data. */
Dspi-fsl-lib.c3 * Freescale SPI/eSPI controller driver library.
/Linux-v5.10/drivers/net/ethernet/chelsio/cxgb/
Despi.c3 * File: espi.c *
41 #include "espi.h"
88 pr_err("%s: ESPI clock not ready\n", adapter->name); in tricn_init()
117 void t1_espi_intr_enable(struct peespi *espi) in t1_espi_intr_enable() argument
119 u32 enable, pl_intr = readl(espi->adapter->regs + A_PL_ENABLE); in t1_espi_intr_enable()
122 * Cannot enable ESPI interrupts on T1B because HW asserts the in t1_espi_intr_enable()
123 * interrupt incorrectly, namely the driver gets ESPI interrupts in t1_espi_intr_enable()
124 * but no data is actually dropped (can verify this reading the ESPI in t1_espi_intr_enable()
125 * drop registers). Also, once the ESPI interrupt is asserted it in t1_espi_intr_enable()
128 enable = t1_is_T1B(espi->adapter) ? 0 : ESPI_INTR_MASK; in t1_espi_intr_enable()
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Despi.h3 * File: espi.h *
55 void t1_espi_destroy(struct peespi *espi);
56 int t1_espi_init(struct peespi *espi, int mac_type, int nports);
62 const struct espi_intr_counts *t1_espi_get_intr_counts(struct peespi *espi);
Dsubr.c46 #include "espi.h"
763 if (adapter->espi) { in t1_interrupts_enable()
765 t1_espi_intr_enable(adapter->espi); in t1_interrupts_enable()
795 if (adapter->espi) in t1_interrupts_disable()
796 t1_espi_intr_disable(adapter->espi); in t1_interrupts_disable()
821 if (adapter->espi) in t1_interrupts_clear()
822 t1_espi_intr_clear(adapter->espi); in t1_interrupts_clear()
857 t1_espi_intr_handler(adapter->espi); in asic_slow_intr()
975 if (adapter->espi && t1_espi_init(adapter->espi, bi->chip_mac, in t1_init_hw_modules()
1026 if (adapter->espi) in t1_free_sw_modules()
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DMakefile9 cxgb-objs := cxgb2.o espi.o tp.o pm3393.o sge.o subr.o \
/Linux-v5.10/Documentation/devicetree/bindings/spi/
Dfsl-spi.txt39 * eSPI (Enhanced Serial Peripheral Interface)
42 - compatible : should be "fsl,mpc8536-espi".
44 - interrupts : should contain eSPI interrupt, the device has one interrupt.
45 - fsl,espi-num-chipselects : the number of the chipselect signals.
55 compatible = "fsl,mpc8536-espi";
59 fsl,espi-num-chipselects = <4>;
/Linux-v5.10/arch/powerpc/boot/dts/fsl/
Dpq3-espi-0.dtsi2 * PQ3 eSPI device tree stub [ controller @ offset 0x7000 ]
38 compatible = "fsl,mpc8536-espi";
Dqoriq-espi-0.dtsi2 * QorIQ eSPI device tree stub [ controller @ offset 0x110000 ]
38 compatible = "fsl,mpc8536-espi";
Dbsc9131si-post.dtsi85 /include/ "pq3-espi-0.dtsi"
87 fsl,espi-num-chipselects = <1>;
Dc293si-post.dtsi98 /include/ "pq3-espi-0.dtsi"
100 fsl,espi-num-chipselects = <1>;
Dp1020si-post.dtsi129 /include/ "pq3-espi-0.dtsi"
131 fsl,espi-num-chipselects = <4>;
Dbsc9132si-post.dtsi114 /include/ "pq3-espi-0.dtsi"
116 fsl,espi-num-chipselects = <1>;
Dp1010si-post.dtsi127 /include/ "pq3-espi-0.dtsi"
129 fsl,espi-num-chipselects = <1>;
Dp2020si-post.dtsi156 /include/ "pq3-espi-0.dtsi"
158 fsl,espi-num-chipselects = <4>;
Dp1021si-post.dtsi129 /include/ "pq3-espi-0.dtsi"
131 fsl,espi-num-chipselects = <4>;
Dmpc8536si-post.dtsi166 /include/ "pq3-espi-0.dtsi"
168 fsl,espi-num-chipselects = <4>;
Dp1022si-post.dtsi161 /include/ "pq3-espi-0.dtsi"
163 fsl,espi-num-chipselects = <4>;
Dp1023si-post.dtsi191 /include/ "pq3-espi-0.dtsi"
193 fsl,espi-num-chipselects = <4>;
/Linux-v5.10/Documentation/devicetree/bindings/pinctrl/
Daspeed,ast2600-pinctrl.yaml35 ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMC, ESPI, ESPIALT,
61 EMMCG8, ESPI, ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID, FWQSPID, FWSPIWP,
Daspeed,ast2500-pinctrl.yaml48 ESPI, FWSPICS1, FWSPICS2, GPID0, GPID2, GPID4, GPID6, GPIE0, GPIE2,
/Linux-v5.10/drivers/platform/chrome/wilco_ec/
DKconfig8 Wilco EC over an eSPI bus. This uses a simple byte-level protocol
/Linux-v5.10/drivers/pinctrl/nuvoton/
Dpinctrl-npcm7xx.c629 NPCM7XX_GRP(espi), \
772 NPCM7XX_SFUNC(espi);
890 NPCM7XX_MKFUNC(espi),
1022 NPCM7XX_PINCFG(95, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, 0),
1091 NPCM7XX_PINCFG(161, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, DS(8, 12)),
1093 NPCM7XX_PINCFG(163, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, 0),
1094 NPCM7XX_PINCFG(164, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC),
1095 NPCM7XX_PINCFG(165, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC),
1096 NPCM7XX_PINCFG(166, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC),
1097 NPCM7XX_PINCFG(167, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC),
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