Searched full:definition (Results 1 – 25 of 1740) sorted by relevance
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/Linux-v5.4/Documentation/devicetree/bindings/pci/ |
D | qcom,pcie.txt | 6 Definition: Value should contain 18 Definition: Register ranges as listed in the reg-names property 23 Definition: Must include the following entries 32 Definition: Should be "pci". As specified in designware-pcie.txt 37 Definition: Should be 3. As specified in designware-pcie.txt 42 Definition: Should be 2. As specified in designware-pcie.txt 47 Definition: As specified in designware-pcie.txt 52 Definition: MSI interrupt 57 Definition: Should contain "msi" 62 Definition: Should be 1. As specified in designware-pcie.txt [all …]
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/Linux-v5.4/Documentation/devicetree/bindings/sound/ |
D | qcom,wcd9335.txt | 14 Definition: For SLIMbus interface it should be "slimMID,PID", 24 Definition: Should be ('Device index', 'Instance ID') 29 Definition: Interrupts via WCD INTR1 and INTR2 pins 34 Definition: Interrupt names of WCD INTR1 and INTR2 40 Definition: Reset gpio line 45 Definition: SLIM interface device 50 Definition: See clock-bindings.txt section "consumers". List of 56 Definition: Must contain "mclk", "mclk2" and "slimbus" strings. 61 Definition: Should contain a reference to the 1.8V buck supply 66 Definition: Should contain a reference to the 1.8V SIDO buck supply [all …]
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/Linux-v5.4/Documentation/devicetree/bindings/remoteproc/ |
D | qcom,hexagon-v56.txt | 9 Definition: must be one of: 16 Definition: must specify the base address and size of the qdsp6ss register 21 Definition: must list the watchdog, fatal IRQs ready, handover and 27 Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" 32 Definition: List of phandles and clock specifier pairs for the Hexagon, 38 Definition: List of clock input name strings sorted in the same 39 order as the clocks property. Definition must have 47 Definition: List of clock input name strings sorted in the same 48 order as the clocks property. Definition must have 55 Definition: reference to cx power domain node. [all …]
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D | qcom,q6v5.txt | 9 Definition: must be one of: 20 Definition: must specify the base address and size of the qdsp6 and 26 Definition: must be "q6dsp" and "rmb" 31 Definition: reference to the interrupts that match interrupt-names 36 Definition: The interrupts needed depends on the the compatible 51 Definition: must list the relative firmware image paths for mba and 58 Definition: reference to the clocks that match clock-names 63 Definition: The clocks needed depend on the compatible string: 80 Definition: reference to the reset-controller for the modem sub-system 89 Definition: must be "mss_restart" for the modem sub-system [all …]
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D | qcom,wcnss-pil.txt | 9 Definition: must be one of: 17 Definition: must specify the base address and size of the CCU, DXE and 23 Definition: must be "ccu", "dxe", "pmu" 28 Definition: must list the watchdog and fatal IRQs and may specify the 34 Definition: should be "wdog", "fatal", optionally followed by "ready", 42 Definition: reference to the regulators to be held on behalf of the 48 Definition: reference to the SMEM state used to indicate to WCNSS that 54 Definition: should be "stop" 59 Definition: reference to reserved-memory node for the remote processor 69 Definition: must be one of: [all …]
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/Linux-v5.4/Documentation/devicetree/bindings/pinctrl/ |
D | qcom,mdm9615-pinctrl.txt | 9 Definition: must be "qcom,mdm9615-pinctrl" 14 Definition: the base address and size of the TLMM register space. 19 Definition: should specify the TLMM summary IRQ. 24 Definition: identifies this node as an interrupt controller 29 Definition: must be 2. Specifying the pin number and flags, as defined 35 Definition: identifies this node as a gpio controller 40 Definition: must be 2. Specifying the pin number and flags, as defined 45 Definition: see ../gpio/gpio.txt 49 Definition: see ../gpio/gpio.txt 83 Definition: List of gpio pins affected by the properties specified in [all …]
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D | qcom,pmic-mpp.txt | 9 Definition: Should contain one of: 28 Definition: Register base of the MPP block and length. 33 Definition: Must contain an array of encoded interrupt specifiers for 39 Definition: Mark the device node as a GPIO controller 44 Definition: Must be 2; 78 Definition: List of MPP pins affected by the properties specified in 88 Definition: Specify the alternative function to be configured for the 97 Definition: The specified pins should be configured as no pull. 102 Definition: The specified pins should be configured as pull up. 111 Definition: The specified pins will put in high-Z mode and disabled. [all …]
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D | qcom,pmic-gpio.txt | 9 Definition: must be one of: 33 Definition: Register base of the GPIO block and length. 38 Definition: Must contain an array of encoded interrupt specifiers for 44 Definition: Mark the device node as a GPIO controller 49 Definition: Must be 2; 84 Definition: List of gpio pins affected by the properties specified in 107 Definition: Specify the alternative function to be configured for the 124 Definition: The specified pins should be configured as no pull. 129 Definition: The specified pins should be configured as pull down. 134 Definition: The specified pins should be configured as pull up. [all …]
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D | qcom,apq8084-pinctrl.txt | 9 Definition: must be "qcom,apq8084-pinctrl" 14 Definition: the base address and size of the TLMM register space. 19 Definition: should specify the TLMM summary IRQ. 24 Definition: identifies this node as an interrupt controller 29 Definition: must be 2. Specifying the pin number and flags, as defined 35 Definition: identifies this node as a gpio controller 40 Definition: must be 2. Specifying the pin number and flags, as defined 45 Definition: see ../gpio/gpio.txt 49 Definition: see ../gpio/gpio.txt 83 Definition: List of gpio pins affected by the properties specified in [all …]
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D | qcom,ipq8074-pinctrl.txt | 9 Definition: must be "qcom,ipq8074-pinctrl" 14 Definition: the base address and size of the TLMM register space. 19 Definition: should specify the TLMM summary IRQ. 24 Definition: identifies this node as an interrupt controller 29 Definition: must be 2. Specifying the pin number and flags, as defined 35 Definition: identifies this node as a gpio controller 40 Definition: must be 2. Specifying the pin number and flags, as defined 45 Definition: see ../gpio/gpio.txt 49 Definition: see ../gpio/gpio.txt 83 Definition: List of gpio pins affected by the properties specified in [all …]
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D | qcom,msm8960-pinctrl.txt | 9 Definition: must be "qcom,msm8960-pinctrl" 14 Definition: the base address and size of the TLMM register space. 19 Definition: should specify the TLMM summary IRQ. 24 Definition: identifies this node as an interrupt controller 29 Definition: must be 2. Specifying the pin number and flags, as defined 35 Definition: identifies this node as a gpio controller 40 Definition: must be 2. Specifying the pin number and flags, as defined 45 Definition: see ../gpio/gpio.txt 49 Definition: see ../gpio/gpio.txt 83 Definition: List of gpio pins affected by the properties specified in [all …]
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D | qcom,sc7180-pinctrl.txt | 9 Definition: must be "qcom,sc7180-pinctrl" 14 Definition: the base address and size of the north, south and west 20 Definition: names for the cells of reg, must contain "north", "south" 26 Definition: should specify the TLMM summary IRQ. 31 Definition: identifies this node as an interrupt controller 36 Definition: must be 2. Specifying the pin number and flags, as defined 42 Definition: identifies this node as a gpio controller 47 Definition: must be 2. Specifying the pin number and flags, as defined 53 Definition: see ../gpio/gpio.txt 58 Definition: see ../gpio/gpio.txt [all …]
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D | qcom,sm8150-pinctrl.txt | 9 Definition: must be "qcom,sm8150-pinctrl" 14 Definition: the base address and size of the north, south, west 26 Definition: should specify the TLMM summary IRQ. 31 Definition: identifies this node as an interrupt controller 36 Definition: must be 2. Specifying the pin number and flags, as defined 42 Definition: identifies this node as a gpio controller 47 Definition: must be 2. Specifying the pin number and flags, as defined 53 Definition: see ../gpio/gpio.txt 58 Definition: see ../gpio/gpio.txt 92 Definition: List of gpio pins affected by the properties specified in [all …]
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D | qcom,msm8916-pinctrl.txt | 9 Definition: must be "qcom,msm8916-pinctrl" 14 Definition: the base address and size of the TLMM register space. 19 Definition: should specify the TLMM summary IRQ. 24 Definition: identifies this node as an interrupt controller 29 Definition: must be 2. Specifying the pin number and flags, as defined 35 Definition: identifies this node as a gpio controller 40 Definition: must be 2. Specifying the pin number and flags, as defined 45 Definition: see ../gpio/gpio.txt 49 Definition: see ../gpio/gpio.txt 83 Definition: List of gpio pins affected by the properties specified in [all …]
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D | qcom,msm8994-pinctrl.txt | 9 Definition: Should contain one of: 16 Definition: the base address and size of the TLMM register space. 21 Definition: should specify the TLMM summary IRQ. 26 Definition: identifies this node as an interrupt controller 31 Definition: must be 2. Specifying the pin number and flags, as defined 37 Definition: identifies this node as a gpio controller 42 Definition: must be 2. Specifying the pin number and flags, as defined 47 Definition: see ../gpio/gpio.txt 51 Definition: see ../gpio/gpio.txt 85 Definition: List of gpio pins affected by the properties specified in [all …]
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D | qcom,msm8998-pinctrl.txt | 9 Definition: must be "qcom,msm8998-pinctrl" 14 Definition: the base address and size of the TLMM register space. 19 Definition: should specify the TLMM summary IRQ. 24 Definition: identifies this node as an interrupt controller 29 Definition: must be 2. Specifying the pin number and flags, as defined 35 Definition: identifies this node as a gpio controller 40 Definition: must be 2. Specifying the pin number and flags, as defined 45 Definition: see ../gpio/gpio.txt 49 Definition: see ../gpio/gpio.txt 83 Definition: List of gpio pins affected by the properties specified in [all …]
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D | qcom,msm8996-pinctrl.txt | 9 Definition: must be "qcom,msm8996-pinctrl" 14 Definition: the base address and size of the TLMM register space. 19 Definition: should specify the TLMM summary IRQ. 24 Definition: identifies this node as an interrupt controller 29 Definition: must be 2. Specifying the pin number and flags, as defined 35 Definition: identifies this node as a gpio controller 40 Definition: must be 2. Specifying the pin number and flags, as defined 45 Definition: see ../gpio/gpio.txt 49 Definition: see ../gpio/gpio.txt 83 Definition: List of gpio pins affected by the properties specified in [all …]
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D | qcom,sdm660-pinctrl.txt | 9 Definition: must be "qcom,sdm660-pinctrl" or 15 Definition: the base address and size of the north, center and south 21 Definition: names for the cells of reg, must contain "north", "center" 27 Definition: should specify the TLMM summary IRQ. 32 Definition: identifies this node as an interrupt controller 37 Definition: must be 2. Specifying the pin number and flags, as defined 43 Definition: identifies this node as a gpio controller 48 Definition: Specifies the mapping between gpio controller and 54 Definition: must be 2. Specifying the pin number and flags, as defined 89 Definition: List of gpio pins affected by the properties specified in [all …]
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D | qcom,qcs404-pinctrl.txt | 9 Definition: must be "qcom,qcs404-pinctrl" 14 Definition: the base address and size of the north, south and east TLMM 26 Definition: should specify the TLMM summary IRQ. 31 Definition: identifies this node as an interrupt controller 36 Definition: must be 2. Specifying the pin number and flags, as defined 42 Definition: identifies this node as a gpio controller 47 Definition: must be 2. Specifying the pin number and flags, as defined 52 Definition: see ../gpio/gpio.txt 86 Definition: List of gpio pins affected by the properties specified in 103 Definition: Specify the alternative function to be configured for the [all …]
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D | qcom,sdm845-pinctrl.txt | 9 Definition: must be "qcom,sdm845-pinctrl" 14 Definition: the base address and size of the TLMM register space. 19 Definition: should specify the TLMM summary IRQ. 24 Definition: identifies this node as an interrupt controller 29 Definition: must be 2. Specifying the pin number and flags, as defined 35 Definition: identifies this node as a gpio controller 40 Definition: must be 2. Specifying the pin number and flags, as defined 75 Definition: List of gpio pins affected by the properties specified in 88 Definition: Specify the alternative function to be configured for the 121 Definition: The specified pins should be configured as no pull. [all …]
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/Linux-v5.4/Documentation/devicetree/bindings/media/ |
D | qcom,venus.txt | 6 Definition: Value should contain one of: 13 Definition: Register base address and length of the register map. 17 Definition: Should contain interrupt line number. 21 Definition: A List of phandle and clock specifier pairs as listed 26 Definition: Should contain the following entries: 33 Definition: Should contain the following entries: 41 Definition: A phandle and power domain specifier pairs to the 47 Definition: A list of phandle and IOMMU specifier pairs. 51 Definition: reference to the reserved-memory for the firmware 64 Definition: Value should contain "venus-decoder" or "venus-encoder" [all …]
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/Linux-v5.4/Documentation/devicetree/bindings/crypto/ |
D | fsl-sec4.txt | 57 Definition: Must include "fsl,sec-v4.0" 62 Definition: A standard property. Define the 'ERA' of the SEC 68 Definition: A standard property. Defines the number of cells 74 Definition: A standard property. Defines the number of cells 81 Definition: A standard property. Specifies the physical 88 Definition: A standard property. Specifies the physical address 96 Definition: Specifies the interrupts generated by this 105 Definition: A list of phandle and clock specifier pairs describing 111 Definition: A list of clock name strings in the same order as the 168 Definition: Must include "fsl,sec-v4.0-job-ring" [all …]
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/Linux-v5.4/Documentation/devicetree/bindings/input/ |
D | qcom,pm8xxx-keypad.txt | 8 Definition: must be one of: 15 Definition: address of keypad control register 20 Definition: the first interrupt specifies the key sense interrupt 28 Definition: the linux keymap. More information can be found in 34 Definition: don't enable autorepeat feature. 39 Definition: use any event on keypad as wakeup event. 45 Definition: number of rows in the keymap. More information can be found 51 Definition: number of columns in the keymap. More information can be 57 Definition: time in microseconds that key must be pressed or release 63 Definition: time in microseconds to pause between successive scans [all …]
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/Linux-v5.4/Documentation/devicetree/bindings/phy/ |
D | qcom,usb-8x16-phy.txt | 6 Definition: Should contain "qcom,usb-8x16-phy". 11 Definition: USB PHY base address and length of the register map 16 Definition: See clock-bindings.txt section "consumers". List of 23 Definition: Must contain "iface" and "core" strings. 28 Definition: phandle to the regulator VDCCX supply node. 33 Definition: phandle to the regulator 1.8V supply node. 38 Definition: phandle to the regulator 3.3V supply node. 43 Definition: See reset.txt section "consumers". PHY reset specifier. 48 Definition: Must contain "phy" string. 53 Definition: Some boards are using Dual SPDT USB Switch, witch is
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/Linux-v5.4/Documentation/devicetree/bindings/mfd/ |
D | qcom-pm8xxx.txt | 11 Definition: must be one of: 19 Definition: must be 1 24 Definition: must be 0 29 Definition: specifies the interrupt that indicates a subdevice 37 Definition: must be 2. Specifies the number of cells needed to encode 50 Definition: identifies this node as an interrupt controller 62 Definition: must be one of: 71 Definition: single entry specifying the base address of the RTC registers 76 Definition: single entry specifying the RTC's alarm interrupt 81 Definition: indicates that the setting of RTC time is allowed by
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