| /Linux-v6.6/drivers/dma/dw-edma/ |
| D | dw-edma-v0-debugfs.c | 12 #include "dw-edma-v0-debugfs.h"
13 #include "dw-edma-v0-regs.h"
14 #include "dw-edma-core.h"
16 #define REGS_ADDR(dw, name) \ argument
18 struct dw_edma_v0_regs __iomem *__regs = (dw)->chip->reg_base; \
23 #define REGS_CH_ADDR(dw, name, _dir, _ch) \ argument
27 if ((dw)->chip->mf == EDMA_MF_EDMA_LEGACY) \
28 __ch_regs = REGS_ADDR(dw, type.legacy.ch); \
30 __ch_regs = REGS_ADDR(dw, type.unroll.ch[_ch].rd); \
32 __ch_regs = REGS_ADDR(dw, type.unroll.ch[_ch].wr); \
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| D | dw-edma-v0-core.c | 13 #include "dw-edma-core.h"
14 #include "dw-edma-v0-core.h"
15 #include "dw-edma-v0-regs.h"
16 #include "dw-edma-v0-debugfs.h"
28 static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw) in __dw_regs() argument
30 return dw->chip->reg_base; in __dw_regs()
33 #define SET_32(dw, name, value) \ argument
34 writel(value, &(__dw_regs(dw)->name))
36 #define GET_32(dw, name) \ argument
37 readl(&(__dw_regs(dw)->name))
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| D | dw-hdma-v0-debugfs.c | 12 #include "dw-hdma-v0-debugfs.h"
13 #include "dw-hdma-v0-regs.h"
14 #include "dw-edma-core.h"
16 #define REGS_ADDR(dw, name) \ argument
18 struct dw_hdma_v0_regs __iomem *__regs = (dw)->chip->reg_base; \
23 #define REGS_CH_ADDR(dw, name, _dir, _ch) \ argument
28 __ch_regs = REGS_ADDR(dw, ch[_ch].rd); \
30 __ch_regs = REGS_ADDR(dw, ch[_ch].wr); \
35 #define CTX_REGISTER(dw, name, dir, ch) \ argument
36 {#name, REGS_CH_ADDR(dw, name, dir, ch)}
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| D | dw-hdma-v0-core.c | 11 #include "dw-edma-core.h"
12 #include "dw-hdma-v0-core.h"
13 #include "dw-hdma-v0-regs.h"
14 #include "dw-hdma-v0-debugfs.h"
26 static inline struct dw_hdma_v0_regs __iomem *__dw_regs(struct dw_edma *dw) in __dw_regs() argument
28 return dw->chip->reg_base; in __dw_regs()
32 __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch) in __dw_ch_regs() argument
35 return &(__dw_regs(dw)->ch[ch].wr); in __dw_ch_regs()
37 return &(__dw_regs(dw)->ch[ch].rd); in __dw_ch_regs()
40 #define SET_CH_32(dw, dir, ch, name, value) \ argument
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| D | dw-edma-core.c | 19 #include "dw-edma-core.h"
20 #include "dw-edma-v0-core.h"
21 #include "dw-hdma-v0-core.h"
46 struct dw_edma_chip *chip = chan->dw->chip; in dw_edma_get_pci_address()
78 struct dw_edma_chip *chip = desc->chan->dw->chip; in dw_edma_alloc_chunk()
187 struct dw_edma *dw = chan->dw; in dw_edma_start_transfer() local
205 dw_edma_core_start(dw, child, !desc->xfer_sz); in dw_edma_start_transfer()
220 if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) { in dw_edma_device_caps()
389 * If eDMA is embedded into the DW PCIe RP/EP and controlled from the in dw_edma_device_transfer()
404 if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) { in dw_edma_device_transfer()
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| D | dw-edma-core.h | 76 struct dw_edma *dw; member
95 struct dw_edma *dw; member
121 void (*off)(struct dw_edma *dw);
122 u16 (*ch_count)(struct dw_edma *dw, enum dw_edma_dir dir);
128 void (*debugfs_on)(struct dw_edma *dw);
167 void dw_edma_core_off(struct dw_edma *dw) in dw_edma_core_off() argument
169 dw->core->off(dw); in dw_edma_core_off()
173 u16 dw_edma_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir) in dw_edma_core_ch_count() argument
175 return dw->core->ch_count(dw, dir); in dw_edma_core_ch_count()
181 return chan->dw->core->ch_status(chan); in dw_edma_core_ch_status()
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| D | Makefile | 3 obj-$(CONFIG_DW_EDMA) += dw-edma.o
4 dw-edma-$(CONFIG_DEBUG_FS) := dw-edma-v0-debugfs.o \
5 dw-hdma-v0-debugfs.o
6 dw-edma-objs := dw-edma-core.o \
7 dw-edma-v0-core.o \
8 dw-hdma-v0-core.o $(dw-edma-y)
9 obj-$(CONFIG_DW_EDMA_PCIE) += dw-edma-pcie.o
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| /Linux-v6.6/drivers/misc/ |
| D | dw-xdata-pcie.c | 20 #define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
73 static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw) in __dw_regs() argument
75 return dw->rg_region.vaddr; in __dw_regs()
78 static void dw_xdata_stop(struct dw_xdata *dw) in dw_xdata_stop() argument
82 mutex_lock(&dw->mutex); in dw_xdata_stop()
84 burst = readl(&(__dw_regs(dw)->burst_cnt)); in dw_xdata_stop()
88 writel(burst, &(__dw_regs(dw)->burst_cnt)); in dw_xdata_stop()
91 mutex_unlock(&dw->mutex); in dw_xdata_stop()
94 static void dw_xdata_start(struct dw_xdata *dw, bool write) in dw_xdata_start() argument
96 struct device *dev = &dw->pdev->dev; in dw_xdata_start()
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| /Linux-v6.6/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-hdmi-ahb-audio.c | 21 #include "dw-hdmi-audio.h"
23 #define DRIVER_NAME "dw-hdmi-ahb-audio"
153 static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_iec958() argument
156 u32 *src = dw->buf_src + offset; in dw_hdmi_reformat_iec958()
157 u32 *dst = dw->buf_dst + offset; in dw_hdmi_reformat_iec958()
158 u32 *end = dw->buf_src + offset + bytes; in dw_hdmi_reformat_iec958()
181 static void dw_hdmi_reformat_s24(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_s24() argument
184 u32 *src = dw->buf_src + offset; in dw_hdmi_reformat_s24()
185 u32 *dst = dw->buf_dst + offset; in dw_hdmi_reformat_s24()
186 u32 *end = dw->buf_src + offset + bytes; in dw_hdmi_reformat_s24()
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| D | dw-hdmi-gp-audio.c | 3 * dw-hdmi-gp-audio.c
26 #include "dw-hdmi-audio.h"
28 #define DRIVER_NAME "dw-hdmi-gp-audio"
79 struct snd_dw_hdmi *dw = dev_get_drvdata(dev); in audio_hw_params() local
82 dw_hdmi_set_sample_rate(dw->data.hdmi, params->sample_rate); in audio_hw_params()
86 dw_hdmi_set_channel_count(dw->data.hdmi, params->channels); in audio_hw_params()
87 dw_hdmi_set_channel_allocation(dw->data.hdmi, ca); in audio_hw_params()
89 dw_hdmi_set_sample_non_pcm(dw->data.hdmi, in audio_hw_params()
91 dw_hdmi_set_sample_width(dw->data.hdmi, params->sample_width); in audio_hw_params()
103 struct snd_dw_hdmi *dw = dev_get_drvdata(dev); in audio_mute_stream() local
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| /Linux-v6.6/drivers/dma/dw/ |
| D | core.c | 79 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_get() local
83 desc = dma_pool_zalloc(dw->desc_pool, GFP_ATOMIC, &phys); in dwc_desc_get()
98 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_put() local
106 dma_pool_free(dw->desc_pool, child, child->txd.phys); in dwc_desc_put()
110 dma_pool_free(dw->desc_pool, desc, desc->txd.phys); in dwc_desc_put()
116 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_initialize() local
118 dw->initialize_chan(dwc); in dwc_initialize()
121 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
122 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
138 static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_chan_disable() argument
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| D | dw.c | 16 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dw_dma_initialize_chan() local
23 cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl); in dw_dma_initialize_chan()
91 static void dw_dma_set_device_name(struct dw_dma *dw, int id) in dw_dma_set_device_name() argument
93 snprintf(dw->name, sizeof(dw->name), "dw:dmac%d", id); in dw_dma_set_device_name()
96 static void dw_dma_disable(struct dw_dma *dw) in dw_dma_disable() argument
98 do_dw_dma_off(dw); in dw_dma_disable()
101 static void dw_dma_enable(struct dw_dma *dw) in dw_dma_enable() argument
103 do_dw_dma_on(dw); in dw_dma_enable()
108 struct dw_dma *dw; in dw_dma_probe() local
110 dw = devm_kzalloc(chip->dev, sizeof(*dw), GFP_KERNEL); in dw_dma_probe()
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| D | idma32.c | 48 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in idma32_initialize_chan_xbar() local
49 void __iomem *misc = __dw_regs(dw); in idma32_initialize_chan_xbar()
217 static void idma32_set_device_name(struct dw_dma *dw, int id) in idma32_set_device_name() argument
219 snprintf(dw->name, sizeof(dw->name), "idma32:dmac%d", id); in idma32_set_device_name()
228 static void idma32_fifo_partition(struct dw_dma *dw) in idma32_fifo_partition() argument
241 idma32_writeq(dw, FIFO_PARTITION1, fifo_partition); in idma32_fifo_partition()
242 idma32_writeq(dw, FIFO_PARTITION0, fifo_partition); in idma32_fifo_partition()
245 static void idma32_disable(struct dw_dma *dw) in idma32_disable() argument
247 do_dw_dma_off(dw); in idma32_disable()
248 idma32_fifo_partition(dw); in idma32_disable()
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| D | internal.h | 11 #include <linux/dma/dw.h>
18 void do_dw_dma_on(struct dw_dma *dw);
19 void do_dw_dma_off(struct dw_dma *dw);
27 void dw_dma_acpi_controller_register(struct dw_dma *dw);
28 void dw_dma_acpi_controller_free(struct dw_dma *dw);
30 static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {} in dw_dma_acpi_controller_register() argument
31 static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {} in dw_dma_acpi_controller_free() argument
38 void dw_dma_of_controller_register(struct dw_dma *dw);
39 void dw_dma_of_controller_free(struct dw_dma *dw);
45 static inline void dw_dma_of_controller_register(struct dw_dma *dw) {} in dw_dma_of_controller_register() argument
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| /Linux-v6.6/Documentation/devicetree/bindings/mmc/ |
| D | samsung,exynos-dw-mshc.yaml | 4 $id: http://devicetree.org/schemas/mmc/samsung,exynos-dw-mshc.yaml#
18 - samsung,exynos4210-dw-mshc
19 - samsung,exynos4412-dw-mshc
20 - samsung,exynos5250-dw-mshc
21 - samsung,exynos5420-dw-mshc
22 - samsung,exynos5420-dw-mshc-smu
23 - samsung,exynos7-dw-mshc
24 - samsung,exynos7-dw-mshc-smu
25 - axis,artpec8-dw-mshc
44 samsung,dw-mshc-ciu-div:
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| D | rockchip-dw-mshc.yaml | 4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
12 This file documents the combined properties for the core Synopsys dw mshc
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: synopsys-dw-mshc-common.yaml#
27 - const: rockchip,rk2928-dw-mshc
29 - const: rockchip,rk3288-dw-mshc
32 - rockchip,px30-dw-mshc
33 - rockchip,rk1808-dw-mshc
34 - rockchip,rk3036-dw-mshc
35 - rockchip,rk3128-dw-mshc
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| D | k3-dw-mshc.txt | 4 Read synopsys-dw-mshc.txt for more details
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
16 - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers
18 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
30 compatible = "hisilicon,hi4511-dw-mshc";
55 compatible = "hisilicon,hi6220-dw-mshc";
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| /Linux-v6.6/drivers/dma/dw-axi-dmac/ |
| D | dw-axi-dmac-platform.c | 32 #include "dw-axi-dmac.h"
37 * The set of bus widths supported by the DMA controller. DW AXI DMAC supports
94 if (chan->chip->dw->hdata->reg_map_8_channels && in axi_chan_config_write()
95 !chan->chip->dw->hdata->use_cfg2) { in axi_chan_config_write()
189 if (chan->chip->dw->hdata->reg_map_8_channels) in axi_chan_disable()
201 if (chan->chip->dw->hdata->reg_map_8_channels) in axi_chan_enable()
224 for (i = 0; i < chip->dw->hdata->nr_channels; i++) { in axi_dma_hw_init()
225 axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); in axi_dma_hw_init()
226 axi_chan_disable(&chip->dw->chan[i]); in axi_dma_hw_init()
236 u32 max_width = chan->chip->dw->hdata->m_data_width; in axi_chan_get_xfer_width()
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| /Linux-v6.6/drivers/staging/rtl8192u/ |
| D | r819xU_cmdpkt.h | 93 /* DW 0 */
98 /* DW 1 */
102 /* DW 2 */
106 /* DW 3 */
110 /* DW 4 */
114 /* DW 5 */
118 /* DW 6-8 */
123 /* DW 9 */
133 /* DW 0 */
138 /* DW 1-?? */
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| /Linux-v6.6/include/uapi/scsi/ |
| D | scsi_bsg_ufs.h | 18 /* uic commands are 4DW long, per UFSHCI V2.1 paragraph 5.6.1 */
41 * @dword_0: UPIU header DW-0
42 * @dword_1: UPIU header DW-1
43 * @dword_2: UPIU header DW-2
105 * @value: Attribute value to be written DW-5
106 * @reserved: spec reserved DW-6,7
128 * @osf6: spec field DW 8,9
129 * @osf7: spec field DW 10,11
146 * @data_transfer_len: Data Transfer Length DW-3
147 * @cdb: Command Descriptor Block CDB DW-4 to DW-7
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| /Linux-v6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_ih.c | 144 * @num_dw: size of the iv in dw
258 uint32_t dw[8]; in amdgpu_ih_decode_iv_helper() local
260 dw[0] = le32_to_cpu(ih->ring[ring_index + 0]); in amdgpu_ih_decode_iv_helper()
261 dw[1] = le32_to_cpu(ih->ring[ring_index + 1]); in amdgpu_ih_decode_iv_helper()
262 dw[2] = le32_to_cpu(ih->ring[ring_index + 2]); in amdgpu_ih_decode_iv_helper()
263 dw[3] = le32_to_cpu(ih->ring[ring_index + 3]); in amdgpu_ih_decode_iv_helper()
264 dw[4] = le32_to_cpu(ih->ring[ring_index + 4]); in amdgpu_ih_decode_iv_helper()
265 dw[5] = le32_to_cpu(ih->ring[ring_index + 5]); in amdgpu_ih_decode_iv_helper()
266 dw[6] = le32_to_cpu(ih->ring[ring_index + 6]); in amdgpu_ih_decode_iv_helper()
267 dw[7] = le32_to_cpu(ih->ring[ring_index + 7]); in amdgpu_ih_decode_iv_helper()
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| /Linux-v6.6/arch/arm/boot/dts/synaptics/ |
| D | berlin2cd.dtsi | 175 compatible = "snps,dw-apb-gpio";
181 compatible = "snps,dw-apb-gpio-port";
193 compatible = "snps,dw-apb-gpio";
199 compatible = "snps,dw-apb-gpio-port";
211 compatible = "snps,dw-apb-gpio";
217 compatible = "snps,dw-apb-gpio-port";
229 compatible = "snps,dw-apb-gpio";
235 compatible = "snps,dw-apb-gpio-port";
267 compatible = "snps,dw-apb-ssi";
277 compatible = "snps,dw-wdt";
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| D | berlin2.dtsi | 185 compatible = "snps,dw-apb-gpio";
191 compatible = "snps,dw-apb-gpio-port";
203 compatible = "snps,dw-apb-gpio";
209 compatible = "snps,dw-apb-gpio-port";
221 compatible = "snps,dw-apb-gpio";
227 compatible = "snps,dw-apb-gpio-port";
239 compatible = "snps,dw-apb-gpio";
245 compatible = "snps,dw-apb-gpio-port";
257 compatible = "snps,dw-apb-timer";
266 compatible = "snps,dw-apb-timer";
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| /Linux-v6.6/arch/riscv/boot/dts/thead/ |
| D | th1520.dtsi | 168 compatible = "snps,dw-apb-uart";
178 compatible = "snps,dw-apb-uart";
188 compatible = "snps,dw-apb-uart";
198 compatible = "snps,dw-apb-gpio";
204 compatible = "snps,dw-apb-gpio-port";
216 compatible = "snps,dw-apb-gpio";
222 compatible = "snps,dw-apb-gpio-port";
234 compatible = "snps,dw-apb-gpio";
240 compatible = "snps,dw-apb-gpio-port";
252 compatible = "snps,dw-apb-gpio";
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| /Linux-v6.6/Documentation/devicetree/bindings/watchdog/ |
| D | snps,dw-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml#
18 - const: snps,dw-wdt
34 - const: snps,dw-wdt
40 description: DW Watchdog pre-timeout interrupt
56 description: Phandle to the DW Watchdog reset lane
62 DW APB Watchdog custom timer intervals - Timeout Period ranges (TOPs).
66 the timer expiration intervals supported by the DW APB Watchdog. Note
67 DW APB Watchdog IP-core might be synthesized with fixed TOP values,
86 compatible = "snps,dw-wdt";
95 compatible = "snps,dw-wdt";
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