Searched full:dvt (Results 1 – 8 of 8) sorted by relevance
7 title: Allegro DVT Video IP Codecs Device Tree Bindings13 Allegro DVT video IP codecs present in the Xilinx ZynqMP SoC. The IP core may
305 struct v4l2_enum_dv_timings *dvt) in call_enum_dv_timings() argument307 if (!dvt) in call_enum_dv_timings()310 return check_pad(sd, dvt->pad) ? : in call_enum_dv_timings()311 sd->ops->pad->enum_dv_timings(sd, dvt); in call_enum_dv_timings()620 struct v4l2_enum_dv_timings *dvt = arg; in subdev_do_ioctl() local622 return v4l2_subdev_call(sd, pad, enum_dv_timings, dvt); in subdev_do_ioctl()
6 obj-$(CONFIG_VIDEO_ALLEGRO_DVT) += allegro-dvt/
217 tristate "Allegro DVT Video IP Core"224 Support for the encoder video IP core by Allegro DVT. This core is
89 first was the Discrete Video Timings (DVT) which is a collection of
5 * Allegro DVT video encoder driver3096 strscpy(cap->card, "Allegro DVT Video Encoder", sizeof(cap->card)); in allegro_querycap()3773 MODULE_DESCRIPTION("Allegro DVT encoder driver");
67 description: Allegro DVT
732 ALLEGRO DVT VIDEO IP CORE DRIVER738 F: drivers/media/platform/allegro-dvt/
