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/Linux-v6.1/drivers/gpu/drm/sprd/
Dsprd_dpu.c131 static int dpu_wait_stop_done(struct sprd_dpu *dpu) in dpu_wait_stop_done() argument
133 struct dpu_context *ctx = &dpu->ctx; in dpu_wait_stop_done()
146 drm_err(dpu->drm, "dpu wait for stop done time out!\n"); in dpu_wait_stop_done()
153 static int dpu_wait_update_done(struct sprd_dpu *dpu) in dpu_wait_update_done() argument
155 struct dpu_context *ctx = &dpu->ctx; in dpu_wait_update_done()
164 drm_err(dpu->drm, "dpu wait for reg update done time out!\n"); in dpu_wait_update_done()
323 static void sprd_dpu_layer(struct sprd_dpu *dpu, struct drm_plane_state *state) in sprd_dpu_layer() argument
325 struct dpu_context *ctx = &dpu->ctx; in sprd_dpu_layer()
380 static void sprd_dpu_flip(struct sprd_dpu *dpu) in sprd_dpu_flip() argument
382 struct dpu_context *ctx = &dpu->ctx; in sprd_dpu_flip()
[all …]
Dsprd_dpu.h23 /* DPU Layer registers offset */
33 * Sprd DPU context structure
35 * @base: DPU controller base address
38 * @vm: videomode structure to use for DPU and DPI initialization
39 * @stopped: indicates whether DPU are stopped
40 * @wait_queue: wait queue, used to wait for DPU shadow register update done and
41 * DPU stop register done interrupt signal.
42 * @evt_update: wait queue condition for DPU shadow register
43 * @evt_stop: wait queue condition for DPU stop register
57 * Sprd DPU device structure
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/display/sprd/
Dsprd,sharkl3-dpu.yaml4 $id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dpu.yaml#
7 title: Unisoc Sharkl3 Display Processor Unit (DPU)
13 DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs
19 const: sprd,sharkl3-dpu
63 dpu: dpu@63000000 {
64 compatible = "sprd,sharkl3-dpu";
Dsprd,display-subsystem.yaml14 DPU devices or other display interface nodes that comprise the
52 of DPU devices.
/Linux-v6.1/Documentation/devicetree/bindings/display/msm/
Ddpu-msm8998.yaml4 $id: http://devicetree.org/schemas/display/msm/dpu-msm8998.yaml#
7 title: Qualcomm Display DPU dt properties for MSM8998 target
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS and DPU are mentioned for MSM8998 target.
64 description: Node containing the properties of DPU.
70 - const: qcom,msm8998-dpu
115 Contains the list of output ports from DPU device. These ports
116 connect to interfaces that are external to the DPU hardware,
184 compatible = "qcom,msm8998-dpu";
Ddpu-sdm845.yaml4 $id: http://devicetree.org/schemas/display/msm/dpu-sdm845.yaml#
7 title: Qualcomm Display DPU dt properties for SDM845 target
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS and DPU are mentioned for SDM845 target.
67 description: Node containing the properties of DPU.
73 - const: qcom,sdm845-dpu
112 Contains the list of output ports from DPU device. These ports
113 connect to interfaces that are external to the DPU hardware,
181 compatible = "qcom,sdm845-dpu";
Ddpu-sc7180.yaml4 $id: http://devicetree.org/schemas/display/msm/dpu-sc7180.yaml#
7 title: Qualcomm Display DPU dt properties for SC7180 target
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS and DPU are mentioned for SC7180 target.
75 description: Node containing the properties of DPU.
81 - const: qcom,sc7180-dpu
124 Contains the list of output ports from DPU device. These ports
125 connect to interfaces that are external to the DPU hardware,
195 compatible = "qcom,sc7180-dpu";
Ddpu-qcm2290.yaml4 $id: http://devicetree.org/schemas/display/msm/dpu-qcm2290.yaml#
7 title: Qualcomm Display DPU dt properties for QCM2290 target
14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
15 and DPU are mentioned for QCM2290 target.
76 description: Node containing the properties of DPU.
82 - const: qcom,qcm2290-dpu
123 Contains the list of output ports from DPU device. These ports
124 connect to interfaces that are external to the DPU hardware,
191 compatible = "qcom,qcm2290-dpu";
Ddpu-sc7280.yaml4 $id: http://devicetree.org/schemas/display/msm/dpu-sc7280.yaml#
7 title: Qualcomm Display DPU dt properties for SC7280
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS and DPU are mentioned for SC7280.
74 description: Node containing the properties of DPU.
79 const: qcom,sc7280-dpu
122 Contains the list of output ports from DPU device. These ports
123 connect to interfaces that are external to the DPU hardware,
195 compatible = "qcom,sc7280-dpu";
/Linux-v6.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_rm.h17 * struct dpu_rm - DPU dynamic hardware resource manager
39 * @rm: DPU Resource Manager handle
50 * @rm: DPU Resource Manager handle
62 * @rm: DPU Resource Manager handle
77 * @rm: DPU Resource Manager handle
93 * @rm: DPU Resource Manager handle
103 * @rm: DPU Resource Manager handle
Ddpu_vbif.h47 * @dpu_kms: DPU handler
55 * @dpu_kms: DPU handler
63 * @dpu_kms: DPU handler
69 * @dpu_kms: DPU handler
Ddpu_formats.h13 * dpu_get_dpu_format_ext() - Returns dpu format structure pointer.
25 * @format: dpu format
26 * @supported_formats: supported formats by dpu HW
59 * dpu non-standard, i.e. modified format
Ddpu_kms.h53 #define DPU_ERROR(fmt, ...) pr_err("[dpu error]" fmt, ##__VA_ARGS__)
167 * @dpu_kms: pointer to dpu kms structure
179 * @dpu_kms: Pointer to DPU's KMS structure
181 * Return: dentry pointer for DPU's debugfs location
186 * DPU info management functions
Ddpu_core_irq.h34 * @dpu_kms: DPU handle
45 * @dpu_kms: DPU handle
62 * @dpu_kms: DPU handle
Ddpu_plane.h18 * struct dpu_plane_state: Define dpu extension of drm plane state object
80 * dpu_plane_init - create new dpu plane for the given pipe
82 * @pipe: dpu hardware pipe identifier
Ddpu_hw_interrupts.c40 * struct dpu_intr_reg - array of DPU register sets
52 * struct dpu_intr_reg - List of DPU interrupt registers
149 * @dpu_kms: Pointer to DPU's KMS structure
255 dbgstr = "DPU IRQ already set:"; in dpu_hw_intr_enable_irq_locked()
257 dbgstr = "DPU IRQ enabled:"; in dpu_hw_intr_enable_irq_locked()
304 dbgstr = "DPU IRQ is already cleared:"; in dpu_hw_intr_disable_irq_locked()
306 dbgstr = "DPU IRQ mask disable:"; in dpu_hw_intr_disable_irq_locked()
Ddpu_kms.c600 DPU_ERROR("failed to setup DPU encoder %d: rc:%d\n", in _dpu_kms_initialize_dsi()
639 DPU_ERROR("failed to setup DPU encoder %d: rc:%d\n", in _dpu_kms_initialize_displayport()
673 /* use only WB idx 2 instance for DPU */ in _dpu_kms_initialize_writeback()
679 DPU_ERROR("failed to setup DPU encoder %d: rc:%d\n", in _dpu_kms_initialize_writeback()
692 * @dpu_kms: Pointer to dpu kms structure
1038 DRM_DEBUG("mapped dpu address space @%pK\n", dpu_kms->mmio); in dpu_kms_hw_init()
1067 pr_info("dpu hardware revision:0x%x\n", dpu_kms->core_rev); in dpu_kms_hw_init()
1301 { .compatible = "qcom,msm8998-dpu", },
1302 { .compatible = "qcom,qcm2290-dpu", },
1303 { .compatible = "qcom,sdm845-dpu", },
[all …]
Ddpu_encoder_phys.h149 * enum dpu_intr_idx - dpu encoder interrupt index
183 * @intf_idx: Interface index on dpu hardware
184 * @wb_idx: Writeback index on dpu hardware
240 * @dest: dpu buffer layout for current writeback output buffer
356 * dpu_encoder_helper_get_dsc - get DSC blocks mask for the DPU encoder
398 * dpu_encoder_helper_phys_cleanup - helper to cleanup dpu pipeline
Ddpu_hw_mdss.h13 #define DPU_DBG_NAME "dpu"
282 * DPU HW,Component order color map
318 * dpu_fetch_type - Defines How DPU HW fetches data
362 * allows DPU HW to correctly fetch and decode the format
Ddpu_hw_catalog.h269 * MACRO DPU_HW_BLK_INFO - information of HW blocks inside DPU
284 * MACRO DPU_HW_SUBBLK_INFO - information of HW sub-block inside DPU
372 * struct dpu_caps - define DPU capabilities
787 * @clk_inefficiency_factor DPU src clock inefficiency factor
788 * @bw_inefficiency_factor DPU axi bus bw inefficiency factor
885 * dpu_hw_catalog_init - dpu hardware catalog init API retrieves
889 * Return: dpu config structure
/Linux-v6.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/
Dpipeline.json10 …"BriefDescription": "Cycles that the DPU IQ is empty and that is not because of a recent micro-TLB…
15 …"BriefDescription": "Cycles the DPU IQ is empty and there is an instruction cache miss being proce…
20 …"BriefDescription": "Cycles the DPU IQ is empty and there is an instruction micro-TLB miss being p…
25 "BriefDescription": "Cycles the DPU IQ is empty and there is a pre-decode error being processed"
/Linux-v6.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/
Dpipeline.json9 …n issued due to the frontend, cache miss.This event counts every cycle the DPU IQ is empty and the…
12 …n issued due to the frontend, cache miss.This event counts every cycle the DPU IQ is empty and the…
15 …ion issued due to the frontend, TLB miss.This event counts every cycle the DPU IQ is empty and the…
18 …ion issued due to the frontend, TLB miss.This event counts every cycle the DPU IQ is empty and the…
21 …ed due to the frontend, pre-decode error.This event counts every cycle the DPU IQ is empty and the…
24 …ed due to the frontend, pre-decode error.This event counts every cycle the DPU IQ is empty and the…
/Linux-v6.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
Dpipeline.json21 …, cache miss. This event counts every cycle that the Data Processing Unit (DPU) instruction queue …
24 …, cache miss. This event counts every cycle that the Data Processing Unit (DPU) instruction queue …
27 …sued due to the frontend, TLB miss. This event counts every cycle that the DPU instruction queue i…
30 …sued due to the frontend, TLB miss. This event counts every cycle that the DPU instruction queue i…
/Linux-v6.1/Documentation/devicetree/bindings/clock/
Dsamsung,exynos850-clock.yaml39 - samsung,exynos850-cmu-dpu
158 const: samsung,exynos850-cmu-dpu
165 - description: DPU clock (from CMU_TOP)
/Linux-v6.1/drivers/gpu/drm/msm/disp/
Dmsm_disp_snapshot.h38 * struct msm_disp_state - structure to store current dpu state
106 * msm_disp_state_print - print out the current dpu state

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