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/Linux-v5.15/Documentation/devicetree/bindings/display/msm/
Ddpu-sdm845.yaml4 $id: http://devicetree.org/schemas/display/msm/dpu-sdm845.yaml#
7 title: Qualcomm Display DPU dt properties for SDM845 target
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS and DPU are mentioned for SDM845 target.
65 description: Node containing the properties of DPU.
70 - const: qcom,sdm845-dpu
106 Contains the list of output ports from DPU device. These ports
107 connect to interfaces that are external to the DPU hardware,
176 compatible = "qcom,sdm845-dpu";
Ddpu-sc7180.yaml4 $id: http://devicetree.org/schemas/display/msm/dpu-sc7180.yaml#
7 title: Qualcomm Display DPU dt properties for SC7180 target
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS and DPU are mentioned for SC7180 target.
71 description: Node containing the properties of DPU.
76 - const: qcom,sc7180-dpu
117 Contains the list of output ports from DPU device. These ports
118 connect to interfaces that are external to the DPU hardware,
188 compatible = "qcom,sc7180-dpu";
/Linux-v5.15/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_core_irq.h13 * @dpu_kms: DPU handle
20 * @dpu_kms: DPU handle
27 * @dpu_kms: DPU handle
34 * @dpu_kms: DPU handle
47 * @dpu_kms: DPU handle
65 * @dpu_kms: DPU handle
Ddpu_rm.h17 * struct dpu_rm - DPU dynamic hardware resource manager
40 * @rm: DPU Resource Manager handle
51 * @rm: DPU Resource Manager handle
63 * @rm: DPU Resource Manager handle
78 * @rm: DPU Resource Manager handle
Ddpu_vbif.h47 * @dpu_kms: DPU handler
55 * @dpu_kms: DPU handler
63 * @dpu_kms: DPU handler
69 * @dpu_kms: DPU handler
Ddpu_kms.h54 #define DPU_ERROR(fmt, ...) pr_err("[dpu error]" fmt, ##__VA_ARGS__)
198 * @dpu_kms: pointer to dpu kms structure
232 * @dpu_kms: Pointer to DPU's KMS structure
234 * Return: dentry pointer for DPU's debugfs location
239 * DPU info management functions
Ddpu_hw_interrupts.c33 * struct dpu_intr_reg - array of DPU register sets
45 * struct dpu_intr_reg - List of DPU interrupt registers
235 dbgstr = "DPU IRQ already set:"; in dpu_hw_intr_enable_irq_locked()
237 dbgstr = "DPU IRQ enabled:"; in dpu_hw_intr_enable_irq_locked()
284 dbgstr = "DPU IRQ is already cleared:"; in dpu_hw_intr_disable_irq_locked()
286 dbgstr = "DPU IRQ mask disable:"; in dpu_hw_intr_disable_irq_locked()
Ddpu_plane.h18 * struct dpu_plane_state: Define dpu extension of drm plane state object
100 * dpu_plane_init - create new dpu plane for the given pipe
102 * @pipe: dpu hardware pipe identifier
Ddpu_hw_catalog.h221 * MACRO DPU_HW_BLK_INFO - information of HW blocks inside DPU
236 * MACRO DPU_HW_SUBBLK_INFO - information of HW sub-block inside DPU
312 * struct dpu_caps - define DPU capabilities
692 * @clk_inefficiency_factor DPU src clock inefficiency factor
693 * @bw_inefficiency_factor DPU axi bus bw inefficiency factor
806 * dpu_hw_catalog_init - dpu hardware catalog init API retrieves
810 * Return: dpu config structure
815 * dpu_hw_catalog_deinit - dpu hardware catalog cleanup
Ddpu_formats.h13 * dpu_get_dpu_format_ext() - Returns dpu format structure pointer.
37 * dpu non-standard, i.e. modified format
Ddpu_hw_mdss.h13 #define DPU_DBG_NAME "dpu"
265 * DPU HW,Component order color map
301 * dpu_fetch_type - Defines How DPU HW fetches data
345 * allows DPU HW to correctly fetch and decode the format
Ddpu_crtc.h124 * @enabled : whether the DPU CRTC is currently enabled. updated in the
181 * struct dpu_crtc_state - dpu container for atomic crtc state
254 * @dev: dpu device
Ddpu_kms.c534 DPU_ERROR("failed to setup DPU encoder %d: rc:%d\n", in _dpu_kms_initialize_dsi()
573 DPU_ERROR("failed to setup DPU encoder %d: rc:%d\n", in _dpu_kms_initialize_displayport()
583 * @dpu_kms: Pointer to dpu kms structure
975 DRM_DEBUG("mapped dpu address space @%pK\n", dpu_kms->mmio); in dpu_kms_hw_init()
1002 pr_info("dpu hardware revision:0x%x\n", dpu_kms->core_rev); in dpu_kms_hw_init()
1273 { .compatible = "qcom,sdm845-dpu", },
1274 { .compatible = "qcom,sc7180-dpu", },
1275 { .compatible = "qcom,sc7280-dpu", },
1276 { .compatible = "qcom,sm8150-dpu", },
1277 { .compatible = "qcom,sm8250-dpu", },
Ddpu_encoder_phys.h150 * enum dpu_intr_idx - dpu encoder interrupt index
169 * @irq_idx: IRQ interface lookup index from DPU IRQ framework
197 * @intf_idx: Interface index on dpu hardware
Ddpu_core_perf.h19 * @DPU_CORE_PERF_DATA_BUS_ID_MNOC: DPU/MNOC data bus
Ddpu_hw_catalog.c181 * DPU sub blocks config
183 /* DPU top level caps */
1116 * sdm845_cfg_init(): populate sdm845 dpu sub-blocks reg offsets
1145 * sc7180_cfg_init(): populate sc7180 dpu sub-blocks reg offsets
1176 * sm8150_cfg_init(): populate sm8150 dpu sub-blocks reg offsets
1209 * sm8250_cfg_init(): populate sm8250 dpu sub-blocks reg offsets
Ddpu_formats.c26 * DPU supported format packing, bpp, and other format
28 * DPU currently only supports interleaved RGB formats
798 /* buffer ** DPU PLANE */ in _dpu_format_populate_addrs_ubwc()
836 /* buffer ** DPU PLANE */ in _dpu_format_populate_addrs_ubwc()
Ddpu_hw_ctl.h37 * struct dpu_hw_intf_cfg :Describes how the DPU writes data to output interface
Ddpu_hw_vbif.c259 /* no need to register sub-range in dpu dbg, dump entire vbif io base */ in dpu_hw_vbif_init()
Ddpu_rm.c239 * @rm: dpu resource manager handle
266 * @rm: dpu resource manager handle
/Linux-v5.15/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/
Dpipeline.json10 …"BriefDescription": "Cycles that the DPU IQ is empty and that is not because of a recent micro-TLB…
15 …"BriefDescription": "Cycles the DPU IQ is empty and there is an instruction cache miss being proce…
20 …"BriefDescription": "Cycles the DPU IQ is empty and there is an instruction micro-TLB miss being p…
25 "BriefDescription": "Cycles the DPU IQ is empty and there is a pre-decode error being processed"
/Linux-v5.15/drivers/gpu/drm/msm/disp/
Dmsm_disp_snapshot.h38 * struct msm_disp_state - structure to store current dpu state
96 * msm_disp_state_print - print out the current dpu state
Dmsm_disp_snapshot_util.c84 drm_printf(p, "dpu devcoredump\n"); in msm_disp_state_print()
92 drm_printf(p, "===================dpu drm state================\n"); in msm_disp_state_print()
/Linux-v5.15/drivers/net/wireless/ath/wcn36xx/
Dwcn36xx.h162 * @dpu_desc_index: DPU descriptor index is returned from HW after config_sta
166 * @bss_dpu_desc_index: DPU descriptor index is returned from HW after
Dhal.h1741 /* DPU Index for PTK */
1744 /* DPU Index for GTK */
1747 /* DPU Index for IGTK */
1750 /* PTK DPU signature */
1753 /* GTK DPU isignature */
1756 /* IGTK DPU signature */
2166 /* DPU descriptor index for PTK */
2169 /* PTK DPU signature */
2172 /* DPU descriptor index for GTK */
2175 /* GTK DPU signature */
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