| /Linux-v5.15/arch/alpha/kernel/ |
| D | sys_marvel.c | 96 ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */ in io7_get_irq_ctl()
98 ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr; in io7_get_irq_ctl()
196 val = io7->csrs->PO7_LSI_CTL[which].csr; in io7_redirect_one_lsi()
200 io7->csrs->PO7_LSI_CTL[which].csr = val; in io7_redirect_one_lsi()
202 io7->csrs->PO7_LSI_CTL[which].csr; in io7_redirect_one_lsi()
213 val = io7->csrs->PO7_MSI_CTL[which].csr; in io7_redirect_one_msi()
217 io7->csrs->PO7_MSI_CTL[which].csr = val; in io7_redirect_one_msi()
219 io7->csrs->PO7_MSI_CTL[which].csr; in io7_redirect_one_msi()
228 io7->csrs->PO7_LSI_CTL[which].csr = ((unsigned long)where << 14); in init_one_io7_lsi()
230 io7->csrs->PO7_LSI_CTL[which].csr; in init_one_io7_lsi()
[all …]
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| D | core_marvel.c | 174 io7_ioport_csrs *csrs; in io7_clear_errors() local
182 csrs = IO7_CSRS_KERN(io7->pe, port); in io7_clear_errors()
184 csrs->POx_ERR_SUM.csr = -1UL; in io7_clear_errors()
185 csrs->POx_TLB_ERR.csr = -1UL; in io7_clear_errors()
186 csrs->POx_SPL_COMPLT.csr = -1UL; in io7_clear_errors()
187 csrs->POx_TRANS_SUM.csr = -1UL; in io7_clear_errors()
211 io7_ioport_csrs *csrs = IO7_CSRS_KERN(io7->pe, port); in io7_init_hose() local
227 io7_port->csrs = csrs; in io7_init_hose()
268 io7_port->saved_wbase[i] = csrs->POx_WBASE[i].csr; in io7_init_hose()
269 io7_port->saved_wmask[i] = csrs->POx_WMASK[i].csr; in io7_init_hose()
[all …]
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| D | err_marvel.c | 818 err_sum |= io7->csrs->PO7_ERROR_SUM.csr; in marvel_find_io7_with_error()
822 err_sum |= io7->ports[i].csrs->POx_ERR_SUM.csr; in marvel_find_io7_with_error()
843 io->io_asic_rev = io7->csrs->IO_ASIC_REV.csr; in marvel_find_io7_with_error()
844 io->io_sys_rev = io7->csrs->IO_SYS_REV.csr; in marvel_find_io7_with_error()
845 io->io7_uph = io7->csrs->IO7_UPH.csr; in marvel_find_io7_with_error()
846 io->hpi_ctl = io7->csrs->HPI_CTL.csr; in marvel_find_io7_with_error()
847 io->crd_ctl = io7->csrs->CRD_CTL.csr; in marvel_find_io7_with_error()
848 io->hei_ctl = io7->csrs->HEI_CTL.csr; in marvel_find_io7_with_error()
849 io->po7_error_sum = io7->csrs->PO7_ERROR_SUM.csr; in marvel_find_io7_with_error()
850 io->po7_uncrr_sym = io7->csrs->PO7_UNCRR_SYM.csr; in marvel_find_io7_with_error()
[all …]
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| D | core_lca.c | 275 * Note that we do not try to save any of the DMA window CSRs in lca_init_arch()
276 * before setting them, since we cannot read those CSRs on LCA. in lca_init_arch()
305 * Again, since we cannot read many of the CSRs on the LCA, in lca_init_arch()
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| /Linux-v5.15/arch/alpha/include/asm/ |
| D | core_t2.h | 68 /* The CSRs below are T3/T4 only */
95 /* T2 CSRs are in the non-cachable primary IO space from 3.8000.0000 to
99 * | CPU 0 CSRs |
101 * | CPU 1 CSRs |
103 * | CPU 2 CSRs |
105 * | CPU 3 CSRs |
111 * | Mem 0 CSRs |
113 * | Mem 1 CSRs |
115 * | Mem 2 CSRs |
117 * | Mem 3 CSRs |
[all …]
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| D | core_marvel.h | 302 io7_ioport_csrs *csrs; member
313 io7_port7_csrs *csrs; member
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| /Linux-v5.15/Documentation/devicetree/bindings/interrupt-controller/ |
| D | riscv,cpu-intc.txt | 4 RISC-V cores include Control Status Registers (CSRs) which are local to each
6 Some of these CSRs are used to control local interrupts connected to the core.
40 definition of the hart whose CSRs control these local interrupts.
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| /Linux-v5.15/arch/riscv/lib/ |
| D | uaccess.S | 20 csrs CSR_STATUS, t6
186 csrs CSR_STATUS, t6
229 csrs CSR_STATUS, t6
233 csrs CSR_STATUS, t6
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| /Linux-v5.15/include/linux/ |
| D | litex.h | 4 * helper functions for accessing CSRs.
34 * means that only larger-than-32-bit CSRs will be split across multiple
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| D | mdio.h | 183 * Since the CSRs for auto-negotiation using next pages are not fully
199 * Since the CSRs for auto-negotiation using next pages are not fully
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| /Linux-v5.15/drivers/net/ethernet/netronome/nfp/nfpcore/ |
| D | nfp_arm.h | 145 /* Gasket CSRs */
151 /* BAR CSRs
210 /* MP Core CSRs */
213 /* PL320 CSRs */
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| /Linux-v5.15/arch/riscv/kernel/ |
| D | fpu.S | 26 csrs CSR_STATUS, t1
70 csrs CSR_STATUS, t1
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| D | entry.S | 149 csrs CSR_STATUS, SR_IE
178 csrs CSR_STATUS, SR_IE
361 csrs CSR_STATUS, SR_IE /* Enable interrupts for do_notify_resume() */
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| /Linux-v5.15/drivers/net/ethernet/marvell/octeontx2/af/ |
| D | lmac_common.h | 51 /* Features like RXSTAT, TXSTAT, DMAC FILTER csrs differs by fixed
119 /* Lock to serialize read/write of global csrs like
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| /Linux-v5.15/drivers/infiniband/hw/hfi1/ |
| D | chip.h | 580 * per-context or per-SDMA CSRs that are not mappable to user-space.
586 /* kernel per-context CSRs are separated by 0x100 */ in read_kctxt_csr()
593 /* kernel per-context CSRs are separated by 0x100 */ in write_kctxt_csr()
614 * per-context CSRs that are mappable to user space. All these CSRs
616 * different processes without exposing other contexts' CSRs
621 /* user per-context CSRs are separated by 0x1000 */ in read_uctxt_csr()
628 /* user per-context CSRs are separated by 0x1000 */ in write_uctxt_csr()
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| /Linux-v5.15/drivers/tty/serial/ |
| D | liteuart.c | 22 * CSRs definitions (base address offsets + width)
28 * generic way of indexing the LiteX CSRs.
30 * For more details on how CSRs are defined and handled in LiteX, see comments
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| /Linux-v5.15/drivers/net/ethernet/sfc/falcon/ |
| D | io.h | 22 * Many CSRs are very wide and cannot be read or written atomically.
30 * Writes to different CSRs and 64-bit SRAM words must be serialised,
34 * We also serialise reads from 128-bit CSRs and SRAM with the same
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| /Linux-v5.15/Documentation/devicetree/bindings/soc/litex/ |
| D | litex,soc-controller.yaml | 13 operations and provide functions for other drivers to read/write CSRs
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| /Linux-v5.15/drivers/net/ethernet/sfc/ |
| D | io.h | 22 * Many CSRs are very wide and cannot be read or written atomically.
30 * Writes to different CSRs and 64-bit SRAM words must be serialised,
34 * We also serialise reads from 128-bit CSRs and SRAM with the same
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| /Linux-v5.15/arch/microblaze/lib/ |
| D | divsi3.S | 65 /* restore values of csrs and that of r3 and the divisor and the dividend */
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| D | modsi3.S | 65 /* restore values of csrs and that of r3 and the divisor and the dividend */
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| D | udivsi3.S | 77 /* restore values of csrs and that of r3 and the divisor and the dividend */
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| D | umodsi3.S | 79 /* restore values of csrs and that of r3 and the divisor and the dividend */
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| /Linux-v5.15/Documentation/networking/device_drivers/ethernet/intel/ |
| D | iavf.rst | 99 - 4 Queue Pairs (QP) and associated Configuration Status Registers (CSRs)
103 - 1 control queue, with i40e descriptors, CSRs and ring format
104 - 5 MSI-X interrupt vectors and corresponding i40e CSRs
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| /Linux-v5.15/arch/ia64/kernel/ |
| D | acpi-ext.c | 16 * Device CSRs that do not appear in PCI config space should be described
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