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/Linux-v6.1/Documentation/devicetree/bindings/board/
Dfsl-board.txt45 cpld@3,0 {
67 * Freescale on-board CPLD
69 Some Freescale boards like T1040RDB have an on board CPLD connected.
72 - compatible: Should be a board-specific string like "fsl,<board>-cpld"
74 "fsl,t1040rdb-cpld", "fsl,t1042rdb-cpld", "fsl,t1042rdb_pi-cpld"
75 - reg: should describe CPLD registers
78 cpld@3,0 {
79 compatible = "fsl,t1040rdb-cpld";
/Linux-v6.1/drivers/leds/
Dleds-mlxcpld.c68 * @offset: offset for LED access in CPLD device
69 * @mask: mask for LED access in CPLD device
81 * @param: LED CPLD access parameters
92 * @offset: offset for LED access in CPLD device
93 * @mask: mask for LED access in CPLD device
264 * CPLD register. Register offset is specified by off parameter. in mlxcpld_led_store_hw()
327 struct mlxcpld_led_pdata *cpld) in mlxcpld_led_config() argument
332 cpld->pled = devm_kcalloc(dev, in mlxcpld_led_config()
333 cpld->num_led_instances, in mlxcpld_led_config()
336 if (!cpld->pled) in mlxcpld_led_config()
[all …]
/Linux-v6.1/Documentation/leds/
Dleds-mlxcpld.rst28 - CPLD reg offset: 0x20
32 - CPLD reg offset: 0x20
36 - CPLD reg offset: 0x21
40 - CPLD reg offset: 0x21
44 - CPLD reg offset: 0x22
48 - CPLD reg offset: 0x22
77 - CPLD reg offset: 0x20
81 - CPLD reg offset: 0x21
85 - CPLD reg offset: 0x23
89 - CPLD reg offset: 0x23
[all …]
/Linux-v6.1/arch/powerpc/platforms/85xx/
Dksi8560.c51 printk(KERN_ERR "Can't find CPLD base, hang forever\n"); in machine_restart()
128 struct device_node *cpld; in ksi8560_setup_arch() local
130 cpld = of_find_compatible_node(NULL, NULL, "emerson,KSI8560-cpld"); in ksi8560_setup_arch()
131 if (cpld) in ksi8560_setup_arch()
132 cpld_base = of_iomap(cpld, 0); in ksi8560_setup_arch()
134 printk(KERN_ERR "Can't find CPLD in device tree\n"); in ksi8560_setup_arch()
136 of_node_put(cpld); in ksi8560_setup_arch()
160 seq_printf(m, "CPLD rev\t: %d\n", in ksi8560_show_cpuinfo()
163 seq_printf(m, "Unknown Hardware and CPLD revs\n"); in ksi8560_show_cpuinfo()
Dt1042rdb_diu.c26 /* Some CPLD register definitions */
42 pr_err("%s: Could not map cpld registers\n", __func__); in t1042rdb_set_monitor_port()
139 cpld_node = of_find_compatible_node(NULL, NULL, "fsl,t1042rdb-cpld"); in t1042rdb_diu_init()
/Linux-v6.1/arch/powerpc/platforms/512x/
Dmpc5121_ads_cpld.c8 * MPC5121ADS CPLD irq handling
79 .name = "CPLD PIC",
146 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic"); in mpc5121_ads_cpld_map()
148 printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n"); in mpc5121_ads_cpld_map()
164 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic"); in mpc5121_ads_cpld_pic_init()
166 printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n"); in mpc5121_ads_cpld_pic_init()
191 printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n"); in mpc5121_ads_cpld_pic_init()
/Linux-v6.1/Documentation/devicetree/bindings/mfd/
Ddelta,tn48m-cpld.yaml4 $id: http://devicetree.org/schemas/mfd/delta,tn48m-cpld.yaml#
7 title: Delta Networks TN48M CPLD controller
13 Lattice CPLD onboard the TN48M switches is used for system
24 const: delta,tn48m-cpld
58 cpld@41 {
59 compatible = "delta,tn48m-cpld";
/Linux-v6.1/arch/arm/mach-davinci/
Dboard-dm365-evm.c58 * A MAX-II CPLD is used for various board control functions.
93 static void __iomem *cpld; variable
297 if (!cpld) in cpld_mmc_get_cd()
301 return !(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 4 : 0)); in cpld_mmc_get_cd()
306 if (!cpld) in cpld_mmc_get_ro()
310 return !!(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 5 : 1)); in cpld_mmc_get_ro()
635 u8 reg = __raw_readb(cpld + CPLD_LEDS); in cpld_led_set()
641 __raw_writeb(reg, cpld + CPLD_LEDS); in cpld_led_set()
647 u8 reg = __raw_readb(cpld + CPLD_LEDS); in cpld_led_get()
656 if (!have_leds() || !cpld) in cpld_leds_init()
[all …]
/Linux-v6.1/arch/powerpc/boot/dts/
Dturris1x.dts245 <0x3 0x0 0x0 0xffa00000 0x00020000>; /* CPLD */
326 cpld@3,0 {
328 * Turris CPLD firmware which runs on this Lattice FPGA,
329 * is extended version of P1021RDB-PC CPLD v4.1 firmware.
332 * Turris CPLD firmware is open source and available at:
335 compatible = "cznic,turris1x-cpld", "fsl,p1021rdb-pc-cpld", "simple-bus", "syscon";
344 * CPLD firmware maps SET0, SET1 and SET2
345 * input logic of MAX6370KA+T chip to CPLD
347 * input logic is outside of the CPLD and
365 * LEDs are controlled by CPLD firmware.
Dmotionpro.dts101 // 8-bit board CPLD on LocalPlus Bus CS2
102 cpld@2,0 {
103 compatible = "promess,motionpro-cpld";
/Linux-v6.1/include/linux/platform_data/
Dmlxcpld.h3 * Mellanox I2C multiplexer support in CPLD
11 /* Platform data for the CPLD I2C multiplexers */
16 * @sel_reg_addr - mux select register offset in CPLD space
/Linux-v6.1/Documentation/devicetree/bindings/gpio/
Ddelta,tn48m-gpio.yaml7 title: Delta Networks TN48M CPLD GPIO controller
14 details see ../mfd/delta,tn48m-cpld.yaml.
16 Delta TN48M has an onboard Lattice CPLD that is used as an GPIO expander.
/Linux-v6.1/arch/arm/mach-pxa/
Dballoon3.h30 /* FPGA / CPLD registers for CF socket */
33 /* FPGA / CPLD version register */
35 /* FPGA / CPLD registers for NAND flash */
42 /* fpga/cpld interrupt control register */
110 /* CPLD (and FPGA) interface definitions */
/Linux-v6.1/drivers/spi/
Dspi-rb4xx.c88 * CPLD needs CS deselected after every command. in rb4xx_set_cs()
106 * flash and CPLD share the CS0 pin. This works because the CPLD's in rb4xx_transfer_one()
114 /* Boot flash and CPLD */ in rb4xx_transfer_one()
121 /* CPLD can use two-wire transfers */ in rb4xx_transfer_one()
/Linux-v6.1/arch/mips/alchemy/devboards/
Dbcsr.c3 * bcsr.h -- Db1xxx/Pb1xxx Devboard CPLD registers ("BCSR") abstraction.
6 * have a few registers in a CPLD with standardised layout; they mostly
89 * DB1200/PB1200 CPLD IRQ muxer
124 .name = "CPLD",
/Linux-v6.1/arch/arm/mach-s3c/
Dbast.h6 * BAST - CPLD control constants
27 /* CTRL3 - rom write control, CPLD identity */
69 * in their space. We also have the board's CPLD to find register space
75 /* we put the CPLD registers next, to get them out of the way */
Danubis.h7 * ANUBIS - CPLD control constants
37 /* we put the CPLD registers next, to get them out of the way */
/Linux-v6.1/arch/sh/boards/mach-se/7343/
Dirq.c23 #define PA_CPLD_ST_REG 0x08 /* CPLD Interrupt status register */
24 #define PA_CPLD_IMSK_REG 0x0a /* CPLD Interrupt mask register */
110 pr_err("Failed to remap CPLD\n"); in init_7343se_IRQ()
/Linux-v6.1/arch/powerpc/boot/dts/fsl/
Dt1042d4rdb.dts46 cpld@3,0 {
47 compatible = "fsl,t1040d4rdb-cpld",
48 "fsl,deepsleep-cpld";
/Linux-v6.1/drivers/i2c/muxes/
Di2c-mux-mlxcpld.c30 * Driver can support different mux control logic, according to CPLD
41 * | in CPLD| *---------* |
45 * | * CPLD (i2c bus)* select |
192 MODULE_DESCRIPTION("Mellanox I2C-CPLD-MUX driver");
DKconfig112 tristate "Mellanox CPLD based I2C multiplexer"
115 CPLD based I2C multiplexer. This driver provides access to
117 by a CPLD register.
/Linux-v6.1/drivers/media/pci/cobalt/
Dcobalt-cpld.c3 * Cobalt CPLD functions
11 #include "cobalt-cpld.h"
30 cobalt_info("CPLD System control register (read/write)\n"); in cpld_info_ver3()
33 cobalt_info("CPLD Clock control register (read/write)\n"); in cpld_info_ver3()
36 …cobalt_info("CPLD HSMA Clk Osc register (read/write) - Must set wr trigger to load default values\… in cpld_info_ver3()
53 cobalt_info("CPLD System status register (read only)\n"); in cpld_info_ver3()
56 cobalt_info("CPLD MAXII info register (read only)\n"); in cpld_info_ver3()
61 cobalt_info("CPLD temp and voltage ADT7411 registers (read only)\n"); in cpld_info_ver3()
100 cobalt_info("CPLD revision %u is not supported!\n", rev); in cobalt_cpld_status()
/Linux-v6.1/Documentation/devicetree/bindings/reset/
Ddelta,tn48m-reset.yaml7 title: Delta Networks TN48M CPLD reset controller
14 details see ../mfd/delta,tn48m-cpld.yaml.
/Linux-v6.1/arch/mips/include/asm/mach-db1x00/
Dbcsr.h3 * bcsr.h -- Db1xxx/Pb1xxx Devboard CPLD registers ("BCSR") abstraction.
6 * have a few registers in a CPLD with standardised layout; they mostly
76 /* Au1200/Au1300 based boards: CPLD IRQ muxer */
258 /* install CPLD IRQ demuxer (DB1200/PB1200) */
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dfsl-ls1046a-rdb.dts81 /* NAND Flashe and CPLD on board */
93 cpld: board-control@2,0 { label
94 compatible = "fsl,ls1046ardb-cpld";

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