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Searched full:core_clk (Results 1 – 25 of 98) sorted by relevance

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/Linux-v5.10/drivers/net/mdio/
Dmdio-mux-bcm-iproc.c54 struct clk *core_clk; member
67 if (md->core_clk) { in mdio_mux_iproc_config()
71 divisor = clk_get_rate(md->core_clk) / MDIO_OPERATING_FREQUENCY; in mdio_mux_iproc_config()
211 md->core_clk = devm_clk_get(&pdev->dev, NULL); in mdio_mux_iproc_probe()
212 if (md->core_clk == ERR_PTR(-ENOENT) || in mdio_mux_iproc_probe()
213 md->core_clk == ERR_PTR(-EINVAL)) in mdio_mux_iproc_probe()
214 md->core_clk = NULL; in mdio_mux_iproc_probe()
215 else if (IS_ERR(md->core_clk)) in mdio_mux_iproc_probe()
216 return PTR_ERR(md->core_clk); in mdio_mux_iproc_probe()
218 rc = clk_prepare_enable(md->core_clk); in mdio_mux_iproc_probe()
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/Linux-v5.10/arch/arc/boot/dts/
Dskeleton_hs_idu.dtsi21 clocks = <&core_clk>;
27 clocks = <&core_clk>;
33 clocks = <&core_clk>;
39 clocks = <&core_clk>;
48 clocks = <&core_clk>;
54 clocks = <&core_clk>;
Dskeleton_hs.dtsi21 clocks = <&core_clk>;
30 clocks = <&core_clk>;
36 clocks = <&core_clk>;
42 clocks = <&core_clk>;
Dhsdk.dts37 clocks = <&core_clk>;
44 clocks = <&core_clk>;
51 clocks = <&core_clk>;
58 clocks = <&core_clk>;
100 clocks = <&core_clk>;
106 clocks = <&core_clk>;
123 core_clk: core-clk@0 { label
134 assigned-clocks = <&core_clk>;
Dskeleton.dtsi26 clocks = <&core_clk>;
35 clocks = <&core_clk>;
41 clocks = <&core_clk>;
Dnsim_700.dts32 core_clk: core_clk { label
Dvdk_axc003.dtsi24 core_clk: core_clk { label
/Linux-v5.10/drivers/char/hw_random/
Dmeson-rng.c23 struct clk *core_clk; member
57 data->core_clk = devm_clk_get(dev, "core"); in meson_rng_probe()
58 if (IS_ERR(data->core_clk)) in meson_rng_probe()
59 data->core_clk = NULL; in meson_rng_probe()
61 if (data->core_clk) { in meson_rng_probe()
62 ret = clk_prepare_enable(data->core_clk); in meson_rng_probe()
66 data->core_clk); in meson_rng_probe()
/Linux-v5.10/arch/arm/mach-omap2/
Dclkt2xxx_dpllcore.c3 * DPLL + CORE_CLK composite clock functions
43 * omap2xxx_clk_get_core_rate - return the CORE_CLK rate
45 * Returns the CORE_CLK rate. CORE_CLK can have one of three rate
53 long long core_clk; in omap2xxx_clk_get_core_rate() local
58 core_clk = omap2_get_dpll_rate(dpll_core_ck); in omap2xxx_clk_get_core_rate()
63 core_clk = 32768; in omap2xxx_clk_get_core_rate()
65 core_clk *= v; in omap2xxx_clk_get_core_rate()
67 return core_clk; in omap2xxx_clk_get_core_rate()
/Linux-v5.10/arch/arm/boot/dts/
Dorion5x.dtsi33 clocks = <&core_clk 0>;
43 clocks = <&core_clk 0>;
53 clocks = <&core_clk 0>;
63 clocks = <&core_clk 0>;
99 clocks = <&core_clk 0>;
108 clocks = <&core_clk 0>;
117 clocks = <&core_clk 0>;
142 clocks = <&core_clk 0>;
150 clocks = <&core_clk 0>;
Ddove.dtsi165 clocks = <&core_clk 0>;
178 clocks = <&core_clk 0>;
187 clocks = <&core_clk 0>;
196 clocks = <&core_clk 0>;
207 clocks = <&core_clk 0>;
216 clocks = <&core_clk 0>;
227 clocks = <&core_clk 0>;
262 clocks = <&core_clk 0>;
270 clocks = <&core_clk 0>;
467 clocks = <&core_clk 0>;
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/Linux-v5.10/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_core_perf.c291 struct dss_clk *core_clk = kms->perf.core_clk; in _dpu_core_perf_set_core_clk_rate() local
293 if (core_clk->max_rate && (rate > core_clk->max_rate)) in _dpu_core_perf_set_core_clk_rate()
294 rate = core_clk->max_rate; in _dpu_core_perf_set_core_clk_rate()
296 core_clk->rate = rate; in _dpu_core_perf_set_core_clk_rate()
297 return dev_pm_opp_set_rate(&kms->pdev->dev, core_clk->rate); in _dpu_core_perf_set_core_clk_rate()
311 clk_rate = clk_round_rate(kms->perf.core_clk->clk, in _dpu_core_perf_get_core_clk_rate()
349 DPU_DEBUG("crtc:%d stop_req:%d core_clk:%llu\n", in dpu_core_perf_crtc_update()
414 kms->perf.core_clk->clk_name, clk_rate); in dpu_core_perf_crtc_update()
527 perf->core_clk = NULL; in dpu_core_perf_destroy()
535 struct dss_clk *core_clk) in dpu_core_perf_init() argument
[all …]
Ddpu_core_perf.h59 * @core_clk: Pointer to core clock structure
72 struct dss_clk *core_clk; member
118 * @core_clk: pointer to core clock
123 struct dss_clk *core_clk);
/Linux-v5.10/drivers/nvmem/
Dmeson-mx-efuse.c46 struct clk *core_clk; member
67 err = clk_prepare_enable(efuse->core_clk); in meson_mx_efuse_hw_enable()
87 clk_disable_unprepare(efuse->core_clk); in meson_mx_efuse_hw_disable()
223 efuse->core_clk = devm_clk_get(&pdev->dev, "core"); in meson_mx_efuse_probe()
224 if (IS_ERR(efuse->core_clk)) { in meson_mx_efuse_probe()
226 return PTR_ERR(efuse->core_clk); in meson_mx_efuse_probe()
/Linux-v5.10/drivers/pci/controller/dwc/
Dpcie-intel-gw.c70 struct clk *core_clk; member
241 lpp->core_clk = devm_clk_get(dev, NULL); in intel_pcie_get_resources()
242 if (IS_ERR(lpp->core_clk)) { in intel_pcie_get_resources()
243 ret = PTR_ERR(lpp->core_clk); in intel_pcie_get_resources()
328 ret = clk_prepare_enable(lpp->core_clk); in intel_pcie_host_setup()
346 clk_disable_unprepare(lpp->core_clk); in intel_pcie_host_setup()
358 clk_disable_unprepare(lpp->core_clk); in __intel_pcie_remove()
385 clk_disable_unprepare(lpp->core_clk); in intel_pcie_suspend_noirq()
/Linux-v5.10/Documentation/devicetree/bindings/media/
Dallegro.txt18 - clock-names: must include "core_clk", "mcu_clk", "m_axi_core_aclk",
30 clock-names = "core_clk", "mcu_clk", "m_axi_core_aclk",
41 clock-names = "core_clk", "mcu_clk", "m_axi_core_aclk",
/Linux-v5.10/drivers/phy/intel/
Dphy-intel-lgm-combo.c88 struct clk *core_clk; member
258 ret = clk_prepare_enable(cbphy->core_clk); in intel_cbphy_iphy_power_on()
264 ret = clk_set_rate(cbphy->core_clk, cbphy->clk_rate); in intel_cbphy_iphy_power_on()
297 clk_disable_unprepare(cbphy->core_clk); in intel_cbphy_iphy_power_on()
323 clk_disable_unprepare(cbphy->core_clk); in intel_cbphy_iphy_power_off()
415 cbphy->core_clk = devm_clk_get(dev, NULL); in intel_cbphy_fwnode_parse()
416 if (IS_ERR(cbphy->core_clk)) { in intel_cbphy_fwnode_parse()
417 ret = PTR_ERR(cbphy->core_clk); in intel_cbphy_fwnode_parse()
612 clk_disable_unprepare(cbphy->core_clk); in intel_cbphy_remove()
/Linux-v5.10/arch/h8300/boot/dts/
Dh8300h_sim.dts24 core_clk: core_clk { label
33 clocks = <&core_clk>;
Dh8s_sim.dts30 core_clk: core_clk { label
39 clocks = <&core_clk>;
Dedosk2674.dts31 core_clk: core_clk { label
40 clocks = <&core_clk>;
/Linux-v5.10/drivers/usb/chipidea/
Dci_hdrc_msm.c38 struct clk *core_clk; member
199 ci->core_clk = clk = devm_clk_get(&pdev->dev, "core"); in ci_hdrc_msm_probe()
233 ret = clk_prepare_enable(ci->core_clk); in ci_hdrc_msm_probe()
273 clk_disable_unprepare(ci->core_clk); in ci_hdrc_msm_probe()
284 clk_disable_unprepare(ci->core_clk); in ci_hdrc_msm_remove()
/Linux-v5.10/Documentation/devicetree/bindings/timer/
Dsnps,arc-timer.txt21 clocks = <&core_clk>;
26 clocks = <&core_clk>;
/Linux-v5.10/Documentation/devicetree/bindings/arm/marvell/
Dkirkwood.txt25 clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
/Linux-v5.10/Documentation/devicetree/bindings/ufs/
Dcdns,ufshc.txt20 order as the clocks property. "core_clk" is mandatory.
31 clock-names = "core_clk", "phy_clk";
/Linux-v5.10/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-ipq806x.c89 struct clk *core_clk; member
214 gmac->core_clk = devm_clk_get(dev, "stmmaceth"); in ipq806x_gmac_of_parse()
215 if (IS_ERR(gmac->core_clk)) { in ipq806x_gmac_of_parse()
217 return PTR_ERR(gmac->core_clk); in ipq806x_gmac_of_parse()
219 clk_set_rate(gmac->core_clk, 266000000); in ipq806x_gmac_of_parse()

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