| /Linux-v6.1/drivers/clk/qcom/ |
| D | clk-spmi-pmic-div.c | 24 struct clkdiv { struct
33 static inline struct clkdiv *to_clkdiv(struct clk_hw *hw) in to_clkdiv() argument
35 return container_of(hw, struct clkdiv, hw); in to_clkdiv()
51 static bool is_spmi_pmic_clkdiv_enabled(struct clkdiv *clkdiv) in is_spmi_pmic_clkdiv_enabled() argument
55 regmap_read(clkdiv->regmap, clkdiv->base + REG_EN_CTL, &val); in is_spmi_pmic_clkdiv_enabled()
61 __spmi_pmic_clkdiv_set_enable_state(struct clkdiv *clkdiv, bool enable, in __spmi_pmic_clkdiv_set_enable_state() argument
65 unsigned int ns = clkdiv->cxo_period_ns; in __spmi_pmic_clkdiv_set_enable_state()
68 ret = regmap_update_bits(clkdiv->regmap, clkdiv->base + REG_EN_CTL, in __spmi_pmic_clkdiv_set_enable_state()
81 static int spmi_pmic_clkdiv_set_enable_state(struct clkdiv *clkdiv, bool enable) in spmi_pmic_clkdiv_set_enable_state() argument
85 regmap_read(clkdiv->regmap, clkdiv->base + REG_DIV_CTL1, &div_factor); in spmi_pmic_clkdiv_set_enable_state()
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/clock/ |
| D | qcom,spmi-clkdiv.txt | 1 Qualcomm Technologies, Inc. SPMI PMIC clock divider (clkdiv)
3 clkdiv configures the clock frequency of a set of outputs on the PMIC.
14 Definition: must be "qcom,spmi-clkdiv".
19 Definition: base address of CLKDIV peripherals.
24 Definition: number of CLKDIV peripherals.
46 compatible = "qcom,spmi-clkdiv";
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| D | baikal,bt1-ccu-div.yaml | 58 CLKDIV--|--| | | |-|->CLKLOUT
68 accordance with a set divider, CLKDIV - clocks divider, LOCK - a signal of
72 figure above (like EN, CLKDIV/LOCK/SETCLK). In this case the corresponding
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| D | renesas,emev2-smu.yaml | 49 const: renesas,emev2-smu-clkdiv
129 compatible = "renesas,emev2-smu-clkdiv";
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| /Linux-v6.1/drivers/cpufreq/ |
| D | s3c2412-cpufreq.c | 126 unsigned long clkdiv; in s3c2412_cpufreq_setdivs() local
129 olddiv = clkdiv = s3c24xx_read_clkdivn(); in s3c2412_cpufreq_setdivs()
133 clkdiv &= ~S3C2412_CLKDIVN_ARMDIVN; in s3c2412_cpufreq_setdivs()
134 clkdiv &= ~S3C2412_CLKDIVN_HDIVN_MASK; in s3c2412_cpufreq_setdivs()
135 clkdiv &= ~S3C2412_CLKDIVN_PDIVN; in s3c2412_cpufreq_setdivs()
138 clkdiv |= S3C2412_CLKDIVN_ARMDIVN; in s3c2412_cpufreq_setdivs()
140 clkdiv |= ((cfg->divs.h_divisor / cfg->divs.arm_divisor) - 1); in s3c2412_cpufreq_setdivs()
143 clkdiv |= S3C2412_CLKDIVN_PDIVN; in s3c2412_cpufreq_setdivs()
145 s3c_freq_dbg("%s: div %08lx => %08lx\n", __func__, olddiv, clkdiv); in s3c2412_cpufreq_setdivs()
146 s3c24xx_write_clkdivn(clkdiv); in s3c2412_cpufreq_setdivs()
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| D | s3c2440-cpufreq.c | 154 unsigned long clkdiv, camdiv; in s3c2440_cpufreq_setdivs() local
159 clkdiv = s3c24xx_read_clkdivn(); in s3c2440_cpufreq_setdivs()
162 clkdiv &= ~(S3C2440_CLKDIVN_HDIVN_MASK | S3C2440_CLKDIVN_PDIVN); in s3c2440_cpufreq_setdivs()
167 clkdiv |= S3C2440_CLKDIVN_HDIVN_1; in s3c2440_cpufreq_setdivs()
171 clkdiv |= S3C2440_CLKDIVN_HDIVN_2; in s3c2440_cpufreq_setdivs()
178 clkdiv |= S3C2440_CLKDIVN_HDIVN_3_6; in s3c2440_cpufreq_setdivs()
185 clkdiv |= S3C2440_CLKDIVN_HDIVN_4_8; in s3c2440_cpufreq_setdivs()
193 clkdiv |= S3C2440_CLKDIVN_PDIVN; in s3c2440_cpufreq_setdivs()
198 * when we write clkdiv we will under-frequency instead of over. We in s3c2440_cpufreq_setdivs()
203 s3c24xx_write_clkdivn(clkdiv); in s3c2440_cpufreq_setdivs()
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| D | s3c2410-cpufreq.c | 28 /* Note, 2410A has an extra mode for 1:4:4 ratio, bit 2 of CLKDIV */
32 u32 clkdiv = 0; in s3c2410_cpufreq_setdivs() local
35 clkdiv |= S3C2410_CLKDIVN_HDIVN; in s3c2410_cpufreq_setdivs()
38 clkdiv |= S3C2410_CLKDIVN_PDIVN; in s3c2410_cpufreq_setdivs()
40 s3c24xx_write_clkdivn(clkdiv); in s3c2410_cpufreq_setdivs()
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| /Linux-v6.1/drivers/spi/ |
| D | spi-cavium.h | 46 uint64_t clkdiv:13; member
78 uint64_t clkdiv:13;
85 uint64_t clkdiv:13; member
111 uint64_t clkdiv:13;
118 uint64_t clkdiv:13; member
142 uint64_t clkdiv:13;
150 uint64_t clkdiv:13; member
180 uint64_t clkdiv:13;
187 uint64_t clkdiv:13; member
217 uint64_t clkdiv:13;
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| D | spi-cavium.c | 36 unsigned int clkdiv; in octeon_spi_do_transfer() local
48 clkdiv = p->sys_freq / (2 * xfer->speed_hz); in octeon_spi_do_transfer()
52 mpi_cfg.s.clkdiv = clkdiv; in octeon_spi_do_transfer()
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| /Linux-v6.1/drivers/hwtracing/intel_th/ |
| D | pti.c | 27 unsigned int clkdiv; member
113 return scnprintf(buf, PAGE_SIZE, "%d\n", 1u << pti->clkdiv); in clock_divider_show()
131 pti->clkdiv = val; in clock_divider_store()
159 ctl |= pti->clkdiv << __ffs(PTI_CLKDIV); in intel_th_pti_activate()
183 pti->clkdiv = (ctl & PTI_CLKDIV) >> __ffs(PTI_CLKDIV); in read_hw_config()
188 if (!pti->clkdiv) in read_hw_config()
189 pti->clkdiv = 1; in read_hw_config()
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| /Linux-v6.1/arch/arm/boot/dts/ |
| D | emev2.dtsi | 72 compatible = "renesas,emev2-smu-clkdiv";
84 compatible = "renesas,emev2-smu-clkdiv";
103 compatible = "renesas,emev2-smu-clkdiv";
109 compatible = "renesas,emev2-smu-clkdiv";
115 compatible = "renesas,emev2-smu-clkdiv";
121 compatible = "renesas,emev2-smu-clkdiv";
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| /Linux-v6.1/sound/soc/intel/skylake/ |
| D | skl-nhlt.c | 211 u32 clkdiv, div_ratio; in skl_get_mclk() local
222 clkdiv = i2s_config->mclk.mdivr & in skl_get_mclk()
227 clkdiv = i2s_config_ext->mclk.mdivr[0] & in skl_get_mclk()
234 if (clkdiv != SKL_MCLK_DIV_RATIO_MASK) in skl_get_mclk()
235 /* Divider is 2 + clkdiv */ in skl_get_mclk()
236 div_ratio = clkdiv + 2; in skl_get_mclk()
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| /Linux-v6.1/drivers/w1/masters/ |
| D | mxc_w1.c | 95 unsigned int clkdiv; in mxc_w1_probe() local
116 clkdiv = DIV_ROUND_CLOSEST(clkrate, 1000000); in mxc_w1_probe()
117 clkrate /= clkdiv; in mxc_w1_probe()
132 writeb(clkdiv - 1, mdev->regs + MXC_W1_TIME_DIVIDER); in mxc_w1_probe()
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| /Linux-v6.1/drivers/pwm/ |
| D | pwm-tiehrpwm.c | 153 unsigned int clkdiv, hspclkdiv; in set_prescale_div() local
155 for (clkdiv = 0; clkdiv <= CLKDIV_MAX; clkdiv++) { in set_prescale_div()
161 * CLKDIVIDER = (1), if clkdiv == 0 *OR* in set_prescale_div()
162 * (2 * clkdiv), if clkdiv != 0 in set_prescale_div()
168 *prescale_div = (1 << clkdiv) * in set_prescale_div()
171 *tb_clk_div = (clkdiv << TBCTL_CLKDIV_SHIFT) | in set_prescale_div()
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| D | pwm-mediatek.c | 121 u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH, in pwm_mediatek_config() local
142 clkdiv++; in pwm_mediatek_config()
147 if (clkdiv > PWM_CLK_DIV_MAX) { in pwm_mediatek_config()
163 pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv); in pwm_mediatek_config()
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| /Linux-v6.1/sound/soc/adi/ |
| D | axi-spdif.c | 80 unsigned int clkdiv, stat; in axi_spdif_hw_params() local
97 clkdiv = DIV_ROUND_CLOSEST(clk_get_rate(spdif->clk_ref), in axi_spdif_hw_params()
99 clkdiv <<= AXI_SPDIF_CTRL_CLKDIV_OFFSET; in axi_spdif_hw_params()
103 AXI_SPDIF_CTRL_CLKDIV_MASK, clkdiv); in axi_spdif_hw_params()
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| /Linux-v6.1/sound/soc/codecs/ |
| D | adau1701.c | 300 static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv, in adau1701_reset() argument
309 if (clkdiv != ADAU1707_CLKDIV_UNSET && adau1701->gpio_pll_mode) { in adau1701_reset()
310 switch (clkdiv) { in adau1701_reset()
334 adau1701->pll_clkdiv = clkdiv; in adau1701_reset()
349 if (clkdiv != ADAU1707_CLKDIV_UNSET) { in adau1701_reset()
441 unsigned int clkdiv = adau1701->sysclk / params_rate(params); in adau1701_hw_params() local
450 if (clkdiv != adau1701->pll_clkdiv) { in adau1701_hw_params()
451 ret = adau1701_reset(component, clkdiv, params_rate(params)); in adau1701_hw_params()
824 of_property_read_u32(dev->of_node, "adi,pll-clkdiv", in adau1701_i2c_probe()
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| /Linux-v6.1/drivers/iio/adc/ |
| D | lpc18xx_adc.c | 133 unsigned int clkdiv; in lpc18xx_adc_probe() local
176 clkdiv = DIV_ROUND_UP(rate, LPC18XX_ADC_CLK_TARGET); in lpc18xx_adc_probe()
178 adc->cr_reg = (clkdiv << LPC18XX_ADC_CR_CLKDIV_SHIFT) | in lpc18xx_adc_probe()
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| /Linux-v6.1/drivers/gpu/drm/exynos/ |
| D | exynos7_drm_decon.c | 145 u32 clkdiv; in decon_calc_clkdiv() local
148 clkdiv = DIV_ROUND_UP(clk_get_rate(ctx->vclk), ideal_clk); in decon_calc_clkdiv()
150 return (clkdiv < 0x100) ? clkdiv : 0xff; in decon_calc_clkdiv()
157 u32 val, clkdiv; in decon_commit() local
206 clkdiv = decon_calc_clkdiv(ctx, mode); in decon_commit()
207 if (clkdiv > 1) { in decon_commit()
208 val = VCLKCON1_CLKVAL_NUM_VCLK(clkdiv - 1); in decon_commit()
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| D | exynos_drm_fimd.c | 195 u32 clkdiv; member
421 u32 clkdiv; in fimd_atomic_check() local
447 clkdiv = DIV_ROUND_CLOSEST(lcd_rate, ideal_clk); in fimd_atomic_check()
448 if (clkdiv >= 0x200) { in fimd_atomic_check()
454 ctx->clkdiv = (clkdiv < 0x100) ? clkdiv : 0xff; in fimd_atomic_check()
589 if (ctx->clkdiv > 1) in fimd_commit()
590 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR; in fimd_commit()
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| /Linux-v6.1/arch/arm/mach-s3c/ |
| D | cpufreq-utils-s3c24xx.c | 81 void s3c24xx_write_clkdivn(u32 clkdiv) in s3c24xx_write_clkdivn() argument
83 __raw_writel(clkdiv, S3C2410_CLKDIVN); in s3c24xx_write_clkdivn()
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| /Linux-v6.1/drivers/gpu/drm/tilcdc/ |
| D | tilcdc_crtc.c | 208 unsigned int clkdiv; in tilcdc_crtc_set_clk() local
211 clkdiv = 2; /* first try using a standard divider of 2 */ in tilcdc_crtc_set_clk()
216 ret = clk_set_rate(priv->clk, pclk_rate * clkdiv); in tilcdc_crtc_set_clk()
218 real_pclk_rate = clk_rate / clkdiv; in tilcdc_crtc_set_clk()
234 clkdiv = DIV_ROUND_CLOSEST(clk_rate, pclk_rate); in tilcdc_crtc_set_clk()
243 real_pclk_rate = clk_rate / clkdiv; in tilcdc_crtc_set_clk()
255 tilcdc_crtc->lcd_fck_rate, crtc->mode.clock, clkdiv); in tilcdc_crtc_set_clk()
258 tilcdc_write(dev, LCDC_CTRL_REG, LCDC_CLK_DIVISOR(clkdiv) | in tilcdc_crtc_set_clk()
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| /Linux-v6.1/arch/powerpc/platforms/52xx/ |
| D | mpc52xx_common.c | 172 * @clkdiv: clock divider value to put into CDM PSC register.
174 int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv) in mpc52xx_set_psc_clkdiv() argument
185 mclken_div = 0x8000 | (clkdiv & 0x1FF); in mpc52xx_set_psc_clkdiv()
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| /Linux-v6.1/drivers/mmc/host/ |
| D | sh_mmcif.c | 243 u32 clkdiv_map; /* see CE_CLK_CTRL::CLKDIV */
487 unsigned int clkdiv; in sh_mmcif_clock_control() local
499 clkdiv = 0; in sh_mmcif_clock_control()
518 clkdiv = i; in sh_mmcif_clock_control()
524 (best_freq >> (clkdiv + 1)), clk, best_freq, clkdiv); in sh_mmcif_clock_control()
527 clkdiv = clkdiv << 16; in sh_mmcif_clock_control()
529 clkdiv = CLK_SUP_PCLK; in sh_mmcif_clock_control()
531 clkdiv = (fls(DIV_ROUND_UP(current_clk, clk) - 1) - 1) << 16; in sh_mmcif_clock_control()
534 sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR & clkdiv); in sh_mmcif_clock_control()
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| /Linux-v6.1/drivers/video/fbdev/ |
| D | s3c2410fb.c | 374 int clkdiv; in s3c2410fb_activate_var() local
376 clkdiv = DIV_ROUND_UP(s3c2410fb_calc_pixclk(fbi, var->pixclock), 2); in s3c2410fb_activate_var()
384 --clkdiv; in s3c2410fb_activate_var()
385 if (clkdiv < 0) in s3c2410fb_activate_var()
386 clkdiv = 0; in s3c2410fb_activate_var()
389 if (clkdiv < 2) in s3c2410fb_activate_var()
390 clkdiv = 2; in s3c2410fb_activate_var()
393 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_CLKVAL(clkdiv); in s3c2410fb_activate_var()
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