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/Linux-v5.10/sound/soc/codecs/
Dnau8540.c1 // SPDX-License-Identifier: GPL-2.0-only
24 #include <sound/soc-dapm.h>
39 { 1, 0x0 },
40 { 2, 0x2 },
41 { 4, 0x3 },
42 { 8, 0x4 },
43 { 16, 0x5 },
44 { 32, 0x6 },
45 { 3, 0x7 },
46 { 6, 0xa },
[all …]
Dsta350.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Codec driver for ST STA350 2.1-channel high-efficiency digital audio system
35 #include <sound/soc-dapm.h>
58 /* Power-up register defaults */
60 { 0x0, 0x63 },
61 { 0x1, 0x80 },
62 { 0x2, 0xdf },
63 { 0x3, 0x40 },
64 { 0x4, 0xc2 },
65 { 0x5, 0x5c },
[all …]
Dak5558.c1 // SPDX-License-Identifier: GPL-2.0
21 #include <sound/soc-dapm.h>
45 { 0x0, 0xFF }, /* 0x00 AK5558_00_POWER_MANAGEMENT1 */
46 { 0x1, 0x01 }, /* 0x01 AK5558_01_POWER_MANAGEMENT2 */
47 { 0x2, 0x01 }, /* 0x02 AK5558_02_CONTROL1 */
48 { 0x3, 0x00 }, /* 0x03 AK5558_03_CONTROL2 */
49 { 0x4, 0x00 }, /* 0x04 AK5558_04_CONTROL3 */
50 { 0x5, 0x00 } /* 0x05 AK5558_05_DSD */
63 "Sharp Roll-Off", "Show Roll-Off",
64 "Short Delay Sharp Roll-Off", "Short Delay Show Roll-Off",
[all …]
Dsta32x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Codec driver for ST STA32x 2.1-channel high-efficiency digital audio system
35 #include <sound/soc-dapm.h>
58 /* Power-up register defaults */
60 { 0x0, 0x63 },
61 { 0x1, 0x80 },
62 { 0x2, 0xc2 },
63 { 0x3, 0x40 },
64 { 0x4, 0xc2 },
65 { 0x5, 0x5c },
[all …]
Dtlv320adcx140.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
41 "ti,gpo-config-1",
42 "ti,gpo-config-2",
43 "ti,gpo-config-3",
44 "ti,gpo-config-4",
48 { ADCX140_PAGE_SELECT, 0x00 },
49 { ADCX140_SW_RESET, 0x00 },
50 { ADCX140_SLEEP_CFG, 0x00 },
51 { ADCX140_SHDN_CFG, 0x05 },
[all …]
Dtas6424.c1 // SPDX-License-Identifier: GPL-2.0
3 * ALSA SoC Texas Instruments TAS6424 Quad-Channel Audio Amplifier
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
24 #include <sound/soc-dapm.h>
33 "dvdd", /* Digital power supply. Connect to 3.3-V supply. */
35 "pvdd", /* Class-D amp output FETs supply. */
53 * DAC digital volumes. From -103.5 to 24 dB in 0.5 dB steps. Note that
54 * setting the gain below -100 dB (register value <0x7) is effectively a MUTE
57 static DECLARE_TLV_DB_SCALE(dac_tlv, -10350, 50, 0);
61 TAS6424_CH1_VOL_CTRL, 0, 0xff, 0, dac_tlv),
[all …]
/Linux-v5.10/sound/soc/mediatek/mt8183/
Dmt8183-dai-tdm.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "mt8183-afe-clk.h"
11 #include "mt8183-afe-common.h"
12 #include "mt8183-interconnection.h"
13 #include "mt8183-reg.h"
28 TDM_OUT_I2S = 0,
33 TDM_BCK_NON_INV = 0,
38 TDM_LCK_NON_INV = 0,
48 TDM_CHANNEL_BCK_16 = 0,
54 TDM_CHANNEL_NUM_2 = 0,
[all …]
/Linux-v5.10/tools/perf/tests/
Dapi-io.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #define TEMPL "/tmp/perf-test-XXXXXX"
23 ret = -1; \
25 } while (0)
32 ret = -1; \
34 } while (0)
43 if (fd < 0) { in make_test_file()
45 return -1; in make_test_file()
51 return -1; in make_test_file()
54 return 0; in make_test_file()
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Dstih407-clock.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/stih407-clks.h>
10 clk_sysin: clk-sysin {
11 #clock-cells = <0>;
12 compatible = "fixed-clock";
13 clock-frequency = <30000000>;
16 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
17 #clock-cells = <0>;
18 compatible = "fixed-clock";
19 clock-frequency = <0>;
[all …]
Dstih418-clock.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/stih418-clks.h>
10 clk_sysin: clk-sysin {
11 #clock-cells = <0>;
12 compatible = "fixed-clock";
13 clock-frequency = <30000000>;
14 clock-output-names = "CLK_SYSIN";
17 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
18 #clock-cells = <0>;
19 compatible = "fixed-clock";
[all …]
Dstih410-clock.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/stih410-clks.h>
10 clk_sysin: clk-sysin {
11 #clock-cells = <0>;
12 compatible = "fixed-clock";
13 clock-frequency = <30000000>;
14 clock-output-names = "CLK_SYSIN";
17 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
18 #clock-cells = <0>;
19 compatible = "fixed-clock";
[all …]
Dpxa300-raumfeld-speaker-one.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
9 compatible = "raumfeld,raumfeld-speaker-one-pxa303", "marvell,pxa300";
13 #sound-dai-cells = <0>;
14 Vdd-supply = <&reg_3v3>;
15 Vdda-supply = <&reg_va_5v0>;
18 xo_11mhz: oscillator-11mhz {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
[all …]
Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/mfd/
Dst,stm32-timers.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Benjamin Gaignard <benjamin.gaignard@st.com>
21 - Fabrice Gasnier <fabrice.gasnier@st.com>
25 const: st,stm32-timers
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/sound/
Dst,sta32x.txt7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
22 - clocks, clock-names: Clock specifier for XTI input clock.
24 and disabled when it is removed. The 'clock-names' must be set to 'xti'.
26 - st,output-conf: number, Selects the output configuration:
[all …]
Dst,sta350.txt7 - compatible: "st,sta350"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
[all …]
/Linux-v5.10/arch/arm64/boot/dts/renesas/
Dr8a77951-salvator-xs.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Salvator-X 2nd version board with R-Car H3 ES2.0+
5 * Copyright (C) 2015-2017 Renesas Electronics Corp.
8 /dts-v1/;
10 #include "salvator-xs.dtsi"
13 model = "Renesas Salvator-X 2nd version board based on r8a77951";
14 compatible = "renesas,salvator-xs", "renesas,r8a7795";
19 reg = <0x0 0x48000000 0x0 0x38000000>;
24 reg = <0x5 0x00000000 0x0 0x40000000>;
29 reg = <0x6 0x00000000 0x0 0x40000000>;
[all …]
Dr8a77995.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
18 /* External CAN clock - to be overridden by boards that provide it */
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
[all …]
/Linux-v5.10/drivers/iio/adc/
Dintel_mrfld_adc.c1 // SPDX-License-Identifier: GPL-2.0
29 #define BCOVE_GPADCREQ 0xDC
30 #define BCOVE_GPADCREQ_BUSY BIT(0)
66 complete(&adc->completion); in mrfld_adc_thread_isr()
75 struct regmap *regmap = adc->regmap; in mrfld_adc_single_conv()
81 reinit_completion(&adc->completion); in mrfld_adc_single_conv()
83 regmap_update_bits(regmap, BCOVE_MADCIRQ, BCOVE_ADCIRQ_ALL, 0); in mrfld_adc_single_conv()
84 regmap_update_bits(regmap, BCOVE_MIRQLVL1, BCOVE_LVL1_ADC, 0); in mrfld_adc_single_conv()
92 req = mrfld_adc_requests[chan->channel]; in mrfld_adc_single_conv()
97 timeout = wait_for_completion_interruptible_timeout(&adc->completion, in mrfld_adc_single_conv()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/iio/adc/
Dst,stmpe-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stmpe-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stefan Agner <stefan@agner.ch>
21 const: st,stmpe-adc
23 st,norequest-mask:
29 "#io-channel-cells":
33 - compatible
38 - |
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/clock/st/
Dst,quadfs.txt10 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
13 - compatible : shall be:
15 "st,quadfs-pll"
18 - #clock-cells : from common clock binding; shall be set to 1.
20 - reg : A Base address and length of the register set.
22 - clocks : from common clock binding
24 - clock-output-names : From common clock binding. The block has 4
34 clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
35 #clock-cells = <1>;
36 compatible = "st,quadfs-pll";
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/dma/
Drenesas,shdma.txt3 Sh-/r-mobile and R-Car systems often have multiple identical DMA controller
15 - compatible: should be "renesas,shdma-mux"
16 - #dma-cells: should be <1>, see "dmas" property below
19 - dma-channels: number of DMA channels
20 - dma-requests: number of DMA request signals
25 - compatible: should be of the form "renesas,shdma-<soc>", where <soc> should
27 "renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC
30 dmac: dma-multiplexer@0 {
31 compatible = "renesas,shdma-mux";
32 #dma-cells = <1>;
[all …]
/Linux-v5.10/drivers/media/pci/cx18/
Dcx18-av-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Derived from cx25840-core.c
11 #include "cx18-driver.h"
12 #include "cx18-io.h"
13 #include "cx18-cards.h"
17 u32 reg = 0xc40000 + (addr & ~3); in cx18_av_write()
18 u32 mask = 0xff; in cx18_av_write()
24 return 0; in cx18_av_write()
29 u32 reg = 0xc40000 + (addr & ~3); in cx18_av_write_expect()
33 x = (x & ~((u32)0xff << shift)) | ((u32)value << shift); in cx18_av_write_expect()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/usb/
Drenesas,usbhs.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas USBHS (HS-USB) controller
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - items:
16 - const: renesas,usbhs-r7s72100 # RZ/A1
17 - const: renesas,rza1-usbhs
19 - items:
20 - const: renesas,usbhs-r7s9210 # RZ/A2
[all …]
/Linux-v5.10/include/linux/iio/frequency/
Dad9523.h1 /* SPDX-License-Identifier: GPL-2.0-only */
38 * struct ad9523_channel_spec - Output channel configuration
42 * @sync_ignore_en: Ignore chip-level SYNC signal.
47 * @divider_phase: Divider initial phase after a SYNC. Range 0..63
49 * @channel_divider: 10-bit channel divider.
58 /* CH0..CH3 VCXO, CH4..CH9 VCO2 */
106 * struct ad9523_platform_data - platform specific information
109 * @refa_diff_rcv_en: REFA differential/single-ended input selection.
110 * @refb_diff_rcv_en: REFB differential/single-ended input selection.
111 * @zd_in_diff_en: Zero Delay differential/single-ended input selection.
[all …]

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