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/Linux-v6.1/drivers/i2c/busses/
Di2c-qcom-cci.c108 struct cci;
116 struct cci *cci; member
127 struct cci { struct
139 struct cci *cci = dev; in cci_isr() argument
143 val = readl(cci->base + CCI_IRQ_STATUS_0); in cci_isr()
144 writel(val, cci->base + CCI_IRQ_CLEAR_0); in cci_isr()
145 writel(0x1, cci->base + CCI_IRQ_GLOBAL_CLEAR_CMD); in cci_isr()
148 complete(&cci->master[0].irq_complete); in cci_isr()
149 if (cci->master[1].master) in cci_isr()
150 complete(&cci->master[1].irq_complete); in cci_isr()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/arm/
Darm,cci-400.yaml4 $id: http://devicetree.org/schemas/arm/arm,cci-400.yaml#
7 title: ARM CCI Cache Coherent Interconnect
14 coherent interconnect (CCI) that is capable of monitoring bus transactions
24 pattern: "^cci(@[0-9a-f]+)?$"
28 - arm,cci-400
29 - arm,cci-500
30 - arm,cci-550
35 Specifies base physical address of CCI control registers common to all
48 const: arm,cci-400-ctrl-if
71 - const: arm,cci-400-pmu,r0
[all …]
Dcci-control-port.yaml4 $id: http://devicetree.org/schemas/arm/cci-control-port.yaml#
7 title: CCI Interconnect Bus Masters binding
13 Masters in the device tree connected to a CCI port (inclusive of CPUs
19 cci-control-port:
33 cci-control-port = <&cci_control1>;
/Linux-v6.1/Documentation/devicetree/bindings/i2c/
Dqcom,i2c-cci.yaml4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
7 title: Qualcomm Camera Control Interface (CCI) I2C controller
16 - qcom,msm8226-cci
17 - qcom,msm8916-cci
18 - qcom,msm8974-cci
19 - qcom,msm8996-cci
20 - qcom,sdm845-cci
21 - qcom,sm8250-cci
22 - qcom,sm8450-cci
72 - qcom,msm8996-cci
[all …]
/Linux-v6.1/drivers/bus/
Darm-cci.c2 * CCI cache coherent interconnect driver
17 #include <linux/arm-cci.h>
49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA },
52 { .compatible = "arm,cci-500", },
53 { .compatible = "arm,cci-550", },
59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base),
60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base),
61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base),
62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base),
63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base),
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/interconnect/
Dmediatek,cci.yaml4 $id: http://devicetree.org/schemas/interconnect/mediatek,cci.yaml#
7 title: MediaTek Cache Coherent Interconnect (CCI) frequency and voltage scaling
14 MediaTek Cache Coherent Interconnect (CCI) is a hardware engine used by
21 - mediatek,mt8183-cci
22 - mediatek,mt8186-cci
35 - const: cci
44 Phandle of the regulator for CCI that provides the supply voltage.
48 Phandle of the regulator for sram of CCI that provides the supply
66 cci: cci {
67 compatible = "mediatek,mt8183-cci";
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/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt6795.dtsi31 cci-control-port = <&cci_control2>;
40 cci-control-port = <&cci_control2>;
49 cci-control-port = <&cci_control2>;
58 cci-control-port = <&cci_control2>;
67 cci-control-port = <&cci_control1>;
76 cci-control-port = <&cci_control1>;
85 cci-control-port = <&cci_control1>;
94 cci-control-port = <&cci_control1>;
254 cci: cci@10390000 { label
255 compatible = "arm,cci-400";
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/Linux-v6.1/drivers/perf/
DKconfig10 tristate "ARM CCI PMU driver"
14 Support for PMU events monitoring on the ARM CCI (Cache Coherent
17 If compiled as a module, it will be called arm-cci.
20 bool "support CCI-400"
25 CCI-400 provides 4 independent event counters counting events related
29 bool "support CCI-500/CCI-550"
33 CCI-500/CCI-550 both provide 8 independent event counters, which can
35 internal events to the CCI.
Darm-cci.c2 // CCI Cache Coherent Interconnect PMU driver
6 #include <linux/arm-cci.h>
19 #define DRIVER_NAME "ARM-CCI PMU"
165 * Instead of an event id to monitor CCI cycles, a dedicated counter is
166 * provided. Use 0xff to represent CCI cycles and hope that no future revisions
177 * CCI PMU event id is an 8-bit value made of two parts - bits 7:5 for one of 8
638 * Program the CCI PMU counters which have PERF_HES_ARCH set
752 * For all counters on the CCI-PMU, disable any 'enabled' counters,
791 * by the cci
837 dev_err(&pmu_device->dev, "no irqs for CCI PMUs defined\n"); in pmu_request_irq()
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/Linux-v6.1/drivers/usb/typec/ucsi/
Dtrace.c36 const char *ucsi_cci_str(u32 cci) in ucsi_cci_str() argument
38 if (UCSI_CCI_CONNECTOR(cci)) { in ucsi_cci_str()
39 if (cci & UCSI_CCI_ACK_COMPLETE) in ucsi_cci_str()
41 if (cci & UCSI_CCI_COMMAND_COMPLETE) in ucsi_cci_str()
45 if (cci & UCSI_CCI_ACK_COMPLETE) in ucsi_cci_str()
47 if (cci & UCSI_CCI_COMMAND_COMPLETE) in ucsi_cci_str()
Ducsi_acpi.c99 u32 cci; in ucsi_acpi_notify() local
102 ret = ucsi_acpi_read(ua->ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_acpi_notify()
106 if (UCSI_CCI_CONNECTOR(cci)) in ucsi_acpi_notify()
107 ucsi_connector_change(ua->ucsi, UCSI_CCI_CONNECTOR(cci)); in ucsi_acpi_notify()
110 cci & (UCSI_CCI_ACK_COMPLETE | UCSI_CCI_COMMAND_COMPLETE)) in ucsi_acpi_notify()
/Linux-v6.1/arch/ia64/kernel/
Dtopology.c110 pal_cache_config_info_t cci; member
173 return sprintf(buf, "%u\n", 1 << this_leaf->cci.pcci_line_size); in show_coherency_line_size()
179 return sprintf(buf, "%u\n", this_leaf->cci.pcci_assoc); in show_ways_of_associativity()
186 cache_mattrib[this_leaf->cci.pcci_cache_attr]); in show_attributes()
191 return sprintf(buf, "%uK\n", this_leaf->cci.pcci_cache_size / 1024); in show_size()
196 unsigned number_of_sets = this_leaf->cci.pcci_cache_size; in show_number_of_sets()
197 number_of_sets /= this_leaf->cci.pcci_assoc; in show_number_of_sets()
198 number_of_sets /= 1 << this_leaf->cci.pcci_line_size; in show_number_of_sets()
215 int type = this_leaf->type + this_leaf->cci.pcci_unified; in show_type()
297 pal_cache_config_info_t cci; in cpu_cache_sysfs_init() local
[all …]
Dpalinfo.c215 pal_cache_config_info_t cci; in cache_info() local
230 if ((status=ia64_pal_cache_config_info(i,j, &cci)) != 0) in cache_info()
237 cache_types[j+cci.pcci_unified], i+1, in cache_info()
238 cci.pcci_cache_size); in cache_info()
240 if (cci.pcci_unified) in cache_info()
243 seq_printf(m, "%s\n", cache_mattrib[cci.pcci_cache_attr]); in cache_info()
249 cci.pcci_assoc, in cache_info()
250 1<<cci.pcci_line_size, in cache_info()
251 1<<cci.pcci_stride); in cache_info()
256 cci.pcci_st_latency); in cache_info()
[all …]
Dsetup.c873 pal_cache_config_info_t cci; in get_cache_info() local
890 status = ia64_pal_cache_config_info(l, 2, &cci); in get_cache_info()
897 cci.pcci_stride = I_CACHE_STRIDE_SHIFT; in get_cache_info()
900 cci.pcci_unified = 1; in get_cache_info()
902 if (cci.pcci_stride < ia64_cache_stride_shift) in get_cache_info()
903 ia64_cache_stride_shift = cci.pcci_stride; in get_cache_info()
905 line_size = 1 << cci.pcci_line_size; in get_cache_info()
910 if (!cci.pcci_unified) { in get_cache_info()
912 status = ia64_pal_cache_config_info(l, 1, &cci); in get_cache_info()
918 cci.pcci_stride = I_CACHE_STRIDE_SHIFT; in get_cache_info()
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dexynos5420-cpus.dtsi63 cci-control-port = <&cci_control1>;
75 cci-control-port = <&cci_control1>;
87 cci-control-port = <&cci_control1>;
99 cci-control-port = <&cci_control1>;
111 cci-control-port = <&cci_control0>;
123 cci-control-port = <&cci_control0>;
135 cci-control-port = <&cci_control0>;
147 cci-control-port = <&cci_control0>;
Dexynos5422-cpus.dtsi62 cci-control-port = <&cci_control0>;
75 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
101 cci-control-port = <&cci_control0>;
114 cci-control-port = <&cci_control1>;
127 cci-control-port = <&cci_control1>;
140 cci-control-port = <&cci_control1>;
153 cci-control-port = <&cci_control1>;
Dexynos5260.dtsi67 cci-control-port = <&cci_control1>;
74 cci-control-port = <&cci_control1>;
81 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
95 cci-control-port = <&cci_control0>;
102 cci-control-port = <&cci_control0>;
355 cci: cci@10f00000 { label
356 compatible = "arm,cci-400";
363 compatible = "arm,cci-400-ctrl-if";
369 compatible = "arm,cci-400-ctrl-if";
Dmt7629.dtsi32 cci-control-port = <&cci_control2>;
40 cci-control-port = <&cci_control2>;
175 cci: cci@10390000 { label
176 compatible = "arm,cci-400";
183 compatible = "arm,cci-400-ctrl-if";
189 compatible = "arm,cci-400-ctrl-if";
195 compatible = "arm,cci-400-ctrl-if";
201 compatible = "arm,cci-400-pmu,r1";
Dvexpress-v2p-ca15_a7.dts42 cci-control-port = <&cci_control1>;
52 cci-control-port = <&cci_control1>;
62 cci-control-port = <&cci_control2>;
72 cci-control-port = <&cci_control2>;
82 cci-control-port = <&cci_control2>;
161 cci@2c090000 {
162 compatible = "arm,cci-400";
169 compatible = "arm,cci-400-ctrl-if";
175 compatible = "arm,cci-400-ctrl-if";
181 compatible = "arm,cci-400-pmu,r0";
Dsun9i-a80.dtsi70 cci-control-port = <&cci_control0>;
79 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
97 cci-control-port = <&cci_control0>;
106 cci-control-port = <&cci_control1>;
115 cci-control-port = <&cci_control1>;
124 cci-control-port = <&cci_control1>;
133 cci-control-port = <&cci_control1>;
551 cci: cci@1c90000 { label
552 compatible = "arm,cci-400";
[all …]
Dsun8i-a83t.dtsi69 cci-control-port = <&cci_control0>;
80 cci-control-port = <&cci_control0>;
91 cci-control-port = <&cci_control0>;
102 cci-control-port = <&cci_control0>;
113 cci-control-port = <&cci_control1>;
124 cci-control-port = <&cci_control1>;
135 cci-control-port = <&cci_control1>;
146 cci-control-port = <&cci_control1>;
405 cci@1790000 {
406 compatible = "arm,cci-400";
[all …]
/Linux-v6.1/drivers/devfreq/
Dmtk-cci-devfreq.c172 /* switch the cci clock to intermediate clock source. */ in mtk_ccifreq_target()
175 dev_err(dev, "failed to re-parent cci clock\n"); in mtk_ccifreq_target()
182 dev_err(dev, "failed to set cci pll rate: %d\n", ret); in mtk_ccifreq_target()
187 /* switch the cci clock back to the original clock source. */ in mtk_ccifreq_target()
190 dev_err(dev, "failed to re-parent cci clock\n"); in mtk_ccifreq_target()
267 drv->cci_clk = devm_clk_get(dev, "cci"); in mtk_ccifreq_probe()
270 return dev_err_probe(dev, ret, "failed to get cci clk\n"); in mtk_ccifreq_probe()
426 { .compatible = "mediatek,mt8183-cci", .data = &mt8183_platform_data },
427 { .compatible = "mediatek,mt8186-cci", .data = &mt8186_platform_data },
442 MODULE_DESCRIPTION("MediaTek CCI devfreq driver");
/Linux-v6.1/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-mediatek.txt23 - mediatek,cci:
24 Used to confirm the link status between cpufreq and mediatek cci. Because
25 cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs.
27 property to make sure mediatek cci is ready.
28 For details of mediatek cci, please refer to
29 Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
/Linux-v6.1/arch/arm/mach-versatile/
Dplatsmp-vexpress.c28 * is to detect if the kernel can take over CCI ports in vexpress_smp_init_ops()
29 * control. Loop over possible CPUs and check if CCI in vexpress_smp_init_ops()
40 cci_node = of_parse_phandle(cpu_node, "cci-control-port", 0); in vexpress_smp_init_ops()
/Linux-v6.1/include/linux/
Darm-cci.h3 * CCI cache coherent interconnect support
14 #include <asm/arm-cci.h>

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