Searched full:agilex (Results 1 – 13 of 13) sorted by relevance
| /Linux-v5.15/Documentation/devicetree/bindings/clock/ |
| D | intel,agilex.yaml | 4 $id: http://devicetree.org/schemas/clock/intel,agilex.yaml#
7 title: Intel SoCFPGA Agilex platform clock controller binding
13 The Intel Agilex Clock controller is an integrated clock controller, which
18 const: intel,agilex-clkmgr
41 compatible = "intel,agilex-clkmgr";
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| /Linux-v5.15/drivers/clk/socfpga/ |
| D | Kconfig | 7 devices like Aria, Cyclone, Stratix 10, Agilex and N5X eASIC.
16 …bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && (!ARM64 || !ARCH_I…
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| D | Makefile | 6 clk-agilex.o
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| D | clk-agilex.c | 11 #include <dt-bindings/clock/agilex-clock.h>
551 { .compatible = "intel,agilex-clkmgr",
561 .name = "agilex-clkmgr",
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| /Linux-v5.15/Documentation/devicetree/bindings/net/ |
| D | socfpga-dwmac.txt | 10 "altr,socfpga-stmmac". For Arria10/Agilex/Stratix10 SoCs
17 on the Arria10/Stratix10/Agilex platforms, the register shift represents
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| /Linux-v5.15/Documentation/devicetree/bindings/fpga/ |
| D | intel-stratix10-soc-fpga-mgr.txt | 8 "intel,agilex-soc-fpga-mgr"
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| /Linux-v5.15/arch/arm64/boot/dts/intel/ |
| D | socfpga_agilex.dtsi | 10 #include <dt-bindings/clock/agilex-clock.h>
13 compatible = "intel,socfpga-agilex";
149 compatible = "intel,agilex-clkmgr";
647 compatible = "intel,agilex-svc";
652 compatible = "intel,agilex-soc-fpga-mgr";
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| D | socfpga_agilex_socdk_nand.dts | 8 model = "SoCFPGA Agilex SoCDK";
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| D | socfpga_agilex_socdk.dts | 8 model = "SoCFPGA Agilex SoCDK";
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| /Linux-v5.15/Documentation/devicetree/bindings/firmware/ |
| D | intel,stratix10-svc.txt | 26 - compatible: "intel,stratix10-svc" or "intel,agilex-svc"
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| /Linux-v5.15/arch/arm64/ |
| D | Kconfig.platforms | 258 Stratix 10 (ex. Altera), Agilex and eASIC N5X.
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| /Linux-v5.15/drivers/fpga/ |
| D | stratix10-soc.c | 459 {.compatible = "intel,agilex-soc-fpga-mgr"},
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| /Linux-v5.15/drivers/firmware/ |
| D | stratix10-svc.c | 960 {.compatible = "intel,agilex-svc"},
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