| /Linux-v6.6/arch/sparc/kernel/ |
| D | pci_sun4v.c | 80 return iommu->atu && mask > DMA_BIT_MASK(32); in iommu_use_atu()
119 iotsb_num = pbm->iommu->atu->iotsb->iotsb_num; in iommu_batch_flush()
127 pr_err_ratelimited("%s: ATU map of [%08lx:%lx:%llx:%lx:%lx] failed with status %ld\n", in iommu_batch_flush()
218 tbl = &iommu->atu->tbl; in dma_4v_alloc_coherent()
328 struct atu *atu; in dma_4v_free_coherent() local
337 atu = iommu->atu; in dma_4v_free_coherent()
344 tbl = &atu->tbl; in dma_4v_free_coherent()
345 iotsb_num = atu->iotsb->iotsb_num; in dma_4v_free_coherent()
361 struct atu *atu; in dma_4v_map_page() local
371 atu = iommu->atu; in dma_4v_map_page()
[all …]
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| /Linux-v6.6/drivers/net/dsa/mv88e6xxx/ |
| D | global1_atu.c | 3 * Marvell 88E6xxx Address Translation Unit (ATU) support
18 /* Offset 0x01: ATU FID Register */
25 /* Offset 0x0A: ATU Control Register */
110 /* Offset 0x0B: ATU Operation Register */
144 /* ATU DBNum[7:4] are located in ATU Control 15:12 */ in mv88e6xxx_g1_atu_op()
156 /* ATU DBNum[5:4] are located in ATU Operation 9:8 */ in mv88e6xxx_g1_atu_op()
160 /* ATU DBNum[3:0] are located in ATU Operation 3:0 */ in mv88e6xxx_g1_atu_op()
192 /* ATU DBNum[7:4] are located in ATU Control 15:12 */ in mv88e6xxx_g1_atu_fid_read()
200 /* ATU DBNum[5:4] are located in ATU Operation 9:8 */ in mv88e6xxx_g1_atu_fid_read()
204 /* ATU DBNum[3:0] are located in ATU Operation 3:0 */ in mv88e6xxx_g1_atu_fid_read()
[all …]
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| D | global1.h | 44 /* Offset 0x01: ATU FID Register */
112 /* Offset 0x0A: ATU Control Register */
117 /* Offset 0x0B: ATU Operation Register */
134 /* Offset 0x0C: ATU Data Register */
166 /* Offset 0x0D: ATU MAC Address Register Bytes 0 & 1
167 * Offset 0x0E: ATU MAC Address Register Bytes 2 & 3
168 * Offset 0x0F: ATU MAC Address Register Bytes 4 & 5
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| D | devlink.c | 112 dev_err(chip->dev, "failed to set ATU stats kind/bin\n"); in mv88e6xxx_devlink_atu_bin_get()
118 dev_err(chip->dev, "failed to perform ATU get next\n"); in mv88e6xxx_devlink_atu_bin_get()
124 dev_err(chip->dev, "failed to get ATU stats\n"); in mv88e6xxx_devlink_atu_bin_get()
187 err = dsa_devlink_resource_register(ds, "ATU", in mv88e6xxx_setup_devlink_resources()
304 /* The ATU entry varies between mv88e6xxx chipset generations. Define
676 .name = "atu",
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| D | chip.h | 165 /* Mask for FromPort and ToPort value of PortVec used in ATU Move
166 * operation. 0 means that the ATU Move operation is not supported.
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| /Linux-v6.6/arch/sparc/include/asm/ |
| D | iommu_64.h | 30 /* Data structures for SPARC ATU architecture */
46 struct atu { struct
57 struct atu *atu; argument
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| /Linux-v6.6/Documentation/devicetree/bindings/pci/ |
| D | intel,keembay-pcie-ep.yaml | 24 - const: atu
62 reg-names = "dbi", "dbi2", "atu", "addr_space", "apb";
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| D | qcom,pcie-ep.yaml | 27 - description: Address Translation Unit (ATU) registers
36 - const: atu
193 reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
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| D | ti,am65-pci-ep.yaml | 29 - const: atu
70 reg-names = "app", "dbics", "addr_space", "atu";
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| D | host-generic-pci.yaml | 68 DesignWare PCIe controller in RC mode with static ATU window mappings
72 is there any reason for the driver to reconfigure ATU windows for
75 In cases where the IP was synthesized with a minimum ATU window size
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| D | intel,keembay-pcie.yaml | 32 - const: atu
83 reg-names = "dbi", "atu", "config", "apb";
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| D | ti,am65-pci-host.yaml | 30 - const: atu
92 reg-names = "app", "dbics", "config", "atu";
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| D | snps,dw-pcie-ep.yaml | 76 const: atu
104 - description: See native 'atu' CSR region for details.
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| D | snps,dw-pcie.yaml | 85 const: atu
110 - description: See native 'atu' CSR region for details.
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| D | qcom,pcie.yaml | 184 - const: atu # ATU address space
236 - const: atu # ATU address space
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| D | socionext,uniphier-pcie-ep.yaml | 35 - const: atu
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| D | socionext,uniphier-pcie.yaml | 36 - const: atu
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| D | apple,pcie.yaml | 17 implements its root ports. But the ATU found on most DesignWare
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| /Linux-v6.6/drivers/pci/controller/dwc/ |
| D | pcie-designware.c | 131 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "atu"); in dw_pcie_get_resources()
392 dev_err(pci->dev, "Read ATU address failed\n"); in dw_pcie_readl_atu()
412 dev_err(pci->dev, "Write ATU address failed\n"); in dw_pcie_writel_atu()
430 * bit in the Control register-1 of the ATU outbound region acts in dw_pcie_enable_ecrc()
438 * registers, the transactions going through ATU won't have TLP in dw_pcie_enable_ecrc()
512 * Make sure ATU enable takes effect before any subsequent config in __dw_pcie_prog_outbound_atu()
590 * Make sure ATU enable takes effect before any subsequent config in dw_pcie_prog_inbound_atu()
626 * Make sure ATU enable takes effect before any subsequent config in dw_pcie_prog_ep_inbound_atu()
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| D | pcie-designware-host.c | 653 /* Note the very first outbound ATU is used for CFG IOs */ in dw_pcie_iatu_setup()
790 * ATU, so we should not program the ATU here. in dw_pcie_setup_rc()
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| /Linux-v6.6/drivers/pci/controller/ |
| D | pcie-rockchip-host.c | 801 dev_err(dev, "program RC mem outbound ATU failed\n"); in rockchip_pcie_cfg_atu()
808 dev_err(dev, "program RC mem inbound ATU failed\n"); in rockchip_pcie_cfg_atu()
816 /* store the register number offset to program RC io outbound ATU */ in rockchip_pcie_cfg_atu()
830 dev_err(dev, "program RC io outbound ATU failed\n"); in rockchip_pcie_cfg_atu()
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| /Linux-v6.6/Documentation/PCI/endpoint/ |
| D | pci-ntb-function.rst | 66 (ATU) and to indicate the link status. Endpoint can indicate the status of
117 the outbound ATU such that transactions to Doorbell BAR will be routed
128 will configure the outbound ATU such that transactions to MW BAR
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| /Linux-v6.6/sound/soc/sof/amd/ |
| D | acp-stream.c | 121 /* Flush ATU Cache after PTE Update */ in acp_dsp_stream_config()
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| D | acp-loader.c | 146 /* Flush ATU Cache after PTE Update */ in configure_pte_for_fw_loading()
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| /Linux-v6.6/arch/arm64/boot/dts/qcom/ |
| D | sa8540p.dtsi | 203 reg-names = "parf", "dbi", "elbi", "atu", "config";
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