Searched full:atf (Results 1 – 25 of 34) sorted by relevance
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63 /* For ATF to send events to kernel, there is no dedicated interrupt65 * SW_INT so that ATF triggers this interrupt after processing of
163 /* scratchx(0) CSR used for ATF->non-secure SW communication.236 /* scratchx(1) CSR used for non-secure SW->ATF communication
4 /* Bootloader installs ATF here */
23 The ATF smc function id used by the firmware.
100 /* UART should keep working in ATF after suspend and before resume */112 /* SRAMB is used as ATF runtime memory, and should be always on */
17 * @set_pll_mode: Whether an IOCTL_SET_PLL_FRAC_MODE request be sent to ATF258 * that has been sent to ATF. in zynqmp_pll_enable()
53 /* DDR3 ATF default */
41 assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF/U-Boot */
230 assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF */
172 label = "Image A (FSBL, PMU, ATF, U-Boot)";182 label = "Image B (FSBL, PMU, ATF, U-Boot)";
78 * the value from ATF instead. in imx8mq_soc_revision()
58 execution environments such as ATF.
50 /* ATF only commands */181 /* Register SGI to ATF */
87 /* Some bits of BCMA_IOCTL set by HW/ATF and should not change */ in platform_bgmac_clk_enable()
265 * or for example ATF will prevent a suspend from completing. in mtk_gpt_suspend()
143 /* pwrmcu is used by ATF for platform PM: clocks must never be disabled by the kernel */
218 /* Shared with ATF on this platform */
450 /* Shared with ATF on this platform */
560 /* Shared with ATF on this platform */
575 /* Shared with ATF on this platform */
292 - 02: ATF BL1 firmware booting295 - 05: ATF BL2 firmware booting296 - 06: ATF BL31 firmware booting297 - 07: ATF BL32 firmware booting
712 /* Follow the same order than what the Cortex-M3 does (ATF code) */ in armada_3700_periph_clock_resume()
26 /* UUID used to probe ATF service. */
434 /* UUID used to probe ATF service. */
2959 /* ATF configuration.2960 * 1 - Enable ATF2961 * 0 - Disable ATF
