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/Linux-v5.4/Documentation/devicetree/bindings/arm/
Dpmu.yaml74 Indicates that the ARMv7 Secure Debug Enable Register
76 any setup required that is only possible in ARMv7 secure
77 state. If not present the ARMv7 SDER will not be touched,
81 not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
/Linux-v5.4/arch/arm/mach-mmp/
DKconfig67 ARMv7 architecture.
78 ARMv7 architecture.
89 ARMv7 architecture.
122 bool "Support MMP2 (ARMv7) platforms from device tree"
150 Select code specific to MMP2. MMP2 is ARMv7 compatible.
/Linux-v5.4/Documentation/arm/
Dmarvel.rst114 Sheeva ARMv7 compatible PJ4B
165 Sheeva ARMv7 compatible Dual-core or Quad-core PJ4B-MP
258 Sheeva ARMv7 comatible Quad-core PJ4C
281 ARMv7 compatible
318 - Core: ARMv7 compatible Sheeva PJ4 core
358 - Core: ARMv7 compatible Sheeva PJ4 88sv581x core
362 - Core: Dual-core ARMv7 compatible Sheeva PJ4C core
365 - Core: ARMv7 compatible Sheeva PJ4 core
368 - Core: Dual-core ARMv7 compatible Sheeva PJ4B-MP core
371 - Core: quad-core ARMv7 Cortex-A7
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/timer/
Darm,arch_timer.yaml28 - arm,armv7-timer
31 - arm,armv7-timer
72 supported for 32-bit systems which follow the ARMv7 architected reset
95 "arm,armv7-timer";
Darm,arch_timer_mmio.yaml23 - arm,armv7-timer-mem
50 supported for 32-bit systems which follow the ARMv7 architected reset
99 compatible = "arm,armv7-timer-mem";
/Linux-v5.4/arch/arm/mm/
DMakefile36 AFLAGS_abort-ev7.o :=-Wa,-march=armv7-a
52 AFLAGS_cache-v7.o :=-Wa,-march=armv7-a
53 AFLAGS_cache-v7m.o :=-Wa,-march=armv7-m
75 AFLAGS_tlb-v7.o :=-Wa,-march=armv7-a
104 AFLAGS_proc-v7.o :=-Wa,-march=armv7-a
Dproc-v7m.S8 * This is the "shell" of the ARMv7-M processor support.
104 * This should be able to cover all ARMv7-M cores.
178 string cpu_v7m_name "ARMv7-M"
227 * Match any ARMv7-M processor core.
Dcache-tauros2.c246 * not complying with all of the other ARMv7 requirements), in tauros2_internal_init()
254 * When Tauros2 is used in an ARMv7 system, the L2 in tauros2_internal_init()
257 * ARMv7 spec to contain fine-grained cache control bits). in tauros2_internal_init()
265 mode = "ARMv7"; in tauros2_internal_init()
DKconfig405 # ARMv7
668 Say Y if you have an ARMv7 processor supporting the LPAE page
723 ARMv7 multiprocessing extensions introduce the ability to disable
757 Support for the BE-8 (big-endian) mode on ARMv6 and ARMv7 processors.
877 run on ARMv4 through to ARMv7 without modification.
1091 provide DMA coherent memory. With the advent of ARMv7, mapping
1103 On some of the beefier ARMv7-M machines (with DMA and write
/Linux-v5.4/arch/arm/mach-stm32/
DKconfig42 endif # ARMv7-M
51 endif # ARMv7-A
/Linux-v5.4/arch/arm/mach-vexpress/
DMakefile10 CFLAGS_dcscb.o += -march=armv7-a
15 CFLAGS_tc2_pm.o += -march=armv7-a
/Linux-v5.4/arch/arm/mach-mvebu/
DMakefile4 AFLAGS_coherency_ll.o := -Wa,-march=armv7-a
5 CFLAGS_pmsu.o := -march=armv7-a
/Linux-v5.4/arch/arm/common/
DMakefile18 AFLAGS_mcpm_head.o := -march=armv7-a
19 AFLAGS_vlock.o := -march=armv7-a
/Linux-v5.4/drivers/firmware/
DMakefile23 CFLAGS_qcom_scm-32.o :=$(call as-instr,.arch armv7-a\n.arch_extension sec,-DREQUIRES_SEC=1) -march=
/Linux-v5.4/Documentation/trace/
Dcoresight-cpu-debug.rst49 - ARMv8-a (ARM DDI 0487A.k) and ARMv7-a (ARM DDI 0406C.b) have different
53 but ARMv7-a defines "PCSR samples are offset by a value that depends on the
54 instruction set state". For ARMv7-a, the driver checks furthermore if CPU
56 detailed description for offset is in ARMv7-a ARM (ARM DDI 0406C.b) chapter
/Linux-v5.4/arch/arm/kvm/
DMakefile16 AFLAGS_init.o := -Wa,-march=armv7-a$(plus_virt)
17 AFLAGS_interrupts.o := -Wa,-march=armv7-a$(plus_virt)
/Linux-v5.4/arch/arm/kernel/
Dentry-v7m.S7 * Low-level vector interface routines for the ARMv7-M architecture
92 * Register switch for ARMv7-M processors.
DMakefile66 CFLAGS_swp_emulate.o := -Wa,-march=armv7-a
98 AFLAGS_hyp-stub.o :=-Wa,-march=armv7-a
/Linux-v5.4/arch/arm/oprofile/
Dcommon.c42 { "armv7_cortex_a8", "arm/armv7" },
43 { "armv7_cortex_a9", "arm/armv7-ca9" },
/Linux-v5.4/arch/arm/
DMakefile69 arch-$(CONFIG_CPU_32v7M) =-D__LINUX_ARM_ARCH__=7 -march=armv7-m -Wa,-march=armv7-m
70 …2v7) =-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv…
73 # always available in ARMv7
/Linux-v5.4/arch/arm/mach-npcm/
DMakefile2 AFLAGS_headsmp.o += -march=armv7-a
/Linux-v5.4/tools/perf/util/
Dcs-etm.h61 * table 7-12 Encoding of Exception[3:0] for non-ARMv7-M processors.
84 * trace packet, for ARMv7-A/R and ARMv8-A/R PEs.
/Linux-v5.4/arch/arm/mach-sunxi/
DMakefile2 CFLAGS_mc_smp.o += -march=armv7-a
/Linux-v5.4/arch/arm/mach-rockchip/
DMakefile2 CFLAGS_platsmp.o := -march=armv7-a
/Linux-v5.4/arch/arm/mach-tango/
Dsmc.S4 .arch armv7-a

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