Searched full:armv7 (Results 1 – 25 of 204) sorted by relevance
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| /Linux-v5.10/arch/arm/mach-mmp/ |
| D | Kconfig | 67 ARMv7 architecture.
78 ARMv7 architecture.
89 ARMv7 architecture.
121 bool "Support MMP2 (ARMv7) platforms from device tree"
134 bool "Support MMP3 (ARMv7) platforms"
169 Select code specific to MMP2. MMP2 is ARMv7 compatible.
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| /Linux-v5.10/Documentation/devicetree/bindings/arm/ |
| D | pmu.yaml | 83 Indicates that the ARMv7 Secure Debug Enable Register
85 any setup required that is only possible in ARMv7 secure
86 state. If not present the ARMv7 SDER will not be touched,
90 not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
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| /Linux-v5.10/Documentation/arm/ |
| D | marvel.rst | 114 Sheeva ARMv7 compatible PJ4B
165 Sheeva ARMv7 compatible Dual-core or Quad-core PJ4B-MP
258 Sheeva ARMv7 comatible Quad-core PJ4C
281 ARMv7 compatible
318 - Core: ARMv7 compatible Sheeva PJ4 core
358 - Core: ARMv7 compatible Sheeva PJ4 88sv581x core
362 - Core: Dual-core ARMv7 compatible Sheeva PJ4C core
365 - Core: ARMv7 compatible Sheeva PJ4 core
368 - Core: Dual-core ARMv7 compatible Sheeva PJ4B-MP core
371 - Core: quad-core ARMv7 Cortex-A7
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer.yaml | 28 - arm,armv7-timer
31 - arm,armv7-timer
78 supported for 32-bit systems which follow the ARMv7 architected reset
103 "arm,armv7-timer";
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| D | arm,arch_timer_mmio.yaml | 23 - arm,armv7-timer-mem
52 supported for 32-bit systems which follow the ARMv7 architected reset
102 compatible = "arm,armv7-timer-mem";
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| /Linux-v5.10/arch/arm/mm/ |
| D | Makefile | 36 AFLAGS_abort-ev7.o :=-Wa,-march=armv7-a
52 AFLAGS_cache-v7.o :=-Wa,-march=armv7-a
53 AFLAGS_cache-v7m.o :=-Wa,-march=armv7-m
75 AFLAGS_tlb-v7.o :=-Wa,-march=armv7-a
104 AFLAGS_proc-v7.o :=-Wa,-march=armv7-a
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| D | proc-v7m.S | 8 * This is the "shell" of the ARMv7-M processor support.
104 * This should be able to cover all ARMv7-M cores.
178 string cpu_v7m_name "ARMv7-M"
227 * Match any ARMv7-M processor core.
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| D | cache-tauros2.c | 246 * not complying with all of the other ARMv7 requirements), in tauros2_internal_init()
254 * When Tauros2 is used in an ARMv7 system, the L2 in tauros2_internal_init()
257 * ARMv7 spec to contain fine-grained cache control bits). in tauros2_internal_init()
265 mode = "ARMv7"; in tauros2_internal_init()
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| D | Kconfig | 405 # ARMv7
668 Say Y if you have an ARMv7 processor supporting the LPAE page
723 ARMv7 multiprocessing extensions introduce the ability to disable
757 Support for the BE-8 (big-endian) mode on ARMv6 and ARMv7 processors.
877 run on ARMv4 through to ARMv7 without modification.
1094 provide DMA coherent memory. With the advent of ARMv7, mapping
1106 On some of the beefier ARMv7-M machines (with DMA and write
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| /Linux-v5.10/arch/arm/mach-mstar/ |
| D | Kconfig | 2 bool "MStar/Sigmastar Armv7 SoC Support"
9 based on Armv7 cores like the Cortex A7 and share the same
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| D | mstarv7.c | 3 * Device Tree support for MStar/Sigmastar Armv7 SoCs
77 DT_MACHINE_START(MSTARV7_DT, "MStar/Sigmastar Armv7 (Device Tree)")
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| /Linux-v5.10/arch/arm/mach-stm32/ |
| D | Kconfig | 42 endif # ARMv7-M
51 endif # ARMv7-A
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| /Linux-v5.10/arch/arm/mach-imx/ |
| D | Makefile | 39 AFLAGS_headsmp.o :=-Wa,-march=armv7-a
53 AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
58 AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a
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| /Linux-v5.10/arch/arm/mach-vexpress/ |
| D | Makefile | 10 CFLAGS_dcscb.o += -march=armv7-a
15 CFLAGS_tc2_pm.o += -march=armv7-a
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| /Linux-v5.10/arch/arm/common/ |
| D | Makefile | 17 AFLAGS_mcpm_head.o := -march=armv7-a
18 AFLAGS_vlock.o := -march=armv7-a
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| /Linux-v5.10/arch/arm/mach-mvebu/ |
| D | Makefile | 4 AFLAGS_coherency_ll.o := -Wa,-march=armv7-a
5 CFLAGS_pmsu.o := -march=armv7-a
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| /Linux-v5.10/Documentation/devicetree/bindings/arm/mstar/ |
| D | mstar,l3bridge.yaml | 8 title: MStar/SigmaStar Armv7 SoC l3bridge
14 MStar/SigmaStar's Armv7 SoCs have a pipeline in the interface
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| /Linux-v5.10/Documentation/trace/coresight/ |
| D | coresight-cpu-debug.rst | 49 - ARMv8-a (ARM DDI 0487A.k) and ARMv7-a (ARM DDI 0406C.b) have different
53 but ARMv7-a defines "PCSR samples are offset by a value that depends on the
54 instruction set state". For ARMv7-a, the driver checks furthermore if CPU
56 detailed description for offset is in ARMv7-a ARM (ARM DDI 0406C.b) chapter
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| /Linux-v5.10/drivers/soc/samsung/ |
| D | Kconfig | 17 bool "Exynos ASV ARMv7-specific driver extensions" if COMPILE_TEST
33 bool "Exynos PMU ARMv7-specific driver extensions" if COMPILE_TEST
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| /Linux-v5.10/arch/arm/ |
| D | Makefile | 63 arch-$(CONFIG_CPU_32v7M) =-D__LINUX_ARM_ARCH__=7 -march=armv7-m -Wa,-march=armv7-m
64 …2v7) =-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv…
67 # always available in ARMv7
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| /Linux-v5.10/arch/arm/oprofile/ |
| D | common.c | 42 { "armv7_cortex_a8", "arm/armv7" },
43 { "armv7_cortex_a9", "arm/armv7-ca9" },
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| /Linux-v5.10/arch/arm/kernel/ |
| D | entry-v7m.S | 7 * Low-level vector interface routines for the ARMv7-M architecture
92 * Register switch for ARMv7-M processors.
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| D | Makefile | 70 CFLAGS_swp_emulate.o := -Wa,-march=armv7-a
102 AFLAGS_hyp-stub.o :=-Wa,-march=armv7-a
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| /Linux-v5.10/tools/perf/util/ |
| D | cs-etm.h | 61 * table 7-12 Encoding of Exception[3:0] for non-ARMv7-M processors.
84 * trace packet, for ARMv7-A/R and ARMv8-A/R PEs.
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| /Linux-v5.10/arch/arm/mach-npcm/ |
| D | Makefile | 2 AFLAGS_headsmp.o += -march=armv7-a
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