| /Linux-v5.15/arch/xtensa/lib/ |
| D | strncpy_user.S | 45 # a9/ tmp
65 movi a9, 3
66 bnone a11, a9, .Laligned
70 EX(11f) l8ui a9, a3, 0 # get byte 0
72 EX(10f) s8i a9, a11, 0 # store byte 0
73 beqz a9, .Lret # if byte 0 is zero
80 EX(11f) l8ui a9, a3, 0 # get byte 0
82 EX(10f) s8i a9, a11, 0 # store byte 0
83 beqz a9, .Lret # if byte 0 is zero
87 EX(11f) l8ui a9, a3, 1 # get byte 0
[all …]
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| D | checksum.S | 184 a9 = temp
204 extui a9, a10, 0, 2
205 beqz a9, 1f /* branch if both are 4-byte aligned */
223 EX(10f) l32i a9, a2, 0
225 EX(10f) s32i a9, a3, 0
227 ONES_ADD(a5, a9)
229 EX(10f) l32i a9, a2, 8
231 EX(10f) s32i a9, a3, 8
233 ONES_ADD(a5, a9)
235 EX(10f) l32i a9, a2, 16
[all …]
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| D | strnlen_user.S | 42 # a9/ tmp
72 EX(10f) l32i a9, a4, 4 # get next word of string
74 bnone a9, a5, .Lz0 # if byte 0 is zero
75 bnone a9, a6, .Lz1 # if byte 1 is zero
76 bnone a9, a7, .Lz2 # if byte 2 is zero
77 bnone a9, a8, .Lz3 # if byte 3 is zero
83 EX(10f) l32i a9, a4, 4 # load 4 bytes for remaining checks
88 bnone a9, a5, .Lz0 # if byte 0 is zero
89 bnone a9, a6, .Lz1 # if byte 1 is zero
120 EX(10f) l8ui a9, a4, 4 # get byte 0
[all …]
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| D | memcopy.S | 53 * a9/ tmp
218 l32i a9, a3, 12
222 __src_b a8, a8, a9
225 __src_b a9, a9, a6
226 s32i a9, a5, 12
321 * a9/ tmp
495 l32i a9, a3, 4
499 __src_b a8, a9, a8
501 __src_b a9, a6, a9
502 s32i a9, a5, 0
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| /Linux-v5.15/arch/xtensa/mm/ |
| D | misc.S | 65 l32i a9, a3, 4
67 s32i a9, a2, 4
70 l32i a9, a3, 12
72 s32i a9, a2, 12
75 l32i a9, a3, 20
77 s32i a9, a2, 20
80 l32i a9, a3, 28
82 s32i a9, a2, 28
176 l32i a9, a3, 4
178 s32i a9, a2, 4
[all …]
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | highbank.dts | 22 compatible = "arm,cortex-a9";
41 compatible = "arm,cortex-a9";
60 compatible = "arm,cortex-a9";
79 compatible = "arm,cortex-a9";
114 compatible = "arm,cortex-a9-twd-timer";
121 compatible = "arm,cortex-a9-twd-wdt";
128 compatible = "arm,cortex-a9-gic";
144 compatible = "arm,cortex-a9-pmu";
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| D | vexpress-v2p-ca9.dts | 6 * Cortex-A9 MPCore (V2P-CA9)
40 compatible = "arm,cortex-a9";
47 compatible = "arm,cortex-a9";
54 compatible = "arm,cortex-a9";
61 compatible = "arm,cortex-a9";
139 compatible = "arm,cortex-a9-scu";
144 compatible = "arm,cortex-a9-twd-timer";
150 compatible = "arm,cortex-a9-twd-wdt";
156 compatible = "arm,cortex-a9-gic";
175 compatible = "arm,cortex-a9-pmu";
[all …]
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| D | arm-realview-eb-a9mp.dts | 27 model = "ARM RealView EB Cortex A9 MPCore";
30 * This is the Cortex A9 MPCore tile used with the
40 compatible = "arm,cortex-a9";
47 compatible = "arm,cortex-a9";
54 compatible = "arm,cortex-a9";
61 compatible = "arm,cortex-a9";
|
| D | arm-realview-pbx-a9.dts | 28 * This is the RealView Platform Baseboard Explore for Cortex-A9
31 model = "ARM RealView Platform Baseboard Explore for Cortex-A9";
51 compatible = "arm,cortex-a9";
57 compatible = "arm,cortex-a9";
82 compatible = "arm,cortex-a9-scu";
87 compatible = "arm,cortex-a9-twd-timer";
94 compatible = "arm,cortex-a9-twd-wdt";
101 compatible = "arm,cortex-a9-pmu";
110 compatible = "arm,cortex-a9-gic";
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| D | stih407-clock.dtsi | 28 * A9 PLL.
30 clockgen-a9@92b0000 {
34 clockgen_a9_pll: clockgen-a9-pll {
45 clk_m_a9: clk-m-a9@92b0000 {
47 compatible = "st,stih407-clkgen-a9-mux";
59 arm_periph_clk: clk-m-a9-periphs {
131 clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
137 clock-output-names = "clk-m-a9-ext2f-div2";
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| D | stih410-clock.dtsi | 31 * A9 PLL.
33 clockgen-a9@92b0000 {
37 clockgen_a9_pll: clockgen-a9-pll {
48 clk_m_a9: clk-m-a9@92b0000 {
50 compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";
60 arm_periph_clk: clk-m-a9-periphs {
131 clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
137 clock-output-names = "clk-m-a9-ext2f-div2";
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| D | stih418-clock.dtsi | 31 * A9 PLL.
33 clockgen-a9@92b0000 {
37 clockgen_a9_pll: clockgen-a9-pll {
48 clk_m_a9: clk-m-a9@92b0000 {
50 compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";
61 arm_periph_clk: clk-m-a9-periphs {
132 clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
138 clock-output-names = "clk-m-a9-ext2f-div2";
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| D | owl-s500.dtsi | 32 compatible = "arm,cortex-a9";
39 compatible = "arm,cortex-a9";
46 compatible = "arm,cortex-a9";
54 compatible = "arm,cortex-a9";
62 compatible = "arm,cortex-a9-pmu";
89 compatible = "arm,cortex-a9-scu";
94 compatible = "arm,cortex-a9-global-timer";
101 compatible = "arm,cortex-a9-twd-timer";
108 compatible = "arm,cortex-a9-twd-wdt";
115 compatible = "arm,cortex-a9-gic";
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| D | bcm63138.dtsi | 27 compatible = "arm,cortex-a9";
35 compatible = "arm,cortex-a9";
90 compatible = "arm,cortex-a9-scu";
95 compatible = "arm,cortex-a9-gic";
104 compatible = "arm,cortex-a9-global-timer";
111 compatible = "arm,cortex-a9-twd-timer";
119 compatible = "arm,cortex-a9-twd-wdt";
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| D | nuvoton-npcm730.dtsi | 18 compatible = "arm,cortex-a9";
27 compatible = "arm,cortex-a9";
37 compatible = "arm,cortex-a9-twd-timer";
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| /Linux-v5.15/Documentation/devicetree/bindings/arm/ |
| D | arm,scu.yaml | 13 As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided
18 - Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual
28 - arm,cortex-a9-scu
44 compatible = "arm,cortex-a9-scu";
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| /Linux-v5.15/arch/xtensa/boot/boot-redboot/ |
| D | bootstrap.S | 180 movi a9, complen
181 s32i a11, a9, 0
188 # a9 ptr to length
202 # a9 ptr to length
206 l32i a9, a8, 0
208 s32i a9, a6, 0
210 l32i a9, a8, 8
212 s32i a9, a6, 8
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| /Linux-v5.15/Documentation/devicetree/bindings/arm/cpu-enable-method/ |
| D | nuvoton,npcm750-smp | 10 Compatible CPUs: "arm,cortex-a9"
14 This enable method needs valid nodes compatible with "arm,cortex-a9-scu" and
26 compatible = "arm,cortex-a9";
35 compatible = "arm,cortex-a9";
|
| /Linux-v5.15/Documentation/devicetree/bindings/cpufreq/ |
| D | cpufreq-dt.txt | 31 compatible = "arm,cortex-a9";
45 compatible = "arm,cortex-a9";
51 compatible = "arm,cortex-a9";
57 compatible = "arm,cortex-a9";
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| /Linux-v5.15/arch/xtensa/include/asm/ |
| D | initialize_mmu.h | 209 addx4 a9, a8, a3
210 l32i a9, a9, 0
211 or a9, a9, a6
212 wptlb a9, a5
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| /Linux-v5.15/Documentation/devicetree/bindings/clock/st/ |
| D | st,clkgen-mux.txt | 13 "st,stih407-clkgen-a9-mux"
23 clk_m_a9: clk-m-a9@92b0000 {
25 compatible = "st,stih407-clkgen-a9-mux";
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| D | st,clkgen-pll.txt | 28 clockgen-a9@92b0000 {
32 clockgen_a9_pll: clockgen-a9-pll {
38 clock-output-names = "clockgen-a9-pll-odf";
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| /Linux-v5.15/arch/arm/mach-bcm/ |
| D | bcm63xx_smp.c | 22 /* Size of mapped Cortex A9 SCU address space */
26 * Enable the Cortex A9 Snoop Control Unit
29 * cores present. We assume we're running on a Cortex A9 processor,
70 /* The BCM63138 SoC has two Cortex-A9 CPUs, CPU0 features a complete in scu_a9_enable()
159 pr_warn("SMP: Cortex-A9 SCU setup failed\n"); in bcm63138_smp_prepare_cpus()
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| /Linux-v5.15/Documentation/devicetree/bindings/timer/ |
| D | arm,global_timer.yaml | 13 Cortex-A9 are often associated with a per-core Global timer.
20 - arm,cortex-a9-global-timer
43 compatible = "arm,cortex-a9-global-timer";
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| /Linux-v5.15/arch/xtensa/kernel/ |
| D | vectors.S | 386 * prior references thru a9/a13, and where our reference now thru
387 * a9/a13 gets a 2nd-level miss exception (not hardware TLB refill).
400 l32e a0, a9, -16
563 l32e a0, a9, -16
720 s32e a0, a9, -16
722 s32e a2, a9, -8
723 s32e a1, a9, -12
724 s32e a3, a9, -4
737 l32e a1, a9, -12
738 l32e a0, a9, -16
[all …]
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