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/Linux-v6.6/tools/testing/selftests/powerpc/tm/
Dtm-vmxcopy.c15 * (1) write A to a VSR
21 * (7) check that the VSR value is A
45 char *a; in test_vmxcopy() local
61 a = mmap(NULL, size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0); in test_vmxcopy()
62 assert(a != MAP_FAILED); in test_vmxcopy()
65 "lxvd2x 40,0,%[vecinptr];" /* set 40 to initial value*/ in test_vmxcopy()
69 "xxlxor 40,40,40;" /* set 40 to 0 */ in test_vmxcopy()
82 "stxvd2x 40,0,%[vecoutptr];" in test_vmxcopy()
86 [map]"r"(a) in test_vmxcopy()
95 munmap(a, size); in test_vmxcopy()
/Linux-v6.6/drivers/scsi/
Dmac_esp.c167 " jbeq 40f \n" \
170 "40: \n" \
172 " .section __ex_table,\"a\" \n" \
174 " .long 1b,40b \n" \
175 " .long 2b,40b \n" \
176 " .long 3b,40b \n" \
177 " .long 4b,40b \n" \
178 " .long 5b,40b \n" \
179 " .long 6b,40b \n" \
180 " .long 7b,40b \n" \
[all …]
/Linux-v6.6/drivers/gpu/drm/msm/hdmi/
Dqfprom.xml.h13 …sa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, from 2022-03-08 17:40:42)
14 …sa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, from 2022-03-08 17:40:42)
15 …sa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, from 2022-03-08 17:40:42)
17 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, from 2022-03-08 17:40:42)
18 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, from 2022-03-08 17:40:42)
19 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, from 2022-03-08 17:40:42)
20 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, from 2022-03-08 17:40:42)
21 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_14nm.xml ( 5381 bytes, from 2022-03-08 17:40:42)
22 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_10nm.xml ( 4499 bytes, from 2022-03-08 17:40:42)
23 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_7nm.xml ( 11007 bytes, from 2022-03-08 17:40:42)
[all …]
/Linux-v6.6/drivers/staging/rtl8192u/ieee80211/
Drtl819x_HT.h31 * This is available only in 40Mhz mode.
127 u8 bRegBW40MHz; // Tx 40MHz channel capability
128 u8 bCurBW40MHz; // Tx 40MHz channel capability
130 u8 bRegShortGI40MHz; // Tx Short GI for 40Mhz
131 u8 bCurShortGI40MHz; // Tx Short GI for 40MHz
150 // A-MSDU related
151 u8 bAMSDU_Support; // This indicates Tx A-MSDU capability
152 u16 nAMSDU_MaxSize; // This indicates Tx A-MSDU capability
153 u8 bCurrent_AMSDU_Support; // This indicates Tx A-MSDU capability
154 u16 nCurrent_AMSDU_MaxSize; // This indicates Tx A-MSDU capability
[all …]
/Linux-v6.6/drivers/gpu/drm/msm/dsi/
Dsfpb.xml.h13 …sa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, from 2022-03-08 17:40:42)
14 …sa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, from 2022-03-08 17:40:42)
15 …sa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, from 2022-03-08 17:40:42)
17 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, from 2022-03-08 17:40:42)
18 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, from 2022-03-08 17:40:42)
19 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, from 2022-03-08 17:40:42)
20 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, from 2022-03-08 17:40:42)
21 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_14nm.xml ( 5381 bytes, from 2022-03-08 17:40:42)
22 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_10nm.xml ( 4499 bytes, from 2022-03-08 17:40:42)
23 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_7nm.xml ( 11007 bytes, from 2022-03-08 17:40:42)
[all …]
Dmmss_cc.xml.h13 …sa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, from 2022-03-08 17:40:42)
14 …sa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, from 2022-03-08 17:40:42)
15 …sa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, from 2022-03-08 17:40:42)
17 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, from 2022-03-08 17:40:42)
18 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, from 2022-03-08 17:40:42)
19 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, from 2022-03-08 17:40:42)
20 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, from 2022-03-08 17:40:42)
21 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_14nm.xml ( 5381 bytes, from 2022-03-08 17:40:42)
22 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_10nm.xml ( 4499 bytes, from 2022-03-08 17:40:42)
23 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_7nm.xml ( 11007 bytes, from 2022-03-08 17:40:42)
[all …]
Ddsi_phy_10nm.xml.h13 …sa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, from 2022-03-08 17:40:42)
14 …sa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, from 2022-03-08 17:40:42)
15 …sa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, from 2022-03-08 17:40:42)
17 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, from 2022-03-08 17:40:42)
18 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, from 2022-03-08 17:40:42)
19 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, from 2022-03-08 17:40:42)
20 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, from 2022-03-08 17:40:42)
21 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_14nm.xml ( 5381 bytes, from 2022-03-08 17:40:42)
22 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_10nm.xml ( 4499 bytes, from 2022-03-08 17:40:42)
23 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_7nm.xml ( 11007 bytes, from 2022-03-08 17:40:42)
[all …]
Ddsi_phy_20nm.xml.h13 …sa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, from 2022-03-08 17:40:42)
14 …sa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, from 2022-03-08 17:40:42)
15 …sa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, from 2022-03-08 17:40:42)
17 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, from 2022-03-08 17:40:42)
18 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, from 2022-03-08 17:40:42)
19 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, from 2022-03-08 17:40:42)
20 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, from 2022-03-08 17:40:42)
21 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_14nm.xml ( 5381 bytes, from 2022-03-08 17:40:42)
22 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_10nm.xml ( 4499 bytes, from 2022-03-08 17:40:42)
23 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_7nm.xml ( 11007 bytes, from 2022-03-08 17:40:42)
[all …]
Ddsi_phy_28nm_8960.xml.h13 …sa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, from 2022-03-08 17:40:42)
14 …sa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, from 2022-03-08 17:40:42)
15 …sa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, from 2022-03-08 17:40:42)
17 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, from 2022-03-08 17:40:42)
18 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, from 2022-03-08 17:40:42)
19 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, from 2022-03-08 17:40:42)
20 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, from 2022-03-08 17:40:42)
21 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_14nm.xml ( 5381 bytes, from 2022-03-08 17:40:42)
22 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_10nm.xml ( 4499 bytes, from 2022-03-08 17:40:42)
23 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_7nm.xml ( 11007 bytes, from 2022-03-08 17:40:42)
[all …]
/Linux-v6.6/drivers/gpu/drm/msm/disp/
Dmdp_common.xml.h13 …sa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, from 2022-03-08 17:40:42)
14 …sa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, from 2022-03-08 17:40:42)
15 …sa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, from 2022-03-08 17:40:42)
17 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, from 2022-03-08 17:40:42)
18 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, from 2022-03-08 17:40:42)
19 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, from 2022-03-08 17:40:42)
20 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, from 2022-03-08 17:40:42)
21 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_14nm.xml ( 5381 bytes, from 2022-03-08 17:40:42)
22 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_10nm.xml ( 4499 bytes, from 2022-03-08 17:40:42)
23 …sa/mesa/src/freedreno/registers/dsi/dsi_phy_7nm.xml ( 11007 bytes, from 2022-03-08 17:40:42)
[all …]
/Linux-v6.6/Documentation/core-api/
Dpacking.rst10 One can memory-map a pointer to a carefully crafted struct over the hardware
20 A more robust alternative to struct field definitions would be to extract the
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
47 The following examples cover the memory layout of a packed u64 field.
55 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
71 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
77 inverts bit offsets inside a byte.
84 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
[all …]
/Linux-v6.6/tools/testing/selftests/tc-testing/tc-tests/filters/
Dbpf.json15 …r add dev $DEV1 parent ffff: handle 1 protocol ip prio 100 bpf bytecode '4,40 0 0 12,21 0 1 2048,6…
18 …parent ffff: protocol ip pref 100 bpf chain [0-9]+ handle 0x1.*bytecode '4,40 0 0 12,21 0 1 2048,6…
37 …r add dev $DEV1 parent ffff: handle 1 protocol ip prio 100 bpf bytecode '4,40 0 0 12,31 0 1 2048,6…
40 …parent ffff: protocol ip pref 100 bpf chain [0-9]+ handle 0x1.*bytecode '4,40 0 0 12,21 0 1 2048,6…
62 …tocol ip pref 100 bpf chain [0-9]+ handle 0x1 action.o:\\[action-ok\\].*tag [0-9a-f]{16}( jited)?",
84 …tocol ip pref 100 bpf chain [0-9]+ handle 0x1 action.o:\\[action-ko\\].*tag [0-9a-f]{16}( jited)?",
103 …r add dev $DEV1 parent ffff: handle 1 protocol ip prio 100 bpf bytecode '4,40 0 0 12,21 0 1 2048,6…
109 …place dev $DEV1 parent ffff: handle 1 protocol ip prio 100 bpf bytecode '4,40 0 0 12,21 0 1 2054,6…
112 …parent ffff: protocol ip pref 100 bpf chain [0-9]+ handle 0x1.*bytecode '4,40 0 0 12,21 0 1 2054,6…
131 …r add dev $DEV1 parent ffff: handle 1 protocol ip prio 100 bpf bytecode '4,40 0 0 12,21 0 1 2048,6…
[all …]
/Linux-v6.6/tools/testing/selftests/net/forwarding/
Dip6gre_inner_v4_multipath.sh7 # policy, SW2 will only look at the outer IP addresses, hence only a single
22 # | loc=2001:db8:40::1 |
23 # | rem=2001:db8:40::2 --. |
59 # | loc=2001:db8:40::2 | |
60 # | rem=2001:db8:40::1 --' |
98 tunnel_create g1 ip6gre 2001:db8:40::1 2001:db8:40::2 tos inherit dev v$ol1
99 __simple_if_init g1 v$ol1 2001:db8:40::1/128
100 ip -6 route add vrf v$ol1 2001:db8:40::2/128 via 2001:db8:80::2
109 ip -6 route del vrf v$ol1 2001:db8:40::2/128
110 __simple_if_fini g1 2001:db8:40::1/128
[all …]
Dip6gre_inner_v6_multipath.sh7 # policy, SW2 will only look at the outer IP addresses, hence only a single
22 # | loc=2001:db8:40::1 |
23 # | rem=2001:db8:40::2 --. |
59 # | loc=2001:db8:40::2 | |
60 # | rem=2001:db8:40::1 --' |
98 tunnel_create g1 ip6gre 2001:db8:40::1 2001:db8:40::2 tos inherit dev v$ol1
99 __simple_if_init g1 v$ol1 2001:db8:40::1/128
100 ip -6 route add vrf v$ol1 2001:db8:40::2/128 via 2001:db8:80::2
109 ip -6 route del vrf v$ol1 2001:db8:40::2/128
110 __simple_if_fini g1 2001:db8:40::1/128
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/
Dnuma.txt9 Systems employing a Non Uniform Memory Access (NUMA) architecture contain
11 that comprise what is commonly known as a NUMA node.
21 For the purpose of identification, each NUMA node is associated with a unique
22 token known as a node id. For the purpose of this binding
23 a node id is a 32-bit integer.
25 A device node is associated with a NUMA node by the presence of a
45 This property defines a matrix to describe the relative distances
47 It is represented as a list of node pairs and their relative distance.
52 2. The distance from a node to self (local distance) is represented
54 a value greater than 10.
[all …]
/Linux-v6.6/drivers/auxdisplay/
DKconfig3 # For a description of the syntax of this configuration file,
38 This is a module with the common symbols for HD44780 (and compatibles)
49 Enable support for Character LCDs using a HD44780 controller.
51 This code can either be compiled as a module, or linked into the
60 If you have a LCD controlled by one or more KS0108
65 parport, you will be able to compile this as a module (M)
68 To compile this as a module, choose M here:
84 You can specify a different address if you need.
92 If you compile this as a module, you can still override this
107 If you compile this as a module, you can still override this
[all …]
/Linux-v6.6/Documentation/powerpc/
Dassociativity.rst7 of that domain. Resources subsets of a given domain that exhibit better
9 are represented as being members of a sub-grouping domain. This performance
19 A value of 1 indicates the usage of Form 1 associativity. For Form 2 associativity
28 With Form 1 a combination of ibm,associativity-reference-points, and ibm,associativity
31 The “ibm,associativity” property contains a list of one or more numbers (domainID)
34 The “ibm,associativity-reference-points” property contains a list of one or more numbers
52 "ibm,associativity-reference-points" property, Form 2 allows a large number of primary domain
59 "ibm,numa-lookup-index-table" property contains a list of one or more numbers representing
71 "ibm,numa-distance-table" property contains a list of one or more numbers representing the NUMA
80 ibm,numa-lookup-index-table = <3 0 8 40>;
[all …]
/Linux-v6.6/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dchannel.c31 /* QDB() macro takes a dB value and converts to a quarter dB value */
60 #define BRCM_2GHZ_2412_2462 REG_RULE(2412-10, 2462+10, 40, 0, 19, 0)
64 #define BRCM_5GHZ_5180_5240 REG_RULE(5180-10, 5240+10, 40, 0, 21, \
66 #define BRCM_5GHZ_5260_5320 REG_RULE(5260-10, 5320+10, 40, 0, 21, \
69 #define BRCM_5GHZ_5500_5700 REG_RULE(5500-10, 5700+10, 40, 0, 21, \
72 #define BRCM_5GHZ_5745_5825 REG_RULE(5745-10, 5825+10, 40, 0, 21, \
95 /* tx 40 MHz power limits, qdBm units */
248 /* 40 MHz Legacy OFDM SISO */ in brcms_c_channel_min_txpower_limits_with_local_constraint()
253 /* 40 MHz Legacy OFDM CDD */ in brcms_c_channel_min_txpower_limits_with_local_constraint()
278 /* 40MHz MCS 0-7 SISO */ in brcms_c_channel_min_txpower_limits_with_local_constraint()
[all …]
/Linux-v6.6/arch/m68k/lib/
Duaccess.c43 " .section __ex_table,\"a\"\n" in __generic_copy_from_user()
49 : "=d" (res), "+a" (from), "+a" (to), "=&d" (tmp) in __generic_copy_from_user()
84 " .section __ex_table,\"a\"\n" in __generic_copy_to_user()
93 : "=d" (res), "+a" (from), "+a" (to), "=&d" (tmp) in __generic_copy_to_user()
124 "40: add.l %4,%0\n" in __clear_user()
128 " .section __ex_table,\"a\"\n" in __clear_user()
132 " .long 4b,40b\n" in __clear_user()
133 " .long 5b,40b\n" in __clear_user()
134 " .long 6b,40b\n" in __clear_user()
135 " .long 7b,40b\n" in __clear_user()
[all …]
/Linux-v6.6/arch/powerpc/include/asm/nohash/32/
Dpte-40x.h7 * At present, all PowerPC 400-class processors share a similar TLB
8 * architecture. The instruction and data sides share a unified,
10 * software control. In addition, the instruction side has a
11 * hardware-managed, 4-entry, fully-associative TLB which serves as a
15 * There are several potential gotchas here. The 40x hardware TLBLO
23 * - bits 20 and 21 must be cleared, because we use 4k pages (40x can
31 * use the top 30 bits. Because 40x doesn't support SMP anyway, M is
42 #define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */
55 /* cache related flags non existing on 40x */
72 /* Until my rework is finished, 40x still needs atomic PTE updates */
/Linux-v6.6/Documentation/tools/rtla/
Drtla-osnoise-hist.rst5 Display a histogram of the osnoise tracer samples
19 occurrence in a histogram, displaying the results in a user-friendly way.
48 …40 0 0 0 0 0 4 2 7 2 …
54 …max: 30 30 20 20 30 40 40 40 40 …
/Linux-v6.6/Documentation/filesystems/ext4/
Ddirectory.rst6 In an ext4 filesystem, a directory is more or less a flat file that maps
12 associated with a directory file for the particular directory entry that
19 array. I write “almost” because it's not a linear array in the memory
21 Therefore, it is more accurate to say that a directory is a series of
22 data blocks and that each block contains a linear array of directory
24 end of the block; the last entry in the block has a record length that
37 :widths: 8 8 24 40
51 - Length of this directory entry. Must be a multiple of 4.
62 entry format shortens the name_len field and uses the space for a file
69 :widths: 8 8 24 40
[all …]
/Linux-v6.6/arch/powerpc/platforms/
DKconfig.cputype10 This option selects whether a 32-bit or a 64-bit kernel
23 (85xx) each form a family of their own that is not compatible
46 config 40x
47 bool "AMCC 40x"
71 processors don't have a HASH MMU and provide SW TLB loading.
79 Those processors have a HASH MMU.
113 select PPC_FPU # Make it a choice ?
123 This will create a kernel which is optimised for a particular CPU.
198 bool "40x family"
199 depends on 40x
[all …]
/Linux-v6.6/drivers/input/joystick/
Dgf2k.c25 #define GF2K_STROBE 40 /* The time we wait for the first bit [40 us] */
27 #define GF2K_LENGTH 80 /* Max number of triplets in a packet */
42 static char gf2k_length[] = { 40, 40, 40, 40, 40, 40, 40, 40 };
72 * gf2k_read_packet() reads a Genius Flight2000 packet.
107 * gf2k_trigger_seq() initializes a Genius Flight2000 joystick
133 * js_sw_get_bits() composes bits from the triplet buffer into a __u64.
166 t = GB(40,4,0); in gf2k_read()
/Linux-v6.6/tools/testing/selftests/bpf/progs/
Dverifier_spill_fill.c60 /* store a pointer to the reserved memory in R6 */\ in spill_fill_ptr_to_mem()
98 /* store a pointer to the reserved memory in R6 */\ in with_invalid_reg_offset_0()
174 __description("Spill and refill a u32 const scalar. Offset to skb->data")
200 __description("Spill a u32 const, refill from another half of the uninit u32 from the stack")
218 __description("Spill a u32 const scalar. Refill as u16. Offset to skb->data")
272 __description("Spill a u32 const scalar. Refill as u16 from fp-6. Offset to skb->data")
298 __description("Spill and refill a u32 const scalar at non 8byte aligned stack addr. Offset to skb-…
325 __description("Spill and refill a umax=40 bounded scalar. Offset to skb->data")
333 if r4 <= 40 goto l0_%=; \ in scalar_offset_to_skb_data_2()
336 l0_%=: /* *(u32 *)(r10 -8) = r4 R4=umax=40 */ \ in scalar_offset_to_skb_data_2()
[all …]

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