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/Linux-v6.1/Documentation/core-api/
Dpacking.rst6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
15 definitions from the hardware documentation into bit field indices for the
18 (sometimes even 64 bit ones). This creates the inconvenience of having to
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
[all …]
/Linux-v6.1/arch/powerpc/platforms/
DKconfig.cputype1 # SPDX-License-Identifier: GPL-2.0
7 bool "64-bit kernel"
10 This option selects whether a 32-bit or a 64-bit kernel
18 There are five families of 32 bit PowerPC chips supported.
46 config 40x
47 bool "AMCC 40x"
85 There are two families of 64 bit PowerPC chips supported.
189 bool "40x family"
190 depends on 40x
318 depends on 40x || 44x
[all …]
/Linux-v6.1/arch/alpha/kernel/
Dsys_sable.c1 // SPDX-License-Identifier: GPL-2.0
9 * Code supporting the Sable, Sable-Gamma, and Lynx systems.
39 /* Note mask bit is true for DISABLED irqs. */
42 void (*update_irq_hw)(unsigned long bit, unsigned long mask);
43 void (*ack_irq_hw)(unsigned long bit);
55 * For SABLE, which is really baroque, we manage 40 IRQ's, but the
58 * 0-7 (char at 536)
59 * 8-15 (char at 53a)
60 * 16-23 (char at 53c)
64 * Bit Meaning Kernel IRQ
[all …]
Dsys_wildfire.c1 // SPDX-License-Identifier: GPL-2.0
41 int qbbno = (irq >> 8) & (WILDFIRE_MAX_QBB - 1); in wildfire_update_irq_hw()
42 int pcano = (irq >> 6) & (WILDFIRE_PCA_PER_QBB - 1); in wildfire_update_irq_hw()
49 " got irq %d for non-existent PCA %d" in wildfire_update_irq_hw()
57 enable0 = (unsigned long *) &pca->pca_int[0].enable; /* ??? */ in wildfire_update_irq_hw()
72 enable0 = (unsigned long *) &pca->pca_int[0].enable; in wildfire_init_irq_hw()
73 enable1 = (unsigned long *) &pca->pca_int[1].enable; in wildfire_init_irq_hw()
74 enable2 = (unsigned long *) &pca->pca_int[2].enable; in wildfire_init_irq_hw()
75 enable3 = (unsigned long *) &pca->pca_int[3].enable; in wildfire_init_irq_hw()
77 target0 = (unsigned long *) &pca->pca_int[0].target; in wildfire_init_irq_hw()
[all …]
/Linux-v6.1/arch/mips/loongson64/
Ddma.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/dma-direct.h>
9 /* We extract 2bit node id (bit 44~47, only bit 44~45 used now) from in phys_to_dma()
10 * Loongson-3's 48bit address space and embed it into 40bit */ in phys_to_dma()
18 /* We extract 2bit node id (bit 44~47, only bit 44~45 used now) from in dma_to_phys()
19 * Loongson-3's 48bit address space and embed it into 40bit */ in dma_to_phys()
/Linux-v6.1/arch/powerpc/include/asm/nohash/32/
Dpte-40x.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * At present, all PowerPC 400-class processors share a similar TLB
9 * 64-entry, fully-associative TLB which is maintained totally under
11 * hardware-managed, 4-entry, fully-associative TLB which serves as a
15 * There are several potential gotchas here. The 40x hardware TLBLO
23 * - bits 20 and 21 must be cleared, because we use 4k pages (40x can
26 * - We use only zones 0 (for kernel pages) and 1 (for user pages)
27 * of the 16 available. Bit 24-26 of the TLB are cleared in the TLB
28 * miss handler. Bit 27 is PAGE_USER, thus selecting the correct
30 * - PRESENT *must* be in the bottom two bits because swap cache
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dpxa3xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
18 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
19 (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) : \
20 (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) : \
21 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
23 (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) : \
33 (gpio <= 9) ? (0x028c + 4 * (gpio - 5)) : \
[all …]
/Linux-v6.1/drivers/mtd/nand/raw/
Dnand_ids.c1 // SPDX-License-Identifier: GPL-2.0-only
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
41 {"TC58NVG5D2 32G 3.3V 8-bit",
43 SZ_8K, SZ_4K, SZ_1M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
44 {"TC58NVG6D2 64G 3.3V 8-bit",
46 SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
47 {"SDTNRGAMA 64G 3.3V 8-bit",
[all …]
/Linux-v6.1/Documentation/powerpc/
Dassociativity.rst9 are represented as being members of a sub-grouping domain. This performance
17 Hypervisor indicates the type/form of associativity used via "ibm,architecture-vec-5 property".
18 Bit 0 of byte 5 in the "ibm,architecture-vec-5" property indicates usage of Form 0 or Form 1.
20 bit 2 of byte 5 in the "ibm,architecture-vec-5" property is used.
23 ------
27 ------
28 With Form 1 a combination of ibm,associativity-reference-points, and ibm,associativity
34 The “ibm,associativity-reference-points” property contains a list of one or more numbers
43 if they belong to the same higher-level domains. For mismatch at every higher
48 -------
[all …]
/Linux-v6.1/arch/arm/mach-ep93xx/
Dtimer-ep93xx.c1 // SPDX-License-Identifier: GPL-2.0
16 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
17 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
18 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
19 * is free-running, and can't generate interrupts.
22 * most common values of HZ divide 508 kHz nicely. We pick the 32 bit
28 * a stable 40 bit time base.
115 evt->event_handler(evt); in ep93xx_timer_interrupt()
129 EP93XX_TIMER4_RATE, 200, 40, in ep93xx_timer_init()
131 sched_clock_register(ep93xx_read_sched_clock, 40, in ep93xx_timer_init()
/Linux-v6.1/arch/mips/include/asm/octeon/
Dcvmx.h7 * Copyright (c) 2003-2017 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
42 /* These macros for use when using 32 bit pointers. */
56 #include <asm/octeon/cvmx-asm.h>
57 #include <asm/octeon/cvmx-packet.h>
58 #include <asm/octeon/cvmx-sysinfo.h>
60 #include <asm/octeon/cvmx-ciu-defs.h>
61 #include <asm/octeon/cvmx-ciu3-defs.h>
62 #include <asm/octeon/cvmx-gpio-defs.h>
[all …]
/Linux-v6.1/drivers/net/ethernet/microchip/sparx5/
Dsparx5_netdev.c1 // SPDX-License-Identifier: GPL-2.0+
12 /* The IFH bit position of the first VSTAX bit. This is because the
13 * VSTAX bit positions in Data sheet is starting from zero.
21 /* Max width is 5 bytes - 40 bits. In worst case this will
22 * spread over 6 bytes - 48 bits
24 compiletime_assert(width <= 40, \
25 "Unsupported width, must be <= 40"); \
32 /* Calculate the Start IFH byte position of this IFH bit position */ in __ifh_encode_bitfield()
33 u32 byte = (35 - (pos / 8)); in __ifh_encode_bitfield()
34 /* Calculate the Start bit position in the Start IFH byte */ in __ifh_encode_bitfield()
[all …]
/Linux-v6.1/drivers/staging/fbtft/
Dfb_hx8353d.c1 // SPDX-License-Identifier: GPL-2.0+
18 #define DEFAULT_GAMMA "50 77 40 08 BF 00 03 0F 00 01 73 00 72 03 B0 0F 08 00 0F"
22 par->fbtftops.reset(par); in init_display()
43 /* SLPOUT - Sleep out & booster on */ in init_display()
47 /* DISPON - Display On */ in init_display()
53 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, in init_display()
56 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, in init_display()
59 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62); in init_display()
76 #define my BIT(7)
77 #define mx BIT(6)
[all …]
/Linux-v6.1/drivers/net/wireless/marvell/mwifiex/
Dcfp.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2011-2020 NXP
66 /* LGI 40M */
70 /* SGI 40M */
101 /* LG 40M */
105 /* SG 40M */
134 /* LG 40M */
138 /* SG 40M */
195 /* 20M: bw=0, 40M: bw=1, 80M: bw=2, 160M: bw=3 */ in mwifiex_index_to_acs_data_rate()
202 rate = ac_mcs_rate_nss2[2 * (3 - bw) + gi][mcs_index]; in mwifiex_index_to_acs_data_rate()
[all …]
/Linux-v6.1/drivers/input/joystick/
Dgf2k.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 1998-2001 Vojtech Pavlik
24 #define GF2K_START 400 /* The time we wait for the first bit [400 us] */
25 #define GF2K_STROBE 40 /* The time we wait for the first bit [40 us] */
42 static char gf2k_length[] = { 40, 40, 40, 40, 40, 40, 40, 40 };
43 … char gf2k_hat_to_axis[][2] = {{ 0, 0}, { 0,-1}, { 1,-1}, { 1, 0}, { 1, 1}, { 0, 1}, {-1, 1}, {-1,…
45 static char *gf2k_names[] = {"", "Genius G-09D", "Genius F-30D", "Genius F-30", "Genius MaxFighter …
46 "Genius F-30-5", "Genius Flight2000 F-23", "Genius F-31"};
93 t--; u = v; in gf2k_read_packet()
123 while ((gameport_read(gameport) & 1) && t) t--; in gf2k_trigger_seq()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/ufs/
Dsnps,tc-dwc-g210.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/snps,tc-dwc-g210.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Wei <liwei213@huawei.com>
18 - snps,dwc-ufshcd-1.40a
20 - compatible
23 - $ref: ufs-common.yaml
28 - enum:
29 - snps,g210-tc-6.00-20bit
[all …]
/Linux-v6.1/drivers/auxdisplay/
Dpanel.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (C) 2000-2008, Willy Tarreau <w@1wt.eu>
5 * Copyright (C) 2016-2017 Glider bvba
10 * The LCD module may either be an HD44780-like 8-bit parallel LCD, or a 1-bit
15 * data output pins or to the ground. The combinations have to be hard-coded
22 * - the initialization/deinitialization process is very dirty and should
26 * - document 24 keys keyboard (3 rows of 8 cols, 32 diodes + 2 inputs)
27 * - make the LCD a part of a virtual screen of Vx*Vy
28 * - make the inputs list smp-safe
29 * - change the keyboard to a double mapping : signals -> key_id -> values
[all …]
/Linux-v6.1/sound/soc/codecs/
Dmsm8916-wcd-digital.c1 // SPDX-License-Identifier: GPL-2.0
21 #define CLK_RX_RESET_B1_CTL_TX1_RESET_MASK BIT(0)
22 #define CLK_RX_RESET_B1_CTL_TX2_RESET_MASK BIT(1)
30 #define DMIC_B1_CTL_DMIC0_CLK_EN_MASK BIT(0)
31 #define DMIC_B1_CTL_DMIC0_CLK_EN_ENABLE BIT(0)
34 #define RX_I2S_CTL_RX_I2S_MODE_MASK BIT(5)
35 #define RX_I2S_CTL_RX_I2S_MODE_16 BIT(5)
45 #define TX_I2S_CTL_TX_I2S_MODE_MASK BIT(5)
46 #define TX_I2S_CTL_TX_I2S_MODE_16 BIT(5)
61 #define MCLK_CTL_MCLK_EN_MASK BIT(0)
[all …]
/Linux-v6.1/Documentation/filesystems/ext4/
Dinodes.rst1 .. SPDX-License-Identifier: GPL-2.0
4 -----------
11 that file. ext4 appears to cheat (for performance reasons) a little bit
15 links and is in general more seek-happy than ext4 due to its simpler
22 ``(inode_number - 1) / sb.s_inodes_per_group``, and the offset into the
23 group's table is ``(inode_number - 1) % sb.s_inodes_per_group``. There
31 .. list-table::
32 :widths: 8 8 24 40
33 :header-rows: 1
36 * - Offset
[all …]
/Linux-v6.1/arch/powerpc/lib/
Dchecksum_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * This file contains assembly-language implementations
4 * of IP-style 1's complement checksum routines.
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
19 * and adds in "sum" (32-bit).
35 rldicl. r6,r3,64-1,64-2 /* r6 = (r3 >> 1) & 0x3 */
62 stdu r1,-STACKFRAMESIZE(r1)
83 ld r14,40(r3)
110 ld r14,40(r3)
176 rldicl r4,r0,32,0 /* fold two 32 bit halves together */
[all …]
/Linux-v6.1/drivers/gpio/
Dgpio-f7188x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * GPIO driver for Fintek and Nuvoton Super-I/O chips
5 * Copyright (C) 2010-2013 LaCie
10 #define DRVNAME "gpio-f7188x"
21 * Super-I/O registers
26 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
27 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
99 * Super-I/O functions.
131 return -EBUSY; in superio_enter()
187 /* Output mode register (0:open drain 1:push-pull). */
[all …]
/Linux-v6.1/drivers/clk/uniphier/
Dclk-uniphier-sys.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include "clk-uniphier.h"
12 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 8), \
13 UNIPHIER_CLK_FACTOR("sd-133m", -1, "vpll27a", 1, 2)
16 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 12), \
17 UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 18)
20 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 10), \
21 UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 15)
24 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 4), \
25 UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 6)
[all …]
/Linux-v6.1/drivers/net/ppp/
Dppp_mppe.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 #define MPPE_MAX_KEY_LEN 16 /* largest key length (128-bit) */
6 #define MPPE_OPT_40 0x01 /* 40 bit */
7 #define MPPE_OPT_128 0x02 /* 128 bit */
10 #define MPPE_OPT_56 0x08 /* 56 bit */
19 * names above since C and H are the same bit. We could do a u_int32
25 #define MPPE_L_BIT 0x20 /* 40-bit */
26 #define MPPE_S_BIT 0x40 /* 128-bit */
27 #define MPPE_M_BIT 0x80 /* 56-bit, not supported */
30 /* Does not include H bit; used for least significant octet only. */
[all …]
/Linux-v6.1/arch/m68k/fpsp040/
Dfpsp.h11 | fpsp.h --- stack frame offsets during FPSP exception handling
18 | link a6,#-LOCAL_SIZE
19 | fsave -(a7)
20 | movem.l d0-d1/a0-a1,USER_DA(a6)
21 | fmovem.x fp0-fp3,USER_FP0(a6)
26 | A7 ---> +-------------------------------+
30 | +-------------------------------+
36 | +-------------------------------+
37 | A6 ---> | Saved A6 |
38 | +-------------------------------+
[all …]
/Linux-v6.1/include/linux/
Dexportfs.h1 /* SPDX-License-Identifier: GPL-2.0 */
33 * 32bit inode number, 32 bit generation number.
38 * 32bit inode number, 32 bit generation number,
39 * 32 bit parent directory inode number.
44 * 64 bit object ID, 64 bit root object ID,
45 * 32 bit generation number.
50 * 64 bit object ID, 64 bit root object ID,
51 * 32 bit generation number,
52 * 64 bit parent object ID, 32 bit parent generation.
57 * 64 bit object ID, 64 bit root object ID,
[all …]

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