/Linux-v6.6/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
D | smu13_driver_if_aldebaran.h | 70 #define FEATURE_SPARE_32_BIT 32 145 #define ALDEBARAN_UMC_CHANNEL_NUM 32 292 uint16_t MaxVoltageGfx; // In mV(Q2) Maximum Voltage allowable of VDD_GFX 293 uint16_t MaxVoltageSoc; // In mV(Q2) Maximum Voltage allowable of VDD_SOC 342 int16_t GFX_Guardband_Voltage_Cold[8]; // mV [signed] 343 int16_t GFX_Guardband_Voltage_Mid[8]; // mV [signed] 344 int16_t GFX_Guardband_Voltage_Hot[8]; // mV [signed] 347 int16_t SOC_Guardband_Voltage_Cold[8]; // mV [signed] 348 int16_t SOC_Guardband_Voltage_Mid[8]; // mV [signed] 349 int16_t SOC_Guardband_Voltage_Hot[8]; // mV [signed] [all …]
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D | smu11_driver_if_sienna_cichlid.h | 111 #define FEATURE_FAN_CONTROL_BIT 32 609 uint32_t FeaturesToRun[NUM_FEATURES / 32]; 633 uint16_t SmnclkDpmVoltage [NUM_SMNCLK_DPM_LEVELS]; // mV(Q2) 636 uint16_t PerPartDroopVsetGfxDfll[NUM_PIECE_WISE_LINEAR_DROOP_MODEL_VF_POINTS]; //In mV(Q2) 646 uint16_t UlvVoltageOffsetSoc; // In mV(Q2) 647 uint16_t UlvVoltageOffsetGfx; // In mV(Q2) 649 uint16_t MinVoltageUlvGfx; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_GFX in ULV mode 650 uint16_t MinVoltageUlvSoc; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_SOC in ULV mode 652 uint16_t SocLIVmin; // In mV(Q2) Long Idle Vmin (deep ULV), for VDD_SOC 659 uint16_t MinVoltageGfx; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_GFX [all …]
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D | smu13_driver_if_v13_0_0.h | 80 #define FEATURE_GFX_READ_MARGIN_BIT 32 264 DRAM_BIT_WIDTH_X_32 = 32, 863 uint16_t InitGfx; // In mV(Q2) , should be 0? 864 uint16_t InitSoc; // In mV(Q2) 865 uint16_t InitU; // In Mv(Q2) 919 uint16_t DcTol; // mV Q2 920 uint16_t DcBtcGb; // mV Q2 922 uint16_t DcBtcMin; // mV Q2 923 uint16_t DcBtcMax; // mV Q2 932 uint16_t VInversion; // in mV Q2 [all …]
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D | smu13_driver_if_v13_0_7.h | 81 #define FEATURE_GFX_READ_MARGIN_BIT 32 265 DRAM_BIT_WIDTH_X_32 = 32, 872 uint16_t InitGfx; // In mV(Q2) , should be 0? 873 uint16_t InitSoc; // In mV(Q2) 874 uint16_t InitU; // In Mv(Q2) not applicable 928 uint16_t DcTol; // mV Q2 929 uint16_t DcBtcGb; // mV Q2 931 uint16_t DcBtcMin; // mV Q2 932 uint16_t DcBtcMax; // mV Q2 941 uint16_t VInversion; // in mV Q2 [all …]
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D | smu11_driver_if_arcturus.h | 92 #define FEATURE_SPARE_32_BIT 32 497 uint16_t UlvVoltageOffsetGfx; // In mV(Q2) 504 uint16_t MinVoltageGfx; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_GFX 505 uint16_t MinVoltageSoc; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_SOC 506 uint16_t MaxVoltageGfx; // In mV(Q2) Maximum Voltage allowable of VDD_GFX 507 uint16_t MaxVoltageSoc; // In mV(Q2) Maximum Voltage allowable of VDD_SOC 526 uint16_t Mp0DpmVoltage [NUM_MP0CLK_DPM_LEVELS]; // mV(Q2) 583 uint16_t DcTol[AVFS_VOLTAGE_COUNT]; // mV Q2 588 uint16_t DcBtcMin[AVFS_VOLTAGE_COUNT]; // mV Q2 589 uint16_t DcBtcMax[AVFS_VOLTAGE_COUNT]; // mV Q2 [all …]
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D | smu11_driver_if_navi10.h | 106 #define FEATURE_FAN_CONTROL_BIT 32 558 uint16_t UlvVoltageOffsetSoc; // In mV(Q2) 559 uint16_t UlvVoltageOffsetGfx; // In mV(Q2) 569 uint16_t MinVoltageUlvGfx; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_GFX in ULV mode 570 uint16_t MinVoltageUlvSoc; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_SOC in ULV mode 574 uint16_t MinVoltageGfx; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_GFX 575 uint16_t MinVoltageSoc; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_SOC 576 uint16_t MaxVoltageGfx; // In mV(Q2) Maximum Voltage allowable of VDD_GFX 577 uint16_t MaxVoltageSoc; // In mV(Q2) Maximum Voltage allowable of VDD_SOC 603 uint16_t Mp0DpmVoltage [NUM_MP0CLK_DPM_LEVELS]; // mV(Q2) [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/regulator/ |
D | maxim,max8952.yaml | 46 - 0: 32mV/us 47 - 1: 16mV/us 48 - 2: 8mV/us 49 - 3: 4mV/us 50 - 4: 2mV/us 51 - 5: 1mV/us 52 - 6: 0.5mV/us 53 - 7: 0.25mV/us 54 Defaults to 32mV/us if not specified.
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/Linux-v6.6/drivers/media/v4l2-core/ |
D | v4l2-vp9.c | 19 { 73, 32, 19, 187, 222, 215, 46, 34, 100 }, /*left = h */ 20 { 91, 30, 32, 116, 121, 186, 93, 86, 94 }, /*left = d45 */ 25 { 74, 32, 27, 107, 86, 160, 63, 134, 102 }, /*left = d63 */ 33 { 38, 32, 85, 140, 46, 112, 54, 151, 133 }, /*left = d117*/ 39 { 82, 26, 26, 171, 208, 204, 44, 32, 105 }, /*left = dc */ 54 { 60, 32, 33, 112, 71, 220, 64, 89, 104 }, /*left = d135*/ 79 { 45, 18, 32, 130, 90, 157, 40, 79, 91 }, /*left = d207*/ 83 { 75, 17, 22, 136, 138, 185, 32, 34, 166 }, /*left = dc */ 90 { 51, 24, 14, 115, 133, 209, 32, 26, 104 }, /*left = d207*/ 94 { 82, 22, 32, 127, 143, 213, 39, 41, 70 }, /*left = dc */ [all …]
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/Linux-v6.6/arch/sh/kernel/ |
D | machvec.c | 20 #define MV_NAME_SIZE 32 22 #define for_each_mv(mv) \ argument 23 for ((mv) = (struct sh_machine_vector *)__machvec_start; \ 24 (mv) && (unsigned long)(mv) < (unsigned long)__machvec_end; \ 25 (mv)++) 29 struct sh_machine_vector *mv; in get_mv_byname() local 31 for_each_mv(mv) in get_mv_byname() 32 if (strcasecmp(name, mv->mv_name) == 0) in get_mv_byname() 33 return mv; in get_mv_byname()
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/Linux-v6.6/tools/power/cpupower/debug/i386/ |
D | centrino-decode.c | 24 #define MCPU 32 54 *hi = (uint32_t )(val>>32 & 0xffffffffull); in rdmsr() 66 unsigned int mv; in decode() local 70 mv = (((msr & 0xFF) * 16) + 700); in decode() 72 printf("0x%x means multiplier %d @ %d mV\n", msr, multiplier, mv); in decode()
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/Linux-v6.6/drivers/hwmon/ |
D | ltc2945.c | 82 /* Return the value from the given register in uW, mV, or mA */ 121 /* 25 mV * 25 uV = 0.625 uV resolution. */ in ltc2945_reg_to_val() 124 /* 0.5 mV * 25 uV = 0.0125 uV resolution. */ in ltc2945_reg_to_val() 132 * val can still be > 32 bits so returning long long makes sense in ltc2945_reg_to_val() 141 /* 25 mV resolution. Convert to mV. */ in ltc2945_reg_to_val() 149 /* 0.5mV resolution. Convert to mV. */ in ltc2945_reg_to_val() 196 /* 25 mV * 25 uV = 0.625 uV resolution. */ in ltc2945_val_to_reg() 198 /* Overflow check: Assuming 32-bit val and shunt resistor, val <= 64bits */ in ltc2945_val_to_reg() 202 /* 0.5 mV * 25 uV = 0.0125 uV resolution. */ in ltc2945_val_to_reg() 204 /* Overflow check: Assuming 32-bit val and shunt resistor, val <= 64bits */ in ltc2945_val_to_reg() [all …]
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/Linux-v6.6/arch/riscv/kernel/ |
D | mcount-dyn.S | 22 #define ABI_A4 32 91 mv a1, ra 92 mv a3, sp 103 mv a2, s0 120 mv a1, ra 121 mv a3, sp 132 mv a2, s0
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/Linux-v6.6/include/linux/ |
D | ethtool_netlink.h | 11 DIV_ROUND_UP(__ETHTOOL_LINK_MODE_MASK_NBITS, 32) 28 int ethnl_cable_test_amplitude(struct phy_device *phydev, u8 pair, s16 mV); 29 int ethnl_cable_test_pulse(struct phy_device *phydev, u16 mV); 70 u8 pair, s16 mV) in ethnl_cable_test_amplitude() argument 75 static inline int ethnl_cable_test_pulse(struct phy_device *phydev, u16 mV) in ethnl_cable_test_pulse() argument
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/Linux-v6.6/drivers/cpufreq/ |
D | longhaul.c | 83 static int mults[32]; 84 static int eblcr[32]; 557 if (minvid.mV == 0 || maxvid.mV == 0 || minvid.mV > maxvid.mV) { in longhaul_setup_voltagescaling() 559 minvid.mV/1000, minvid.mV%1000, in longhaul_setup_voltagescaling() 560 maxvid.mV/1000, maxvid.mV%1000); in longhaul_setup_voltagescaling() 564 if (minvid.mV == maxvid.mV) { in longhaul_setup_voltagescaling() 566 maxvid.mV/1000, maxvid.mV%1000); in longhaul_setup_voltagescaling() 573 maxvid.mV/1000, maxvid.mV%1000, in longhaul_setup_voltagescaling() 574 minvid.mV/1000, minvid.mV%1000, in longhaul_setup_voltagescaling() 610 pr_info("f: %d kHz, index: %d, vid: %d mV\n", in longhaul_setup_voltagescaling() [all …]
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/Linux-v6.6/tools/testing/selftests/rseq/ |
D | rseq-riscv.h | 20 #elif __riscv_xlen == 32 55 ".balign 32\n" \ 149 "mv " RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(len) "]\n" \ 150 "mv " RSEQ_ASM_TMP_REG_2 ", %[" __rseq_str(src) "]\n" \ 151 "mv " RSEQ_ASM_TMP_REG_3 ", %[" __rseq_str(dst) "]\n" \ 162 "mv " RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(ptr) "]\n" \
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/Linux-v6.6/drivers/staging/fbtft/ |
D | fb_hx8353d.c | 53 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, in init_display() 56 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, in init_display() 59 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62); in init_display() 78 #define mv BIT(5) macro 96 my | mv | (par->bgr << 3)); in set_var() 104 mx | mv | (par->bgr << 3)); in set_var()
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/Linux-v6.6/drivers/scsi/ |
D | ch.c | 493 for (i = 0; i < 32; i++) { in ch_check_voltag() 532 memcpy(buffer,tag,32); in ch_set_voltag() 702 struct changer_move mv; in ch_ioctl() local 704 if (copy_from_user(&mv, argp, sizeof (mv))) in ch_ioctl() 707 if (0 != ch_checkrange(ch, mv.cm_fromtype, mv.cm_fromunit) || in ch_ioctl() 708 0 != ch_checkrange(ch, mv.cm_totype, mv.cm_tounit )) { in ch_ioctl() 715 ch->firsts[mv.cm_fromtype] + mv.cm_fromunit, in ch_ioctl() 716 ch->firsts[mv.cm_totype] + mv.cm_tounit, in ch_ioctl() 717 mv.cm_flags & CM_INVERT); in ch_ioctl() 724 struct changer_exchange mv; in ch_ioctl() local [all …]
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/Linux-v6.6/drivers/mfd/ |
D | menelaus.c | 449 static int menelaus_set_voltage(const struct menelaus_vtg *vtg, int mV, in menelaus_set_voltage() argument 464 "to %d mV (reg 0x%02x, val 0x%02x)\n", in menelaus_set_voltage() 465 vtg->name, mV, vtg->vtg_reg, val); in menelaus_set_voltage() 536 dev_dbg(&c->dev, "Setting VCORE FLOOR to %d mV and ROOF to %d mV\n", in menelaus_set_vcore_hw() 574 int menelaus_set_vmem(unsigned int mV) in menelaus_set_vmem() argument 578 if (mV == 0) in menelaus_set_vmem() 581 val = menelaus_get_vtg_value(mV, vmem_values, ARRAY_SIZE(vmem_values)); in menelaus_set_vmem() 584 return menelaus_set_voltage(&vmem_vtg, mV, val, 0x02); in menelaus_set_vmem() 603 int menelaus_set_vio(unsigned int mV) in menelaus_set_vio() argument 607 if (mV == 0) in menelaus_set_vio() [all …]
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/Linux-v6.6/drivers/iio/amplifiers/ |
D | ada4250.c | 71 /* ADA4250 Gain (V/V) values: 1, 2, 4, 8, 16, 32, 64, 128 */ 72 static const int hwgain_table[] = {1, 2, 4, 8, 16, 32, 64, 128}; 114 * Gain | Max Vos(mV) | LSB(mV) | Max Vos(mV) | LSB(mV) | in ada4250_set_offset_uv() 119 * 32 | X5*127 | X5=X1/8.289 | X5*3*127 | X5*3 | in ada4250_set_offset_uv()
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/Linux-v6.6/drivers/gpu/drm/i915/display/ |
D | intel_ddi_buf_trans.c | 53 /* Idx NT mV d T mV d db */ 126 /* Idx NT mV d T mV df db */ 362 /* Idx NT mV diff db */ 381 /* Idx NT mV diff db */ 386 { .bxt = { 32, 0, 0, 128, } }, /* 4: 250 0 */ 403 /* Idx NT mV diff db */ 424 /* NT mV Trans mV db */ 443 /* NT mV Trans mV db */ 462 /* NT mV Trans mV db */ 479 /* NT mV Trans mV db */ [all …]
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/Linux-v6.6/drivers/iio/adc/ |
D | hx711.c | 45 { 32, 2, 0, 1 }, 219 if (hx711_data->gain_set == 32) { in hx711_set_gain_for_channel() 231 if (hx711_data->gain_set != 32) { in hx711_set_gain_for_channel() 232 hx711_data->gain_set = 32; in hx711_set_gain_for_channel() 314 * a scale greater than 1 mV per LSB is not possible in hx711_write_raw() 330 if (gain != 32) in hx711_write_raw() 438 .storagebits = 32, 452 .storagebits = 32, 517 * AVDD is in uV, but we need 10^-9 mV in hx711_probe() 518 * approximately to fit into a 32 bit number: in hx711_probe() [all …]
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/Linux-v6.6/drivers/media/platform/mediatek/vcodec/decoder/vdec/ |
D | vdec_vp9_req_lat_if.c | 44 u8 seg[32]; /* ignore */ 341 * @mv: mv working buffer 360 struct vdec_vp9_slice_mem mv[2]; member 430 * @mv: mv working buffer 469 * mv[0]/seg[0]/tile/prob/counts is used for LAT 470 * mv[1]/seg[1] is used for CORE 472 struct mtk_vcodec_mem mv[2]; member 593 if (instance->mv[i].va) in vdec_vp9_slice_alloc_working_buffer() 594 mtk_vcodec_mem_free(ctx, &instance->mv[i]); in vdec_vp9_slice_alloc_working_buffer() 595 instance->mv[i].size = size; in vdec_vp9_slice_alloc_working_buffer() [all …]
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D | vdec_h264_req_common.h | 28 #define H264_MAX_MV_NUM 32 141 unsigned char ref_pic_list_p0[32]; 142 unsigned char ref_pic_list_b0[32]; 143 unsigned char ref_pic_list_b1[32]; 268 * mtk_vdec_h264_get_mv_buf_size - get mv buffer size. 273 * Return: returns mv buffer size.
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/Linux-v6.6/drivers/regulator/ |
D | mp5416.c | 132 * 00: 32mV/us 133 * 01: 16mV/us 134 * 10: 8mV/us 135 * 11: 4mV/us
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/Linux-v6.6/drivers/media/pci/tw5864/ |
D | tw5864-reg.h | 92 /* MV Vector Valid */ 94 /* MV Flag Valid */ 179 /* Current MV Flag Status Pointer for Channel n. (Read only) */ 190 * [15:0] Reset Current MV Flag Status Pointer for Channel n (one bit each) 578 * Bit[32:30] ch10 611 * Bit[35:32] ch8 623 /* AD_ORIG_WR_PTR[63:32] */ 630 /* AD_ORIG_RD_PTR[63:32] */ 864 * Bit[2]: MV DSP interrupt 1083 * 0 write 32'haaaa5555 to DDR [all …]
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