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/Linux-v5.10/Documentation/devicetree/bindings/timer/
Drenesas,cmt.yaml14 The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
28 - renesas,r8a7740-cmt0 # 32-bit CMT0 on R-Mobile A1
29 - renesas,r8a7740-cmt1 # 48-bit CMT1 on R-Mobile A1
30 - renesas,r8a7740-cmt2 # 32-bit CMT2 on R-Mobile A1
31 - renesas,r8a7740-cmt3 # 32-bit CMT3 on R-Mobile A1
32 - renesas,r8a7740-cmt4 # 32-bit CMT4 on R-Mobile A1
33 - renesas,sh73a0-cmt0 # 32-bit CMT0 on SH-Mobile AG5
34 - renesas,sh73a0-cmt1 # 48-bit CMT1 on SH-Mobile AG5
35 - renesas,sh73a0-cmt2 # 32-bit CMT2 on SH-Mobile AG5
36 - renesas,sh73a0-cmt3 # 32-bit CMT3 on SH-Mobile AG5
[all …]
/Linux-v5.10/drivers/net/fddi/skfp/h/
Dskfbi.h40 #define B0_RAP 0x0000 /* 8 bit register address port */
42 #define B0_CTRL 0x0004 /* 8 bit control register */
43 #define B0_DAS 0x0005 /* 8 Bit control register (DAS) */
44 #define B0_LED 0x0006 /* 8 Bit LED register */
45 #define B0_TST_CTRL 0x0007 /* 8 bit test control register */
46 #define B0_ISRC 0x0008 /* 32 bit Interrupt source register */
47 #define B0_IMSK 0x000c /* 32 bit Interrupt mask register */
52 #define B0_ST1U 0x0010 /* read upper 16-bit of status reg 1 */
53 #define B0_ST1L 0x0014 /* read lower 16-bit of status reg 1 */
54 #define B0_ST2U 0x0018 /* read upper 16-bit of status reg 2 */
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/Linux-v5.10/include/linux/
Dexportfs.h33 * 32bit inode number, 32 bit generation number.
38 * 32bit inode number, 32 bit generation number,
39 * 32 bit parent directory inode number.
44 * 64 bit object ID, 64 bit root object ID,
45 * 32 bit generation number.
50 * 64 bit object ID, 64 bit root object ID,
51 * 32 bit generation number,
52 * 64 bit parent object ID, 32 bit parent generation.
57 * 64 bit object ID, 64 bit root object ID,
58 * 32 bit generation number,
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Dmath64.h15 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
16 * @dividend: unsigned 64bit dividend
17 * @divisor: unsigned 32bit divisor
18 * @remainder: pointer to unsigned 32bit remainder
22 * This is commonly provided by 32bit archs to provide an optimized 64bit
32 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
33 * @dividend: signed 64bit dividend
34 * @divisor: signed 32bit divisor
35 * @remainder: pointer to signed 32bit remainder
46 * div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder
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Du64_stats_sync.h6 * Protect against 64-bit values tearing on 32-bit architectures. This is
11 * - Use a seqcount on 32-bit SMP, only disable preemption for 32-bit UP.
12 * - The whole thing is a no-op on 64-bit architectures.
27 * used for 64bit architectures).
34 * seqcounts are not used for UP kernels). 32-bit UP stat readers could read
35 * corrupted 64-bit values otherwise.
69 #if BITS_PER_LONG==32 && defined(CONFIG_SMP)
120 #if BITS_PER_LONG == 32 && defined(CONFIG_SMP) in u64_stats_init()
127 #if BITS_PER_LONG==32 && defined(CONFIG_SMP) in u64_stats_update_begin()
134 #if BITS_PER_LONG==32 && defined(CONFIG_SMP) in u64_stats_update_end()
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/Linux-v5.10/arch/s390/include/asm/
Delf.h13 #define R_390_8 1 /* Direct 8 bit. */
14 #define R_390_12 2 /* Direct 12 bit. */
15 #define R_390_16 3 /* Direct 16 bit. */
16 #define R_390_32 4 /* Direct 32 bit. */
17 #define R_390_PC32 5 /* PC relative 32 bit. */
18 #define R_390_GOT12 6 /* 12 bit GOT offset. */
19 #define R_390_GOT32 7 /* 32 bit GOT offset. */
20 #define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
25 #define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */
26 #define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */
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/Linux-v5.10/drivers/net/ethernet/marvell/
Dskge.h131 /* B0_CTST 16 bit Control/Status register */
138 CS_BUS_SLOT_SZ = 1<<8, /* Slot Size 0/1 = 32/64 bit slot */
142 CS_STOP_MAST = 1<<4, /* Command Bit to stop the master */
148 /* B0_LED 8 Bit LED register */
149 /* Bit 7.. 2: reserved */
153 /* B0_POWER_CTRL 8 Bit Power Control reg (YUKON only) */
164 /* B2_IRQM_MSK 32 bit IRQ Moderation Mask */
168 /* Bit 30: reserved */
215 /* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */
238 /* B2_TST_CTRL1 8 bit Test Control Register 1 */
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Dsky2.h41 PCI_PHY_LNK_TIM_MSK= 3L<<8,/* Bit 9.. 8: GPHY Link Trigger Timer */
48 PCI_VPD_WR_THR = 0xffL<<24, /* Bit 31..24: VPD Write Threshold */
49 PCI_DEV_SEL = 0x7fL<<17, /* Bit 23..17: EEPROM Device Select */
50 PCI_VPD_ROM_SZ = 7L<<14, /* Bit 16..14: VPD ROM Size */
52 PCI_PATCH_DIR = 0xfL<<8, /* Bit 11.. 8: Ext Patches dir 3..0 */
53 PCI_EXT_PATCHS = 0xfL<<4, /* Bit 7.. 4: Extended Patches 3..0 */
57 PCI_USEDATA64 = 1<<0, /* Use 64Bit Data bus ext */
60 /* PCI_OUR_REG_3 32 bit Our Register 3 (Yukon-ECU only) */
91 /* PCI_OUR_REG_4 32 bit Our Register 4 (Yukon-ECU only) */
94 P_PEX_LTSSM_STAT_MSK = 0x7fL<<25, /* Bit 31..25: PEX LTSSM Mask */
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/Linux-v5.10/Documentation/devicetree/bindings/mfd/
Dmc13xxx.txt55 sw1a : regulator SW1A (register 24, bit 0)
56 sw1b : regulator SW1B (register 25, bit 0)
57 sw2a : regulator SW2A (register 26, bit 0)
58 sw2b : regulator SW2B (register 27, bit 0)
59 sw3 : regulator SW3 (register 29, bit 20)
60 vaudio : regulator VAUDIO (register 32, bit 0)
61 viohi : regulator VIOHI (register 32, bit 3)
62 violo : regulator VIOLO (register 32, bit 6)
63 vdig : regulator VDIG (register 32, bit 9)
64 vgen : regulator VGEN (register 32, bit 12)
[all …]
/Linux-v5.10/drivers/clocksource/
Dtimer-u300.c35 /* Reset OS Timer 32bit (-/W) */
38 /* Enable OS Timer 32bit (-/W) */
41 /* Disable OS Timer 32bit (-/W) */
44 /* OS Timer Mode Register 32bit (-/W) */
48 /* OS Timer Status Register 32bit (R/-) */
59 /* OS Timer Current Count Register 32bit (R/-) */
61 /* OS Timer Terminal Count Register 32bit (R/W) */
63 /* OS Timer Interrupt Enable Register 32bit (-/W) */
67 /* OS Timer Interrupt Acknowledge Register 32bit (-/W) */
71 /* Reset DD Timer 32bit (-/W) */
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/Linux-v5.10/drivers/net/ethernet/cavium/liquidio/
Dcn66xx_regs.h89 /* 1 register (32-bit) to enable Input queues */
92 /* 1 register (32-bit) to enable Output queues */
95 /* 1 register (32-bit) to determine whether Output queues are in reset. */
98 /* 1 register (32-bit) to determine whether Input queues are in reset. */
103 /* 1 register (32-bit) - instr. size of each input queue. */
106 /* 32 registers for Input Queue Instr Count - SLI_PKT_IN_DONE0_CNTS */
109 /* 32 registers for Input Queue Start Addr - SLI_PKT0_INSTR_BADDR */
112 /* 32 registers for Input Doorbell - SLI_PKT0_INSTR_BAOFF_DBELL */
115 /* 32 registers for Input Queue size - SLI_PKT0_INSTR_FIFO_RSIZE */
118 /* 32 registers for Instruction Header Options - SLI_PKT0_INSTR_HEADER */
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/Linux-v5.10/lib/
Diomap_copy.c10 * __iowrite32_copy - copy data to MMIO space, in 32-bit units
11 * @to: destination, in MMIO space (must be 32-bit aligned)
12 * @from: source (must be 32-bit aligned)
13 * @count: number of 32-bit quantities to copy
15 * Copy data from kernel space to MMIO space, in units of 32 bits at a
33 * __ioread32_copy - copy data from MMIO space, in 32-bit units
34 * @to: destination (must be 32-bit aligned)
35 * @from: source, in MMIO space (must be 32-bit aligned)
36 * @count: number of 32-bit quantities to copy
38 * Copy data from MMIO space to kernel space, in units of 32 bits at a
[all …]
/Linux-v5.10/drivers/staging/media/ipu3/
Dipu3-abi.h15 #define IMGU_DVS_BLOCK_H 32
31 #define IMGU_ABI_AF_MAX_CELLS_PER_SET 32
32 #define IMGU_ABI_AWB_FR_MAX_CELLS_PER_SET 32
46 #define IMGU_PM_CTRL_START BIT(0)
47 #define IMGU_PM_CTRL_CFG_DONE BIT(1)
48 #define IMGU_PM_CTRL_RACE_TO_HALT BIT(2)
49 #define IMGU_PM_CTRL_NACK_ALL BIT(3)
50 #define IMGU_PM_CTRL_CSS_PWRDN BIT(4)
51 #define IMGU_PM_CTRL_RST_AT_EOF BIT(5)
52 #define IMGU_PM_CTRL_FORCE_HALT BIT(6)
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/Linux-v5.10/include/uapi/linux/
Dswab.h71 __u32 h = val >> 32; in __fswab64()
72 __u32 l = val & ((1ULL << 32) - 1); in __fswab64()
73 return (((__u64)__fswab32(l)) << 32) | ((__u64)(__fswab32(h))); in __fswab64()
98 * __swab16 - return a byteswapped 16-bit value
111 * __swab32 - return a byteswapped 32-bit value
124 * __swab64 - return a byteswapped 64-bit value
140 #else /* __BITS_PER_LONG == 32 */ in __swab()
146 * __swahw32 - return a word-swapped 32-bit value
157 * __swahb32 - return a high and low byte-swapped 32-bit value
168 * __swab16p - return a byteswapped 16-bit value from a pointer
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/Linux-v5.10/arch/s390/kernel/
Dmodule.c67 case R_390_GOT12: /* 12 bit GOT offset. */ in check_rela()
68 case R_390_GOT16: /* 16 bit GOT offset. */ in check_rela()
69 case R_390_GOT20: /* 20 bit GOT offset. */ in check_rela()
70 case R_390_GOT32: /* 32 bit GOT offset. */ in check_rela()
71 case R_390_GOT64: /* 64 bit GOT offset. */ in check_rela()
72 case R_390_GOTENT: /* 32 bit PC rel. to GOT entry shifted by 1. */ in check_rela()
73 case R_390_GOTPLT12: /* 12 bit offset to jump slot. */ in check_rela()
74 case R_390_GOTPLT16: /* 16 bit offset to jump slot. */ in check_rela()
75 case R_390_GOTPLT20: /* 20 bit offset to jump slot. */ in check_rela()
76 case R_390_GOTPLT32: /* 32 bit offset to jump slot. */ in check_rela()
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/Linux-v5.10/fs/ext4/
Dinode-test.c43 "1901-12-13 Lower bound of 32bit < 0 timestamp, no extra bits"
45 "1969-12-31 Upper bound of 32bit < 0 timestamp, no extra bits"
47 "1970-01-01 Lower bound of 32bit >=0 timestamp, no extra bits"
49 "2038-01-19 Upper bound of 32bit >=0 timestamp, no extra bits"
51 "2038-01-19 Lower bound of 32bit <0 timestamp, lo extra sec bit on"
53 "2106-02-07 Upper bound of 32bit <0 timestamp, lo extra sec bit on"
55 "2106-02-07 Lower bound of 32bit >=0 timestamp, lo extra sec bit on"
57 "2174-02-25 Upper bound of 32bit >=0 timestamp, lo extra sec bit on"
59 "2174-02-25 Lower bound of 32bit <0 timestamp, hi extra sec bit on"
61 "2242-03-16 Upper bound of 32bit <0 timestamp, hi extra sec bit on"
[all …]
/Linux-v5.10/Documentation/admin-guide/
Dhighuid.rst2 Notes on the change from 16-bit UIDs to 32-bit UIDs
15 What's left to be done for 32-bit UIDs on all Linux architectures:
22 properly with huge UIDs. If it can deal with 64-bit file offsets on all
27 (currently, the old 16-bit UID and GID are still written to disk, and
28 part of the former pad space is used to store separate 32-bit UID and
31 - Need to validate that OS emulation calls the 16-bit UID
32 compatibility syscalls, if the OS being emulated used 16-bit UIDs, or
33 uses the 32-bit UID system calls properly otherwise.
40 (need to support whatever new 32-bit UID system calls are added to
45 At present, 32-bit UIDs _should_ work for:
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/Linux-v5.10/Documentation/staging/
Dcrc32.rst17 subtract, we just xor. Thus, we tend to get a bit sloppy about
21 To produce a 32-bit CRC, the divisor is actually a 33-bit CRC polynomial.
22 Since it's 33 bits long, bit 32 is always going to be set, so usually the
23 CRC is written in hex with the most significant bit omitted. (If you're
30 little-endian; the most significant bit (sometimes used for parity)
34 Just like with ordinary division, you proceed one digit (bit) at a time.
35 Each step of the division you take one more digit (bit) of the dividend
39 and to make the XOR cancel, it's just a copy of bit 32 of the remainder.
42 throw the quotient bit away, but subtract the appropriate multiple of
44 ready to process the next bit.
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/Linux-v5.10/arch/ia64/lib/
Dchecksum.c22 /* add up 32-bit words for 33 bits */ in from64to16()
23 x = (x & 0xffffffff) + (x >> 32); in from64to16()
24 /* add up 16-bit and 17-bit words for 17+c bits */ in from64to16()
26 /* add up 16-bit and 2-bit for 16+c bit */ in from64to16()
35 * returns a 16-bit checksum, already complemented.
57 /* Fold down to 32-bits so we don't lose in the typedef-less network stack. */ in csum_tcpudp_nofold()
59 result = (result & 0xffffffff) + (result >> 32); in csum_tcpudp_nofold()
60 /* 33 to 32 */ in csum_tcpudp_nofold()
61 result = (result & 0xffffffff) + (result >> 32); in csum_tcpudp_nofold()
70 * and adds in "sum" (32-bit)
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/Linux-v5.10/tools/testing/selftests/powerpc/vphn/
Dtest-vphn.c41 "vphn: 1 x 16-bit value",
56 "vphn: 2 x 16-bit values",
72 "vphn: 3 x 16-bit values",
89 "vphn: 4 x 16-bit values",
107 /* Parsing the next 16-bit value out of the next 64-bit input
110 "vphn: 5 x 16-bit values",
129 /* Parse at most 6 x 64-bit input values */
130 "vphn: 24 x 16-bit values",
168 "vphn: 1 x 32-bit value",
183 "vphn: 2 x 32-bit values",
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/Linux-v5.10/lib/math/
Ddiv64.c10 * Generic C version of 64bit/32bit division and modulo, with
11 * 64bit result and 32bit remainder.
13 * The fast case for (n>>32 == 0) is handled inline by do_div().
25 /* Not needed on 64bit architectures */
26 #if BITS_PER_LONG == 32
34 uint32_t high = rem >> 32; in __div64_32()
36 /* Reduce the thing a bit first */ in __div64_32()
40 res = (uint64_t) high << 32; in __div64_32()
41 rem -= (uint64_t) (high*base) << 32; in __div64_32()
65 * div_s64_rem - signed 64bit divide with 64bit divisor and remainder
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/Linux-v5.10/arch/riscv/
DKconfig7 config 64BIT
10 config 32BIT config
33 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
39 select GENERIC_ATOMIC64 if !64BIT
52 select GENERIC_TIME_VSYSCALL if MMU && 64BIT
57 select HAVE_ARCH_KASAN if MMU && 64BIT
70 select HAVE_GENERIC_VDSO if MMU && 64BIT
87 select SPARSEMEM_STATIC if 32BIT
94 default 18 if 64BIT
100 default 24 if 64BIT # SV39 based
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/Linux-v5.10/arch/arm64/include/asm/
Dkgdb.h34 * r0-r30: 64 bit
35 * sp,pc : 64 bit
36 * pstate : 32 bit
39 * f0-f31: 128 bit
40 * fpsr & fpcr: 32 bit
41 * Total: 32 + 2
45 * Architecture Reference Manual that claimed "SPSR_ELx is a 32-bit register".
46 * and, as a result, allocated only 32-bits for the PSTATE in the remote
49 * Unfortunately "is a 32-bit register" has a very special meaning for
50 * system registers. It means that "the upper bits, bits[63:32], are
[all …]
/Linux-v5.10/drivers/mtd/nand/raw/
Dnand_ids.c29 {"TC58NVG0S3E 1G 3.3V 8-bit",
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
41 {"TC58NVG5D2 32G 3.3V 8-bit",
44 {"TC58NVG6D2 64G 3.3V 8-bit",
47 {"SDTNRGAMA 64G 3.3V 8-bit",
50 {"H27UCG8T2ATR-BC 64G 3.3V 8-bit",
54 {"TH58NVG2S3HBAI4 4G 3.3V 8-bit",
58 LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS),
[all …]
/Linux-v5.10/arch/alpha/kernel/
Dsys_sable.c39 /* Note mask bit is true for DISABLED irqs. */
42 void (*update_irq_hw)(unsigned long bit, unsigned long mask);
43 void (*ack_irq_hw)(unsigned long bit);
64 * Bit Meaning Kernel IRQ
68 * 2 TULIP (builtin) 32
93 sable_update_irq_hw(unsigned long bit, unsigned long mask) in sable_update_irq_hw() argument
97 if (bit >= 16) { in sable_update_irq_hw()
100 } else if (bit >= 8) { in sable_update_irq_hw()
109 sable_ack_irq_hw(unsigned long bit) in sable_ack_irq_hw() argument
113 if (bit >= 16) { in sable_ack_irq_hw()
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