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/Linux-v6.1/arch/arm/boot/dts/
Dorion5x-netgear-wnr854t.dts1 // SPDX-License-Identifier: GPL-2.0-only
4 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include "orion5x-mv88f5181.dtsi"
11 model = "Netgear WNR854-t";
12 compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
24 stdout-path = "serial0:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
[all …]
Daspeed-ast2600-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
34 compatible = "shared-dma-pool";
41 compatible = "shared-dma-pool";
[all …]
Dmoxart-uc7112lx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* moxart-uc7112lx.dts - Device Tree file for MOXA UC-7112-LX
7 /dts-v1/;
11 model = "MOXA UC-7112-LX";
12 compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart";
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <12000000>;
28 compatible = "numonyx,js28f128", "cfi-flash";
30 bank-width = <2>;
[all …]
Dkirkwood-guruplug-server-plus.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include "kirkwood-6281.dtsi"
9 …compatible = "globalscale,guruplug-server-plus", "globalscale,guruplug", "marvell,kirkwood-88f6281…
18 stdout-path = &uart0;
22 pinctrl: pin-controller@10000 {
23 pmx_led_health_r: pmx-led-health-r {
27 pmx_led_health_g: pmx-led-health-g {
31 pmx_led_wmode_r: pmx-led-wmode-r {
35 pmx_led_wmode_g: pmx-led-wmode-g {
[all …]
Dkeystone-k2l-evm.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2l.dtsi"
13 compatible = "ti,k2l-evm", "ti,k2l", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
[all …]
Dkeystone-k2e-evm.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2e.dtsi"
13 compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
[all …]
Dkeystone-k2hk-evm.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2hk.dtsi"
13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
[all …]
Dimx6ul-tx6ul-mainboard.dts2 * Copyright 2015 Lothar Waßmann <LW@KARO-electronics.de>
4 * This file is dual-licensed: you can use it either under the terms
42 /dts-v1/;
44 #include "imx6ul-tx6ul.dtsi"
47 model = "Ka-Ro electronics TXUL-0010 Module on TXUL Mainboard";
48 compatible = "karo,imx6ul-tx6ul", "fsl,imx6ul";
51 lcdif-24bit-pins-a = &pinctrl_disp0_3;
53 /delete-property/ mmc1;
57 /delete-node/ sound;
61 xceiver-supply = <&reg_3v3>;
[all …]
Dimx6sx-udoo-neo-basic.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "imx6sx-udoo-neo.dtsi"
21 phy-handle = <&ethphy1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
28 ethphy1: ethernet-phy@0 {
29 compatible = "ethernet-phy-ieee802.3-c22";
Dimx6sx-udoo-neo-full.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "imx6sx-udoo-neo.dtsi"
21 phy-handle = <&ethphy1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
28 ethphy1: ethernet-phy@0 {
29 compatible = "ethernet-phy-ieee802.3-c22";
Dartpec6-devboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 // Axis ARTPEC-6 development board.
4 /dts-v1/;
8 model = "ARTPEC-6 development board";
9 compatible = "axis,artpec6-dev-board", "axis,artpec6";
19 stdout-path = "serial3:115200n8";
51 phy-handle = <&phy1>;
52 phy-mode = "gmii";
55 #address-cells = <0x1>;
56 #size-cells = <0x0>;
[all …]
Dimx7d-cl-som-imx7.dts2 * Support for CompuLab CL-SOM-iMX7 System-on-Module
4 * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
7 * This file is dual-licensed: you can use it either under the terms
13 /dts-v1/;
18 model = "CompuLab CL-SOM-iMX7";
19 compatible = "compulab,cl-som-imx7", "fsl,imx7d";
23 reg = <0x80000000 0x10000000>; /* 256 MB - minimal configuration */
26 reg_usb_otg1_vbus: regulator-vbus {
27 compatible = "regulator-fixed";
28 regulator-name = "usb_otg1_vbus";
[all …]
/Linux-v6.1/arch/mips/boot/dts/cavium-octeon/
Dubnt_e100.dts1 // SPDX-License-Identifier: GPL-2.0-only
15 phy5: ethernet-phy@5 {
17 compatible = "ethernet-phy-ieee802.3-c22";
19 phy6: ethernet-phy@6 {
21 compatible = "ethernet-phy-ieee802.3-c22";
23 phy7: ethernet-phy@7 {
25 compatible = "ethernet-phy-ieee802.3-c22";
32 phy-handle = <&phy7>;
33 rx-delay = <0>;
34 tx-delay = <0x10>;
[all …]
Ddlink_dsr-500n-1000n.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device tree source for D-Link DSR-500N/1000N (common parts).
13 phy8: ethernet-phy@8 {
15 compatible = "ethernet-phy-ieee802.3-c22";
22 fixed-link {
24 full-duplex;
28 fixed-link {
30 full-duplex;
34 phy-handle = <&phy8>;
47 refclk-frequency = <12000000>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/net/
Dhisilicon-hip04-net.txt6 - compatible: should be "hisilicon,hip04-mac".
7 - reg: address and length of the register set for the device.
8 - interrupts: interrupt for the device.
9 - port-handle: <phandle port channel>
14 - phy-mode: see ethernet.txt [1].
17 - phy-handle: see ethernet.txt [1].
28 - compatible: "hisilicon,hip04-ppe", "syscon".
29 - reg: address and length of the register set for the device.
36 - compatible: should be "hisilicon,mdio".
37 - Inherits from MDIO bus node binding [2]
[all …]
Dbrcm,bcmgenet.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Doug Berger <opendmb@gmail.com>
11 - Florian Fainelli <f.fainelli@gmail.com>
16 - brcm,genet-v1
17 - brcm,genet-v2
18 - brcm,genet-v3
19 - brcm,genet-v4
20 - brcm,genet-v5
[all …]
Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8qm-mek.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 /dts-v1/;
13 compatible = "fsl,imx8qm-mek", "fsl,imx8qm";
16 stdout-path = &lpuart0;
20 /delete-node/ cpu-map;
21 /delete-node/ cpu@100;
22 /delete-node/ cpu@101;
30 reg_usdhc2_vmmc: usdhc2-vmmc {
31 compatible = "regulator-fixed";
[all …]
/Linux-v6.1/drivers/net/ethernet/samsung/sxgbe/
Dsxgbe_mdio.c1 // SPDX-License-Identifier: GPL-2.0-only
31 unsigned long fin_time = jiffies + 3 * HZ; /* 3 seconds */ in sxgbe_mdio_busy_wait()
39 return -EBUSY; in sxgbe_mdio_busy_wait()
48 ((sp->clk_csr & 0x7) << 19) | SXGBE_MII_BUSY; in sxgbe_mdio_ctrl_data()
49 writel(reg, sp->ioaddr + sp->hw->mii.data); in sxgbe_mdio_ctrl_data()
60 writel(reg, sp->ioaddr + sp->hw->mii.addr); in sxgbe_mdio_c45()
70 writel(1 << phyaddr, sp->ioaddr + SXGBE_MDIO_CLAUSE22_PORT_REG); in sxgbe_mdio_c22()
74 writel(reg, sp->ioaddr + sp->hw->mii.addr); in sxgbe_mdio_c22()
82 const struct mii_regs *mii = &sp->hw->mii; in sxgbe_mdio_access()
85 rc = sxgbe_mdio_busy_wait(sp->ioaddr, mii->data); in sxgbe_mdio_access()
[all …]
/Linux-v6.1/drivers/net/mdio/
Dmdio-cavium.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2009-2016 Cavium, Inc.
11 #include "mdio-cavium.h"
18 if (m == p->mode) in cavium_mdiobus_set_mode()
21 smi_clk.u64 = oct_mdio_readq(p->register_base + SMI_CLK); in cavium_mdiobus_set_mode()
24 oct_mdio_writeq(smi_clk.u64, p->register_base + SMI_CLK); in cavium_mdiobus_set_mode()
25 p->mode = m; in cavium_mdiobus_set_mode()
39 oct_mdio_writeq(smi_wr.u64, p->register_base + SMI_WR_DAT); in cavium_mdiobus_c45_addr()
47 oct_mdio_writeq(smi_cmd.u64, p->register_base + SMI_CMD); in cavium_mdiobus_c45_addr()
54 smi_wr.u64 = oct_mdio_readq(p->register_base + SMI_WR_DAT); in cavium_mdiobus_c45_addr()
[all …]
/Linux-v6.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h6-orangepi-one-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include "sun50i-h6-orangepi.dtsi"
9 compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";
15 reg_gmac_3v3: gmac-3v3 {
16 compatible = "regulator-fixed";
17 regulator-name = "vcc-gmac-3v3";
18 regulator-min-microvolt = <3300000>;
19 regulator-max-microvolt = <3300000>;
20 startup-delay-us = <100000>;
21 enable-active-high;
[all …]
Dsun50i-a64-pine64-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include "sun50i-a64-pine64.dts"
8 compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
14 pinctrl-names = "default";
15 pinctrl-0 = <&rgmii_pins>;
16 phy-mode = "rgmii-txid";
17 phy-handle = <&ext_rgmii_phy>;
22 ext_rgmii_phy: ethernet-phy@1 {
23 compatible = "ethernet-phy-ieee802.3-c22";
34 regulator-enable-ramp-delay = <100000>;
Dsun50i-h5-libretech-all-h5-cc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
4 #include "sun50i-h5-libretech-all-h3-cc.dts"
7 model = "Libre Computer Board ALL-H5-CC H5";
8 compatible = "libretech,all-h5-cc-h5", "allwinner,sun50i-h5";
14 reg_gmac_3v3: gmac-3v3 {
15 compatible = "regulator-fixed";
16 regulator-name = "gmac-3v3";
17 regulator-min-microvolt = <3300000>;
18 regulator-max-microvolt = <3300000>;
[all …]
/Linux-v6.1/drivers/gpu/drm/sun4i/
Dsun8i_csc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
60 * z' = c20 * (x + d0) + c21 * (y + d1) + c22 * (z + d2) + const2
70 * c20 c21 c22 [d2 const2]
73 static const u32 yuv2rgb_de3[2][3][12] = {
128 if ((i & 3) == 1) in sun8i_csc_set_coefficients()
130 else if ((i & 3) == 2) in sun8i_csc_set_coefficients()
131 base_reg = SUN8I_CSC_COEFF(base, i - 1); in sun8i_csc_set_coefficients()
161 if ((i & 3) == 1) in sun8i_de3_ccsc_set_coefficients()
165 else if ((i & 3) == 2) in sun8i_de3_ccsc_set_coefficients()
168 i - 1); in sun8i_de3_ccsc_set_coefficients()
[all …]
/Linux-v6.1/arch/arm64/boot/dts/renesas/
Drzg2ul-smarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
27 reg_1p8v: regulator-1p8v {
28 compatible = "regulator-fixed";
29 regulator-name = "fixed-1.8V";
30 regulator-min-microvolt = <1800000>;
31 regulator-max-microvolt = <1800000>;
32 regulator-boot-on;
33 regulator-always-on;
[all …]

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