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/Linux-v6.1/drivers/gpu/drm/i915/display/
Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
33 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
35 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
37 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
39 { 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
41 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1,
43 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
45 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
47 { 6, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
48 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
[all …]
/Linux-v6.1/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Drate.c29 /* 0 1 2 3 4 5 6 7 8 9 */
46 {6500, 13500, CEIL(6500 * 10, 9), CEIL(13500 * 10, 9), 0x00,
49 {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x08,
51 /* MCS 2: SS 1, MOD: QPSK, CR 3/4 */
52 {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x0A,
54 /* MCS 3: SS 1, MOD: 16QAM, CR 1/2 */
55 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x10,
57 /* MCS 4: SS 1, MOD: 16QAM, CR 3/4 */
58 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x12,
60 /* MCS 5: SS 1, MOD: 64QAM, CR 2/3 */
[all …]
/Linux-v6.1/include/dt-bindings/memory/
Dmt8195-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <dt-bindings/memory/mtk-memory-port.h>
20 * modules dma-address-region larbs-ports
21 * disp 0 ~ 4G larb0/1/2/3
26 * CCU1 0x24400_0000 ~ 0x247ff_ffff larb18: port 2/3
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
30 * iommu-vpp: larb1/3/4/6/8/12/14/16/18/20/22/23/26/27
38 #define M4U_PORT_L0_DISP_OVL0_RDMA1 MTK_M4U_ID(0, 3)
46 #define M4U_PORT_L1_DISP_OVL0_RDMA1 MTK_M4U_ID(1, 3)
54 #define M4U_PORT_L2_MDP_RDMA6 MTK_M4U_ID(2, 3)
[all …]
Dmt8186-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
22 * modules dma-address-region larbs-ports
27 * CCU0 0x24000_0000 ~ 0x243ff_ffff larb13: port 9/10
32 /* LARB 0 -- MMSYS */
36 #define IOMMU_PORT_L0_DISP_FAKE0 MTK_M4U_ID(0, 3)
38 /* LARB 1 -- MMSYS */
42 #define IOMMU_PORT_L1_DISP_WDMA0 MTK_M4U_ID(1, 3)
45 /* LARB 2 -- MMSYS */
49 #define IOMMU_PORT_L2_MDP_WROT1 MTK_M4U_ID(2, 3)
[all …]
Dmt8192-larb-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
18 * modules dma-address-region larbs-ports
21 * cam/mdp 8G ~ 12G larb2/9/11/13/14/16/17/18/19/20
22 * CCU0 0x4000_0000 ~ 0x43ff_ffff larb13: port 9/10
32 #define M4U_PORT_L0_DISP_RDMA0 MTK_M4U_ID(0, 3)
40 #define M4U_PORT_L1_OVL_2L_RDMA2 MTK_M4U_ID(1, 3)
50 #define M4U_PORT_L2_MDP_WROT1 MTK_M4U_ID(2, 3)
59 #define M4U_PORT_L4_VDEC_PRED_RD_EXT MTK_M4U_ID(4, 3)
65 #define M4U_PORT_L4_VDEC_AVC_MV_EXT MTK_M4U_ID(4, 9)
[all …]
/Linux-v6.1/drivers/staging/media/ipu3/
Dipu3-tables.c1 // SPDX-License-Identifier: GPL-2.0
4 #include "ipu3-tables.h"
24 .even = { { 0, 3, 122, 7, 3, 0, 0 },
25 { 0, 0, 122, 7, 7, -1, 0 },
26 { 0, -3, 122, 7, 10, -1, 0 },
27 { 0, -5, 121, 7, 14, -2, 0 },
28 { 0, -7, 120, 7, 18, -3, 0 },
29 { 0, -9, 118, 7, 23, -4, 0 },
30 { 0, -11, 116, 7, 27, -4, 0 },
31 { 0, -12, 113, 7, 32, -5, 0 },
[all …]
/Linux-v6.1/arch/arm/mach-omap1/
Dmux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
15 #include <linux/soc/ti/omap1-io.h>
31 MUX_CFG_7XX("C2_7XX_KBC0", 13, 9, 0, 8, 1, 0)
40 MUX_CFG_7XX("W18_7XX_USB_DMCK_OUT",3, 3, 1, 2, 0, 0)
41 MUX_CFG_7XX("W19_7XX_USB_DCRST", 3, 7, 1, 6, 0, 0)
44 MUX_CFG_7XX("MMC_7XX_CMD", 2, 9, 0, 8, 1, 0)
54 MUX_CFG_7XX("SPI_7XX_2", 6, 9, 4, 8, 1, 0)
58 MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0)
[all …]
/Linux-v6.1/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
95 #define PSTATE_UAO pstate_field(0, 3)
[all …]
/Linux-v6.1/arch/csky/lib/
Dusercopy.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
15 " mov %3, %1 \n" in raw_copy_from_user()
16 " or %3, %2 \n" in raw_copy_from_user()
17 " andi %3, 3 \n" in raw_copy_from_user()
18 " cmpnei %3, 0 \n" in raw_copy_from_user()
22 " bt 3f \n" in raw_copy_from_user()
23 "2: ldw %3, (%2, 0) \n" in raw_copy_from_user()
25 " stw %3, (%1, 0) \n" in raw_copy_from_user()
27 "11: ldw %3, (%2, 8) \n" in raw_copy_from_user()
[all …]
/Linux-v6.1/tools/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
19 * [20-19] : Op0
20 * [18-16] : Op1
21 * [15-12] : CRn
22 * [11-8] : CRm
23 * [7-5] : Op2
80 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
92 #define PSTATE_UAO pstate_field(0, 3)
93 #define PSTATE_SSBS pstate_field(3, 1)
94 #define PSTATE_TCO pstate_field(3, 4)
[all …]
/Linux-v6.1/Documentation/userspace-api/media/v4l/
Dpixfmt-yuv-luma.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _yuv-luma-only:
6 Luma-Only Formats
14 - In all the tables that follow, bit 7 is the most significant bit in a byte.
15 - Formats are described with the minimum number of pixels needed to create a
16 byte-aligned repeating pattern. `...` indicates repetition of the pattern.
17 - Y'\ :sub:`x`\ [9:2] denotes bits 9 to 2 of the Y' value for pixel at colum
19 - `0` denotes padding bits set to 0.
28 .. flat-table:: Luma-Only Image Formats
29 :header-rows: 1
[all …]
/Linux-v6.1/drivers/staging/media/rkvdec/
Drkvdec-h264.c1 // SPDX-License-Identifier: GPL-2.0
9 * Jeffy Chen <jeffy.chen@rock-chips.com>
12 #include <media/v4l2-h264.h>
13 #include <media/v4l2-mem2mem.h>
16 #include "rkvdec-regs.h"
23 #define RKVDEC_NUM_REFLIST 3
47 #define BIT_DEPTH_LUMA PS_FIELD(15, 3)
48 #define BIT_DEPTH_CHROMA PS_FIELD(18, 3)
55 #define PIC_WIDTH_IN_MBS PS_FIELD(38, 9)
56 #define PIC_HEIGHT_IN_MBS PS_FIELD(47, 9)
[all …]
/Linux-v6.1/lib/crypto/
Dblake2s-generic.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
21 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
22 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
23 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
24 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
25 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
26 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
27 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
28 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
[all …]
/Linux-v6.1/drivers/pinctrl/mediatek/
Dpinctrl-mt8192.c1 // SPDX-License-Identifier: GPL-2.0
9 #include "pinctrl-mtk-mt8192.h"
10 #include "pinctrl-paris.h"
48 PIN_FIELD_BASE(3, 3, 4, 0x00f0, 0x10, 8, 1),
50 PIN_FIELD_BASE(5, 5, 4, 0x00f0, 0x10, 9, 1),
51 PIN_FIELD_BASE(6, 6, 4, 0x00f0, 0x10, 9, 1),
52 PIN_FIELD_BASE(7, 7, 4, 0x00f0, 0x10, 9, 1),
53 PIN_FIELD_BASE(8, 8, 4, 0x00f0, 0x10, 9, 1),
54 PIN_FIELD_BASE(9, 9, 4, 0x00f0, 0x10, 5, 1),
58 PIN_FIELD_BASE(13, 13, 6, 0x0070, 0x10, 3, 1),
[all …]
/Linux-v6.1/tools/testing/selftests/tc-testing/tc-tests/actions/
Dpolice.json20 "matchPattern": "action order [0-9]*: police 0x1 rate 1Kbit burst 10Kb",
27 "id": "3abe",
40 "$TC actions add action police rate 4Mbit burst 120k index 9"
42 "cmdUnderTest": "$TC actions add action police rate 8kbit burst 24k index 9",
45 "matchPattern": "action order [0-9]*: police 0x9",
69 "matchPattern": "action order [0-9]*: police 0x62 rate 90Kbit burst 10Kb mtu 1Kb",
90 …UnderTest": "$TC actions add action police rate 90kbit burst 10k mtu 2kb peakrate 100kbit index 3",
93 …"matchPattern": "action order [0-9]*: police 0x3 rate 90Kbit burst 10Kb mtu 2Kb peakrate 100Kbit",
114 … "cmdUnderTest": "$TC actions add action police rate 5kbit burst 6kb peakrate 10kbit index 9",
117 "matchPattern": "action order [0-9]*: police 0x9 rate 5Kb burst 10Kb",
[all …]
/Linux-v6.1/drivers/pinctrl/sunplus/
Dsppctl_sp7021.c1 // SPDX-License-Identifier: GPL-2.0
18 D_PIS(0, 0), D_PIS(0, 1), D_PIS(0, 2), D_PIS(0, 3),
20 D_PIS(1, 0), D_PIS(1, 1), D_PIS(1, 2), D_PIS(1, 3),
22 D_PIS(2, 0), D_PIS(2, 1), D_PIS(2, 2), D_PIS(2, 3),
24 D_PIS(3, 0), D_PIS(3, 1), D_PIS(3, 2), D_PIS(3, 3),
25 D_PIS(3, 4), D_PIS(3, 5), D_PIS(3, 6), D_PIS(3, 7),
26 D_PIS(4, 0), D_PIS(4, 1), D_PIS(4, 2), D_PIS(4, 3),
28 D_PIS(5, 0), D_PIS(5, 1), D_PIS(5, 2), D_PIS(5, 3),
30 D_PIS(6, 0), D_PIS(6, 1), D_PIS(6, 2), D_PIS(6, 3),
32 D_PIS(7, 0), D_PIS(7, 1), D_PIS(7, 2), D_PIS(7, 3),
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dintel-ixp43x-gateworks-gw2358.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for Gateworks IXP43x-based Cambria GW2358
6 /dts-v1/;
8 #include "intel-ixp43x.dtsi"
13 #address-cells = <1>;
14 #size-cells = <1>;
24 stdout-path = "uart0:115200n8";
32 compatible = "gpio-leds";
33 led-user {
36 default-state = "on";
[all …]
/Linux-v6.1/crypto/
Dblake2b_generic.c1 // SPDX-License-Identifier: (GPL-2.0-only OR Apache-2.0)
11 * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
12 * - OpenSSL license : https://www.openssl.org/source/license.html
13 * - Apache 2.0 : https://www.apache.org/licenses/LICENSE-2.0
26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
[all …]
/Linux-v6.1/drivers/staging/media/atomisp/pci/
Dinput_system_ctrl_defs.h1 /* SPDX-License-Identifier: GPL-2.0 */
21 /* --------------------------------------------------*/
23 /* --------------------------------------------------*/
25 /* --------------------------------------------------*/
34 #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID 3
40 #define ISYS_CTRL_ACQ_START_ADDR_REG_ID 9
62 #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3
63 #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3
64 #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3
67 #define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3
[all …]
/Linux-v6.1/drivers/clk/bcm/
Dclk-sr.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/bcm-sr.h>
12 #include "clk-iproc.h"
39 .dig_filter = DF_VAL(0x0, 4, 3, 0, 4, 7, 3),
52 .mdiv = REG_VAL(0x18, 0, 9),
58 .mdiv = REG_VAL(0x18, 10, 9),
64 .mdiv = REG_VAL(0x18, 20, 9),
69 .enable = ENABLE_VAL(0x4, 9, 3, 15),
70 .mdiv = REG_VAL(0x1c, 0, 9),
[all …]
/Linux-v6.1/arch/x86/include/asm/
Dcpufeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/required-features.h>
10 #include <asm/disabled-features.h>
16 #define NCAPINTS 20 /* N 32-bit words worth of info */
17 #define NBUGINTS 1 /* N 32-bit bug flags */
25 * please update the table in kernel/cpu/cpuid-deps.c as well.
28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
32 #define X86_FEATURE_PSE ( 0*32+ 3) /* Page Size Extensions */
34 #define X86_FEATURE_MSR ( 0*32+ 5) /* Model-Specific Registers */
38 #define X86_FEATURE_APIC ( 0*32+ 9) /* Onboard APIC */
[all …]
/Linux-v6.1/tools/arch/x86/include/asm/
Dcpufeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/required-features.h>
10 #include <asm/disabled-features.h>
16 #define NCAPINTS 20 /* N 32-bit words worth of info */
17 #define NBUGINTS 1 /* N 32-bit bug flags */
25 * please update the table in kernel/cpu/cpuid-deps.c as well.
28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
32 #define X86_FEATURE_PSE ( 0*32+ 3) /* Page Size Extensions */
34 #define X86_FEATURE_MSR ( 0*32+ 5) /* Model-Specific Registers */
38 #define X86_FEATURE_APIC ( 0*32+ 9) /* Onboard APIC */
[all …]
/Linux-v6.1/arch/arm/mach-s3c/
Dregs-s3c2443-clock.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include "map-s3c.h"
21 #define S3C2443_PLLCON_MDIVMASK ((1<<(1+(23-16)))-1)
22 #define S3C2443_PLLCON_PDIVMASK ((1<<(1+(9-8)))-1)
23 #define S3C2443_PLLCON_SDIVMASK (3)
47 #define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<7)
50 #define S3C2443_CLKSRC_EPLLREF_MASK (3<<7)
52 #define S3C2443_CLKSRC_EXTCLK_DIV (1<<3)
54 #define S3C2443_CLKDIV0_HALF_HCLK (1<<3)
57 #define S3C2443_CLKDIV0_HCLKDIV_MASK (3<<0)
[all …]
/Linux-v6.1/drivers/pinctrl/mvebu/
Dpinctrl-armada-cp110.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "pinctrl-mvebu.h"
24 * - In Armada7K (single CP) almost all the MPPs are available (except the
26 * - In Armada8K (dual CP) the MPPs are split into 2 parts, MPPs 0-31 from
27 * CPS, and MPPs 32-62 from CPM, the below flags (V_ARMADA_8K_CPM,
35 V_CP115_STANDALONE = BIT(3),
45 MPP_FUNCTION(3, "ge0", "rxd3"),
50 MPP_FUNCTION(9, "sata0", "present_act"),
56 MPP_FUNCTION(3, "ge0", "rxd2"),
61 MPP_FUNCTION(9, "sata1", "present_act"),
[all …]
/Linux-v6.1/arch/x86/crypto/
Dblake2s-core.S1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
4 * Copyright (C) 2017-2019 Samuel Neves <sneves@dei.uc.pt>. All Rights Reserved.
22 .byte 0, 2, 4, 6, 1, 3, 5, 7, 14, 8, 10, 12, 15, 9, 11, 13
23 .byte 14, 4, 9, 13, 10, 8, 15, 6, 5, 1, 0, 11, 3, 12, 2, 7
24 .byte 11, 12, 5, 15, 8, 0, 2, 13, 9, 10, 3, 7, 4, 14, 6, 1
25 .byte 7, 3, 13, 11, 9, 1, 12, 14, 15, 2, 5, 4, 8, 6, 10, 0
26 .byte 9, 5, 2, 10, 0, 7, 4, 15, 3, 14, 11, 6, 13, 1, 12, 8
27 .byte 2, 6, 0, 8, 12, 10, 11, 3, 1, 4, 7, 15, 9, 13, 5, 14
28 .byte 12, 1, 14, 4, 5, 15, 13, 10, 8, 0, 6, 9, 11, 7, 3, 2
[all …]

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