Searched +full:2 +full:c001000 (Results 1 – 10 of 10) sorted by relevance
8 gic: interrupt-controller@2c001000 {
8 * Cortex-A53 (2 cores) Soft Macrocell Model24 #address-cells = <2>;25 #size-cells = <2>;41 #address-cells = <2>;65 reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */69 #address-cells = <2>;70 #size-cells = <2>;73 /* Chipselect 2 is physically at 0x18000000 */82 gic: interrupt-controller@2c001000 {91 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;[all …]
23 #address-cells = <2>;24 #size-cells = <2>;36 #address-cells = <2>;55 cpu@2 {84 #address-cells = <2>;85 #size-cells = <2>;88 /* Chipselect 2,00000000 is physically at 0x18000000 */97 gic: interrupt-controller@2c001000 {140 <0 0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
16 #address-cells = <2>;17 #size-cells = <2>;45 cpu_on = <2>;54 gic: interrupt-controller@2c001000 {
63 /* Chipselect 2 is physically at 0x18000000 */72 hdlcd@2a110000 {80 memory-controller@2a150000 {87 memory-controller@2a190000 {96 scu@2c000000 {101 timer@2c000600 {107 timer@2c000200 {115 watchdog@2c000620 {121 gic: interrupt-controller@2c001000 {130 L2: cache-controller@2c0f0000 {[all …]
20 #address-cells = <2>;21 #size-cells = <2>;57 #address-cells = <2>;58 #size-cells = <2>;61 /* Chipselect 2 is physically at 0x18000000 */70 hdlcd@2b000000 {78 memory-controller@2b0a0000 {85 wdt@2b060000 {94 gic: interrupt-controller@2c001000 {202 arm,vexpress-sysreg,func = <2 0>;[all …]
20 #address-cells = <2>;21 #size-cells = <2>;58 cpu2: cpu@2 {113 #address-cells = <2>;114 #size-cells = <2>;117 /* Chipselect 2 is physically at 0x18000000 */126 wdt@2a490000 {134 hdlcd@2b000000 {142 memory-controller@2b0a0000 {149 gic: interrupt-controller@2c001000 {[all …]
184 timer@2 {186 reg = <2>;607 dac2: dac@2 {610 reg = <2>;991 dfsdm2: filter@2 {994 reg = <2>;1148 ipcc: mailbox@4c001000 {1212 #interrupt-cells = <2>;1268 trigger@2 {1270 reg = <2>;[all …]
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)64 ipcc: mailbox@4c001000 {
67 enum: [ 0, 1, 2 ]69 enum: [ 1, 2 ]77 The 2nd cell contains the interrupt number for the interrupt type.84 2 = high-to-low edge triggered (invalid for SPIs)98 first region is the GIC distributor register base and size. The 2nd region104 control register base and size. The 2nd additional region is the GIC106 minItems: 2125 maxItems: 2203 interrupt-controller@2c001000 {
