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Searched +full:2 +full:c001000 (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.15/arch/arm64/boot/dts/arm/
Dfoundation-v8-gicv2.dtsi8 gic: interrupt-controller@2c001000 {
Dvexpress-v2f-1xv7-ca53x2.dts8 * Cortex-A53 (2 cores) Soft Macrocell Model
24 #address-cells = <2>;
25 #size-cells = <2>;
41 #address-cells = <2>;
65 reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */
69 #address-cells = <2>;
70 #size-cells = <2>;
73 /* Chipselect 2 is physically at 0x18000000 */
82 gic: interrupt-controller@2c001000 {
91 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
[all …]
Drtsm_ve-aemv8a.dts23 #address-cells = <2>;
24 #size-cells = <2>;
36 #address-cells = <2>;
55 cpu@2 {
84 #address-cells = <2>;
85 #size-cells = <2>;
88 /* Chipselect 2,00000000 is physically at 0x18000000 */
97 gic: interrupt-controller@2c001000 {
140 <0 0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
/Linux-v5.15/Documentation/devicetree/bindings/mailbox/
Dst,stm32-ipcc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
34 minItems: 2
41 minItems: 2
68 ipcc: mailbox@4c001000 {
/Linux-v5.15/arch/arm/boot/dts/
Dxenvm-4.2.dts16 #address-cells = <2>;
17 #size-cells = <2>;
45 cpu_on = <2>;
54 gic: interrupt-controller@2c001000 {
Dvexpress-v2p-ca5s.dts63 /* Chipselect 2 is physically at 0x18000000 */
72 hdlcd@2a110000 {
80 memory-controller@2a150000 {
87 memory-controller@2a190000 {
96 scu@2c000000 {
101 timer@2c000600 {
107 timer@2c000200 {
115 watchdog@2c000620 {
121 gic: interrupt-controller@2c001000 {
130 L2: cache-controller@2c0f0000 {
[all …]
Dvexpress-v2p-ca15-tc1.dts20 #address-cells = <2>;
21 #size-cells = <2>;
57 #address-cells = <2>;
58 #size-cells = <2>;
61 /* Chipselect 2 is physically at 0x18000000 */
70 hdlcd@2b000000 {
78 memory-controller@2b0a0000 {
85 wdt@2b060000 {
94 gic: interrupt-controller@2c001000 {
202 arm,vexpress-sysreg,func = <2 0>;
[all …]
Dvexpress-v2p-ca15_a7.dts20 #address-cells = <2>;
21 #size-cells = <2>;
58 cpu2: cpu@2 {
113 #address-cells = <2>;
114 #size-cells = <2>;
117 /* Chipselect 2 is physically at 0x18000000 */
126 wdt@2a490000 {
134 hdlcd@2b000000 {
142 memory-controller@2b0a0000 {
149 gic: interrupt-controller@2c001000 {
[all …]
Dstm32mp151.dtsi180 timer@2 {
182 reg = <2>;
577 dac2: dac@2 {
580 reg = <2>;
936 dfsdm2: filter@2 {
939 reg = <2>;
1092 ipcc: mailbox@4c001000 {
1157 #interrupt-cells = <2>;
1213 trigger@2 {
1215 reg = <2>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic.yaml76 The 2nd cell contains the interrupt number for the interrupt type.
83 2 = high-to-low edge triggered (invalid for SPIs)
97 first region is the GIC distributor register base and size. The 2nd region
103 control register base and size. The 2nd additional region is the GIC
105 minItems: 2
124 maxItems: 2
202 interrupt-controller@2c001000 {