| /Linux-v5.15/tools/perf/pmu-events/arch/x86/icelake/ |
| D | other.json | 3 …eous requests, such as I/O and un-cacheable accesses that hit a cacheline in the L3 where a snoop …
4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3",
11 "PEBScounters": "0,1,2,3",
12 …rogrammed only with a specific pair of event select and counter MSR, and with specific event codes…
19 "CollectPEBSRecord": "2",
20 "Counter": "0,1,2,3",
26 "PEBScounters": "0,1,2,3",
27 …rogrammed only with a specific pair of event select and counter MSR, and with specific event codes…
34 "CollectPEBSRecord": "2",
[all …]
|
| D | virtual-memory.json | 4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
15 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
16 "CollectPEBSRecord": "2",
17 "Counter": "0,1,2,3",
20 "PEBScounters": "0,1,2,3",
21 …caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of…
28 "CollectPEBSRecord": "2",
29 "Counter": "0,1,2,3",
[all …]
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| D | frontend.json | 3 … number when the front end is resteered, mainly when the BPU cannot provide a correct prediction a…
4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
9 …the front-end is resteered when it finds a branch instruction in a fetch line. This occurs for the…
16 "CollectPEBSRecord": "2",
17 "Counter": "0,1,2,3,4,5,6,7",
23 "PEBScounters": "0,1,2,3,4,5,6,7",
31 "CollectPEBSRecord": "2",
32 "Counter": "0,1,2,3",
[all …]
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| /Linux-v5.15/tools/perf/pmu-events/arch/x86/tigerlake/ |
| D | virtual-memory.json | 4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
14 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
15 "CollectPEBSRecord": "2",
16 "Counter": "0,1,2,3",
20 "PEBScounters": "0,1,2,3",
21 …ounts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.…
26 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
27 "CollectPEBSRecord": "2",
[all …]
|
| D | frontend.json | 3 … number when the front end is resteered, mainly when the BPU cannot provide a correct prediction a…
4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
9 …the front-end is resteered when it finds a branch instruction in a fetch line. This occurs for the…
15 "CollectPEBSRecord": "2",
16 "Counter": "0,1,2,3",
21 "PEBScounters": "0,1,2,3",
22 …"PublicDescription": "Counts the number of Decode Stream Buffer (DSB a.k.a. Uop Cache)-to-MITE spe…
28 "CollectPEBSRecord": "2",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/icelakex/ |
| D | virtual-memory.json | 3 "BriefDescription": "Page walks completed due to a demand data load to a 4K page.",
4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
9 …ions missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
15 "BriefDescription": "Page walks completed due to a demand data load to a 2M/4M page.",
16 "CollectPEBSRecord": "2",
17 "Counter": "0,1,2,3",
20 "PEBScounters": "0,1,2,3",
21 …2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and…
[all …]
|
| D | frontend.json | 4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
16 "CollectPEBSRecord": "2",
17 "Counter": "0,1,2,3",
21 "PEBScounters": "0,1,2,3",
29 "CollectPEBSRecord": "2",
30 "Counter": "0,1,2,3",
34 "PEBScounters": "0,1,2,3",
42 "CollectPEBSRecord": "2",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | virtual-memory.json | 4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
8 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
23 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page wa…
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3,4,5,6,7",
29 …n": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a load.",
34 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
[all …]
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| D | memory.json | 4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "CounterMask": "2",
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3,4,5,6,7",
35 "Counter": "0,1,2,3",
36 "CounterHTOff": "0,1,2,3,4,5,6,7",
44 "Counter": "0,1,2,3",
[all …]
|
| D | cache.json | 4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
13 …es a request needed a FB entry but there was no entry available for it. That is the FB unavailabil…
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
18 …licDescription": "Number of times a request needed a FB (Fill Buffer) entry but there was no entry…
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3,4,5,6,7",
28 …t FB, if it is allocated by hardware or software prefetch.Note: In the L1D, a Demand Read contains…
34 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | virtual-memory.json | 4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
8 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
23 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page wa…
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3,4,5,6,7",
29 …n": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a load.",
34 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
[all …]
|
| D | other.json | 3 …"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped…
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
13 …"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped…
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
23 …"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped…
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3,4,5,6,7",
28 …ore cycles where the core was running with power-delivery for license level 2 (introduced in Skyla…
[all …]
|
| D | memory.json | 4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "CounterMask": "2",
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3,4,5,6,7",
35 "Counter": "0,1,2,3",
36 "CounterHTOff": "0,1,2,3,4,5,6,7",
44 "Counter": "0,1,2,3",
[all …]
|
| D | cache.json | 4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
13 …es a request needed a FB entry but there was no entry available for it. That is the FB unavailabil…
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
18 …licDescription": "Number of times a request needed a FB (Fill Buffer) entry but there was no entry…
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3,4,5,6,7",
28 …t FB, if it is allocated by hardware or software prefetch.Note: In the L1D, a Demand Read contains…
34 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/skylake/ |
| D | virtual-memory.json | 4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
8 …PublicDescription": "Counts demand data stores that caused a page walk of any page size (4K/2M/4M/…
13 "BriefDescription": "Page walk completed due to a demand data store to a 2M/4M page",
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
18 …2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB an…
23 …"BriefDescription": "Counts 1 per cycle for each PMH that is busy with a page walk for an instruct…
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3,4,5,6,7",
[all …]
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| /Linux-v5.15/lib/ |
| D | list_sort.c | 11 * Returns a list organized in an intermediate format suited
15 __attribute__((nonnull(2,3,4)))
17 struct list_head *a, struct list_head *b) in merge() argument
22 /* if equal, take 'a' -- important for sort stability */ in merge()
23 if (cmp(priv, a, b) <= 0) { in merge()
24 *tail = a; in merge()
25 tail = &a->next; in merge()
26 a = a->next; in merge()
27 if (!a) { in merge()
36 *tail = a; in merge()
[all …]
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| /Linux-v5.15/tools/perf/pmu-events/arch/x86/goldmontplus/ |
| D | virtual-memory.json | 4 …all TLB levels and were mapped to 4K pages. The page walks can end with or without a page fault.",
6 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
12 "BriefDescription": "Page walk completed due to a demand load to a 4K page"
16 …ons missed in all TLB levels and were mapped to 2M or 4M pages. The page walks can end with or wi…
18 "Counter": "0,1,2,3",
20 "PEBScounters": "0,1,2,3",
24 "BriefDescription": "Page walk completed due to a demand load to a 2M or 4M page"
28 …ll TLB levels and were mapped to 1GB pages. The page walks can end with or without a page fault.",
30 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/arch/powerpc/crypto/ |
| D | md5-asm.S | 65 #define R_00_15(a, b, c, d, w0, w1, p, q, off, k0h, k0l, k1h, k1l) \ argument
73 add a,a,rT0; /* 1: a = a + f */ \
75 addis w1,w1,k1h; /* 2: wk = w + k */ \
76 add a,a,w0; /* 1: a = a + wk */ \
77 addi w1,w1,k1l; /* 2: wk = w + k' */ \
78 rotrwi a,a,p; /* 1: a = a rotl x */ \
79 add d,d,w1; /* 2: a = a + wk */ \
80 add a,a,b; /* 1: a = a + b */ \
81 and rT0,a,b; /* 2: f = b and c */ \
82 andc rT1,c,a; /* 2: f' = ~b and d */ \
[all …]
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| /Linux-v5.15/arch/x86/crypto/ |
| D | sha256-ssse3-asm.S | 11 # This software is available to you under a choice of one of two
13 # General Public License (GPL) Version 2, available from the file
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
91 INP = %rsi # 2nd arg
99 a = %eax define
134 # Rotate values of symbols a...h
143 b = a
144 a = TMP_ define
148 ## compute s0 four at a time and s1 two at a time
149 ## compute W[-16] + W[-7] 4 at a time
[all …]
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| D | sha256-avx-asm.S | 11 # This software is available to you under a choice of one of two
13 # General Public License (GPL) Version 2, available from the file
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
47 # This code schedules 1 block at a time, with 4 lanes per block
98 INP = %rsi # 2nd arg
106 a = %eax define
140 # Rotate values of symbols a...h
149 b = a
150 a = TMP_ define
154 ## compute s0 four at a time and s1 two at a time
[all …]
|
| /Linux-v5.15/Documentation/userspace-api/media/v4l/ |
| D | pixfmt-rgb.rst | 9 These formats encode each pixel as a triplet of RGB values. They are packed
12 bits required to store a pixel is not aligned to a byte boundary, the data is
20 or a permutation thereof, collectively referred to as alpha formats) depend on
24 a meaningful value. Otherwise, when the device doesn't capture an alpha channel
25 but can set the alpha bit to a user-configurable value, the
28 the value specified by that control. Otherwise a corresponding format without
34 filled with meaningful values by applications. Otherwise a corresponding format
38 Formats that contain padding bits are named XRGB (or a permutation thereof).
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
46 respectively. 'a' denotes bits of the alpha component (if supported by the
[all …]
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| /Linux-v5.15/arch/sparc/crypto/ |
| D | opcodes.h | 18 #define CRC32C(a,b,c) \ argument
19 .word (F3F(2,0x36,0x147)|RS1(a)|RS2(b)|RD(c));
30 #define AES_EROUND01(a,b,c,d) \ argument
31 .word (F3F(2, 0x19, 0)|RS1(a)|RS2(b)|RS3(c)|RD(d));
32 #define AES_EROUND23(a,b,c,d) \ argument
33 .word (F3F(2, 0x19, 1)|RS1(a)|RS2(b)|RS3(c)|RD(d));
34 #define AES_DROUND01(a,b,c,d) \ argument
35 .word (F3F(2, 0x19, 2)|RS1(a)|RS2(b)|RS3(c)|RD(d));
36 #define AES_DROUND23(a,b,c,d) \ argument
37 .word (F3F(2, 0x19, 3)|RS1(a)|RS2(b)|RS3(c)|RD(d));
[all …]
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| /Linux-v5.15/drivers/input/serio/ |
| D | Kconfig | 11 * standard AT keyboard and PS/2 mouse *
17 To compile this driver as a module, choose M here: the
24 the architecture might use a PC serio device (i8042) to
34 i8042 is the chip over which the standard AT keyboard and PS/2
40 To compile this driver as a module, choose M here: the
55 To compile this driver as a module, choose M here: the
62 Say Y here if you have a Texas Instruments TravelMate notebook
63 equipped with the ct82c710 chip and want to use a mouse connected
68 To compile this driver as a module, choose M here: the
79 Say Y here if you built a simple parallel port adapter to attach
[all …]
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| /Linux-v5.15/tools/perf/pmu-events/arch/x86/tremontx/ |
| D | virtual-memory.json | 3 "CollectPEBSRecord": "2",
4 …all TLB levels and were mapped to 4K pages. The page walks can end with or without a page fault.",
6 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
12 "BriefDescription": "Page walk completed due to a demand load to a 4K page."
15 "CollectPEBSRecord": "2",
16 …ons missed in all TLB levels and were mapped to 2M or 4M pages. The page walks can end with or wi…
18 "Counter": "0,1,2,3",
20 "PEBScounters": "0,1,2,3",
24 "BriefDescription": "Page walk completed due to a demand load to a 2M or 4M page."
[all …]
|
| /Linux-v5.15/Documentation/filesystems/ |
| D | configfs.rst | 16 configfs is a ram-based filesystem that provides the converse of
17 sysfs's functionality. Where sysfs is a filesystem-based view of
18 kernel objects, configfs is a filesystem-based manager of kernel
21 With sysfs, an object is created in kernel (for example, when a device
24 readdir(3)/read(2). It may allow some attributes to be modified via
25 write(2). The important point is that the object is created and
27 representation, and sysfs is merely a window on all this.
29 A configfs config_item is created via an explicit userspace operation:
30 mkdir(2). It is destroyed via rmdir(2). The attributes appear at
31 mkdir(2) time, and can be read or modified via read(2) and write(2).
[all …]
|
