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/Linux-v5.10/drivers/video/logo/
Dlogo_parisc_clut224.ppm5 2 2 2 2 2 2 2 2 2 2 2 2
6 2 2 2 2 2 2 2 2 2 2 2 2
7 2 2 2 2 2 2 2 2 2 2 2 2
8 2 2 2 2 2 2 2 2 2 2 2 2
9 2 2 2 2 2 2 2 2 2 2 2 2
10 2 2 2 2 2 2 2 2 2 2 2 2
11 2 2 2 2 2 2 2 2 2 2 2 2
12 2 2 2 2 2 2 2 2 2 2 2 2
13 2 2 2 2 2 2 2 2 2 2 2 2
14 2 2 2 2 2 2 6 6 7 6 6 7
[all …]
Dlogo_superh_clut224.ppm5 2 2 2 2 2 2 2 2 2 2 2 2
6 2 2 2 2 2 2 2 2 2 2 2 2
7 2 2 2 2 2 2 2 2 2 2 2 2
8 2 2 2 2 2 2 2 2 2 2 2 2
9 2 2 2 2 2 2 2 2 2 2 2 2
10 2 2 2 2 2 2 2 2 2 2 2 2
11 2 2 2 2 2 2 2 2 2 2 2 2
12 2 2 2 2 2 2 2 2 2 2 2 2
13 2 2 2 2 2 2 2 2 2 2 2 2
16 2 2 2 2 2 2 2 2 2 2 2 2
[all …]
Dlogo_linux_clut224.ppm94 2 2 6 2 2 6 2 2 6 2 2 6
95 2 2 6 2 2 6 2 2 6 2 2 6
113 78 78 78 34 34 34 2 2 6 2 2 6
114 2 2 6 2 2 6 2 2 6 2 2 6
115 2 2 6 2 2 6 2 2 6 2 2 6
116 2 2 6 2 2 6 6 6 6 70 70 70
133 26 26 26 2 2 6 2 2 6 2 2 6
134 2 2 6 2 2 6 2 2 6 2 2 6
135 2 2 6 2 2 6 2 2 6 14 14 14
136 46 46 46 34 34 34 6 6 6 2 2 6
[all …]
Dlogo_sgi_clut224.ppm94 2 2 6 2 2 6 2 2 6 2 2 6
95 2 2 6 2 2 6 2 2 6 2 2 6
113 78 78 78 34 34 34 2 2 6 2 2 6
114 2 2 6 2 2 6 2 2 6 2 2 6
115 2 2 6 2 2 6 2 2 6 2 2 6
116 2 2 6 2 2 6 6 6 6 70 70 70
133 26 26 26 2 2 6 2 2 6 2 2 6
134 2 2 6 2 2 6 2 2 6 2 2 6
135 2 2 6 2 2 6 2 2 6 14 14 14
136 46 46 46 34 34 34 6 6 6 2 2 6
[all …]
Dlogo_sun_clut224.ppm94 2 2 6 2 2 6 2 2 6 2 2 6
95 2 2 6 2 2 6 2 2 6 2 2 6
113 78 78 78 34 34 34 2 2 6 2 2 6
114 2 2 6 2 2 6 2 2 6 2 2 6
115 2 2 6 2 2 6 2 2 6 2 2 6
116 2 2 6 2 2 6 6 6 6 70 70 70
133 26 26 26 2 2 6 2 2 6 2 2 6
134 2 2 6 2 2 6 2 2 6 2 2 6
135 2 2 6 2 2 6 2 2 6 14 14 14
136 46 46 46 34 34 34 6 6 6 2 2 6
[all …]
Dlogo_dec_clut224.ppm94 2 2 6 2 2 6 2 2 6 2 2 6
95 2 2 6 2 2 6 2 2 6 2 2 6
113 78 78 78 34 34 34 2 2 6 2 2 6
114 2 2 6 2 2 6 2 2 6 2 2 6
115 2 2 6 2 2 6 2 2 6 2 2 6
116 2 2 6 2 2 6 6 6 6 70 70 70
133 26 26 26 2 2 6 2 2 6 2 2 6
134 2 2 6 2 2 6 2 2 6 2 2 6
135 2 2 6 2 2 6 2 2 6 14 14 14
136 46 46 46 34 34 34 6 6 6 2 2 6
[all …]
Dlogo_mac_clut224.ppm94 2 2 6 2 2 6 2 2 6 2 2 6
95 2 2 6 2 2 6 2 2 6 2 2 6
113 78 78 78 34 34 34 2 2 6 2 2 6
114 2 2 6 2 2 6 2 2 6 2 2 6
115 2 2 6 2 2 6 2 2 6 2 2 6
116 2 2 6 2 2 6 6 6 6 70 70 70
133 46 46 46 2 2 6 2 2 6 2 2 6
134 2 2 6 2 2 6 2 2 6 2 2 6
135 2 2 6 2 2 6 2 2 6 14 14 14
136 46 46 46 34 34 34 6 6 6 2 2 6
[all …]
Dlogo_spe_clut224.ppm6 0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 6 6 6
7 15 15 15 21 21 21 19 19 19 14 14 14 6 6 6 2 2 2
13 0 0 0 0 0 0 0 0 0 2 2 2 21 21 21 55 55 55
20 0 0 0 0 0 0 2 2 2 27 27 27 62 62 62 17 17 19
21 2 2 6 2 2 6 2 2 6 2 2 6 16 16 18 57 57 57
27 0 0 0 0 0 0 16 16 16 62 62 62 8 8 10 2 2 6
28 2 2 6 2 2 6 2 2 6 12 12 14 67 67 67 16 16 17
34 0 0 0 2 2 2 35 35 35 40 40 40 2 2 6 2 2 6
35 2 2 6 2 2 6 2 2 6 15 15 17 70 70 70 27 27 27
41 0 0 0 4 4 4 58 58 58 12 12 14 2 2 6 2 2 6
[all …]
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h41 …ne mmDC_PERFMON0_PERFCOUNTER_CNTL_BASE_IDX 2
43 …ne mmDC_PERFMON0_PERFCOUNTER_CNTL2_BASE_IDX 2
45 …ne mmDC_PERFMON0_PERFCOUNTER_STATE_BASE_IDX 2
47 …ne mmDC_PERFMON0_PERFMON_CNTL_BASE_IDX 2
49 …ne mmDC_PERFMON0_PERFMON_CNTL2_BASE_IDX 2
51 …ne mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC_BASE_IDX 2
53 …ne mmDC_PERFMON0_PERFMON_CVALUE_LOW_BASE_IDX 2
55 …ne mmDC_PERFMON0_PERFMON_HI_BASE_IDX 2
57 …ne mmDC_PERFMON0_PERFMON_LOW_BASE_IDX 2
63 …ne mmDC_PERFMON13_PERFCOUNTER_CNTL_BASE_IDX 2
[all …]
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_0_offset.h333 …ne mmDC_PERFMON0_PERFCOUNTER_CNTL_BASE_IDX 2
335 …ne mmDC_PERFMON0_PERFCOUNTER_CNTL2_BASE_IDX 2
337 …ne mmDC_PERFMON0_PERFCOUNTER_STATE_BASE_IDX 2
339 …ne mmDC_PERFMON0_PERFMON_CNTL_BASE_IDX 2
341 …ne mmDC_PERFMON0_PERFMON_CNTL2_BASE_IDX 2
343 …ne mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC_BASE_IDX 2
345 …ne mmDC_PERFMON0_PERFMON_CVALUE_LOW_BASE_IDX 2
347 …ne mmDC_PERFMON0_PERFMON_HI_BASE_IDX 2
349 …ne mmDC_PERFMON0_PERFMON_LOW_BASE_IDX 2
355 …ne mmDC_PERFMON1_PERFCOUNTER_CNTL_BASE_IDX 2
[all …]
Ddcn_2_1_0_offset.h323 …ne mmDC_PERFMON0_PERFCOUNTER_CNTL_BASE_IDX 2
325 …ne mmDC_PERFMON0_PERFCOUNTER_CNTL2_BASE_IDX 2
327 …ne mmDC_PERFMON0_PERFCOUNTER_STATE_BASE_IDX 2
329 …ne mmDC_PERFMON0_PERFMON_CNTL_BASE_IDX 2
331 …ne mmDC_PERFMON0_PERFMON_CNTL2_BASE_IDX 2
333 …ne mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC_BASE_IDX 2
335 …ne mmDC_PERFMON0_PERFMON_CVALUE_LOW_BASE_IDX 2
337 …ne mmDC_PERFMON0_PERFMON_HI_BASE_IDX 2
339 …ne mmDC_PERFMON0_PERFMON_LOW_BASE_IDX 2
345 …ne mmDC_PERFMON1_PERFCOUNTER_CNTL_BASE_IDX 2
[all …]
Ddcn_1_0_offset.h681 …ne mmDC_PERFMON0_PERFCOUNTER_CNTL_BASE_IDX 2
683 …ne mmDC_PERFMON0_PERFCOUNTER_CNTL2_BASE_IDX 2
685 …ne mmDC_PERFMON0_PERFCOUNTER_STATE_BASE_IDX 2
687 …ne mmDC_PERFMON0_PERFMON_CNTL_BASE_IDX 2
689 …ne mmDC_PERFMON0_PERFMON_CNTL2_BASE_IDX 2
691 …ne mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC_BASE_IDX 2
693 …ne mmDC_PERFMON0_PERFMON_CVALUE_LOW_BASE_IDX 2
695 …ne mmDC_PERFMON0_PERFMON_HI_BASE_IDX 2
697 …ne mmDC_PERFMON0_PERFMON_LOW_BASE_IDX 2
703 …ne mmDC_PERFMON1_PERFCOUNTER_CNTL_BASE_IDX 2
[all …]
Ddcn_3_0_0_offset.h302 …ne mmPHYASYMCLK_CLOCK_CNTL_BASE_IDX 2
304 …ne mmPHYBSYMCLK_CLOCK_CNTL_BASE_IDX 2
306 …ne mmPHYCSYMCLK_CLOCK_CNTL_BASE_IDX 2
308 …ne mmPHYDSYMCLK_CLOCK_CNTL_BASE_IDX 2
310 …ne mmPHYESYMCLK_CLOCK_CNTL_BASE_IDX 2
312 …ne mmPHYFSYMCLK_CLOCK_CNTL_BASE_IDX 2
324 …ne mmDC_PERFMON0_PERFCOUNTER_CNTL_BASE_IDX 2
326 …ne mmDC_PERFMON0_PERFCOUNTER_CNTL2_BASE_IDX 2
328 …ne mmDC_PERFMON0_PERFCOUNTER_STATE_BASE_IDX 2
330 …ne mmDC_PERFMON0_PERFMON_CNTL_BASE_IDX 2
[all …]
Ddpcs_3_0_0_offset.h9 …ne mmDPCSTX0_DPCSTX_TX_CLOCK_CNTL_BASE_IDX 2
11 …ne mmDPCSTX0_DPCSTX_TX_CNTL_BASE_IDX 2
13 …ne mmDPCSTX0_DPCSTX_CBUS_CNTL_BASE_IDX 2
15 …ne mmDPCSTX0_DPCSTX_INTERRUPT_CNTL_BASE_IDX 2
17 …ne mmDPCSTX0_DPCSTX_PLL_UPDATE_ADDR_BASE_IDX 2
19 …ne mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA_BASE_IDX 2
25 …ne mmRDPCSTX0_RDPCSTX_CNTL_BASE_IDX 2
27 …ne mmRDPCSTX0_RDPCSTX_CLOCK_CNTL_BASE_IDX 2
29 …ne mmRDPCSTX0_RDPCSTX_INTERRUPT_CONTROL_BASE_IDX 2
31 …ne mmRDPCSTX0_RDPCSTX_PLL_UPDATE_DATA_BASE_IDX 2
[all …]
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dpcs/
Ddpcs_2_1_0_offset.h29 …ne mmDPCSTX0_DPCSTX_TX_CLOCK_CNTL_BASE_IDX 2
31 …ne mmDPCSTX0_DPCSTX_TX_CNTL_BASE_IDX 2
33 …ne mmDPCSTX0_DPCSTX_CBUS_CNTL_BASE_IDX 2
35 …ne mmDPCSTX0_DPCSTX_INTERRUPT_CNTL_BASE_IDX 2
37 …ne mmDPCSTX0_DPCSTX_PLL_UPDATE_ADDR_BASE_IDX 2
39 …ne mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA_BASE_IDX 2
41 …ne mmDPCSTX0_DPCSTX_DEBUG_CONFIG_BASE_IDX 2
47 …ne mmRDPCSTX0_RDPCSTX_CNTL_BASE_IDX 2
49 …ne mmRDPCSTX0_RDPCSTX_CLOCK_CNTL_BASE_IDX 2
51 …ne mmRDPCSTX0_RDPCSTX_INTERRUPT_CONTROL_BASE_IDX 2
[all …]
Ddpcs_2_0_0_offset.h29 …ne mmDPCSTX0_DPCSTX_TX_CLOCK_CNTL_BASE_IDX 2
31 …ne mmDPCSTX0_DPCSTX_TX_CNTL_BASE_IDX 2
33 …ne mmDPCSTX0_DPCSTX_CBUS_CNTL_BASE_IDX 2
35 …ne mmDPCSTX0_DPCSTX_INTERRUPT_CNTL_BASE_IDX 2
37 …ne mmDPCSTX0_DPCSTX_PLL_UPDATE_ADDR_BASE_IDX 2
39 …ne mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA_BASE_IDX 2
41 …ne mmDPCSTX0_DPCSTX_DEBUG_CONFIG_BASE_IDX 2
47 …ne mmRDPCSTX0_RDPCSTX_CNTL_BASE_IDX 2
49 …ne mmRDPCSTX0_RDPCSTX_CLOCK_CNTL_BASE_IDX 2
51 …ne mmRDPCSTX0_RDPCSTX_INTERRUPT_CONTROL_BASE_IDX 2
[all …]
/Linux-v5.10/arch/arm64/crypto/
Dpoly1305-core.S_shipped87 add x12,x12,x13,lsl#26 // base 2^26 -> base 2^64
97 add x9,x8,x8,lsr#2 // s1 = r1 + (r1 >> 2)
139 add x10,x10,x14,lsr#2
157 ldp x4,x5,[x0] // load hash base 2^64
175 add x12,x12,x13,lsl#26 // base 2^26 -> base 2^64
241 add x10,x10,x14,lsr#2
252 and x12,x4,#0x03ffffff // base 2^64 -> base 2^26
260 add w12,w13,w13,lsl#2 // r1*5
262 add w13,w14,w14,lsl#2 // r2*5
263 str w12,[x0,#16*2] // s1
[all …]
/Linux-v5.10/drivers/misc/habanalabs/gaudi/
Dgaudi_security.c489 word_offset = ((mmMME0_CTRL_RESET & PROT_BITS_OFFS) >> 7) << 2; in gaudi_init_mme_protection_bits()
490 mask = 1U << ((mmMME0_CTRL_RESET & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
491 mask |= 1U << ((mmMME0_CTRL_QM_STALL & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
492 mask |= 1U << ((mmMME0_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
493 mask |= 1U << ((mmMME0_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
494 mask |= 1U << ((mmMME0_CTRL_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
495 mask |= 1U << ((mmMME0_CTRL_INTR_MASK & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
496 mask |= 1U << ((mmMME0_CTRL_LOG_SHADOW & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
497 mask |= 1U << ((mmMME0_CTRL_PCU_RL_DESC0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
498 mask |= 1U << ((mmMME0_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
[all …]
/Linux-v5.10/arch/powerpc/lib/
Dfeature-fixups-test.S20 or 2,2,2 /* fixup will nop out this instruction */
27 or 2,2,2
37 or 2,2,2 /* fixup will replace this with ftr_fixup_test2_alt */
44 or 2,2,2
57 or 2,2,2 /* fixup will fail to replace this */
64 or 2,2,2
73 or 2,2,2
74 or 2,2,2
75 or 2,2,2
76 or 2,2,2
[all …]
/Linux-v5.10/drivers/misc/habanalabs/goya/
Dgoya_security.c68 word_offset = ((mmMME_DUMMY & PROT_BITS_OFFS) >> 7) << 2; in goya_init_mme_protection_bits()
69 mask = 1 << ((mmMME_DUMMY & 0x7F) >> 2); in goya_init_mme_protection_bits()
70 mask |= 1 << ((mmMME_RESET & 0x7F) >> 2); in goya_init_mme_protection_bits()
71 mask |= 1 << ((mmMME_STALL & 0x7F) >> 2); in goya_init_mme_protection_bits()
72 mask |= 1 << ((mmMME_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); in goya_init_mme_protection_bits()
73 mask |= 1 << ((mmMME_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); in goya_init_mme_protection_bits()
74 mask |= 1 << ((mmMME_DBGMEM_ADD & 0x7F) >> 2); in goya_init_mme_protection_bits()
75 mask |= 1 << ((mmMME_DBGMEM_DATA_WR & 0x7F) >> 2); in goya_init_mme_protection_bits()
76 mask |= 1 << ((mmMME_DBGMEM_DATA_RD & 0x7F) >> 2); in goya_init_mme_protection_bits()
77 mask |= 1 << ((mmMME_DBGMEM_CTRL & 0x7F) >> 2); in goya_init_mme_protection_bits()
[all …]
/Linux-v5.10/arch/xtensa/variants/de212/include/variant/
Dtie.h58 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
59 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
62 * galign = group byte alignment (power of 2) (galign >= align)
63 * align = register byte alignment (power of 2)
123 #define XCHAL_OP0_FORMAT_LENGTHS 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
126 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
127 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
128 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
129 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
130 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
[all …]
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dsc/
Dqp_tables.h32 { 7.5, { 0, 2, 4, 6, 6, 6, 6, 7, 7, 7, 8, 9, 9, 11, 15} },
33 { 8, { 0, 2, 3, 5, 5, 6, 6, 7, 7, 7, 8, 8, 9, 11, 14} },
34 { 8.5, { 0, 2, 3, 4, 5, 5, 5, 6, 6, 7, 8, 8, 9, 11, 14} },
35 { 9, { 0, 2, 3, 4, 5, 5, 5, 6, 6, 7, 8, 8, 9, 11, 13} },
36 { 9.5, { 0, 2, 3, 4, 4, 5, 5, 6, 6, 7, 8, 8, 9, 11, 13} },
37 { 10, { 0, 2, 2, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 11, 12} },
38 {10.5, { 0, 2, 2, 3, 4, 4, 5, 6, 6, 7, 8, 8, 9, 11, 12} },
39 { 11, { 0, 2, 2, 3, 4, 4, 5, 6, 6, 7, 8, 8, 9, 10, 11} },
40 {11.5, { 0, 2, 2, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 10, 11} },
41 { 12, { 0, 2, 2, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 10} },
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Dsama5d2-pinfunc.h8 #define PIN_PA0__QSPI0_SCK PINMUX_PIN(PIN_PA0, 2, 1)
9 #define PIN_PA0__D0 PINMUX_PIN(PIN_PA0, 6, 2)
13 #define PIN_PA1__QSPI0_CS PINMUX_PIN(PIN_PA1, 2, 1)
14 #define PIN_PA1__D1 PINMUX_PIN(PIN_PA1, 6, 2)
15 #define PIN_PA2 2
18 #define PIN_PA2__QSPI0_IO0 PINMUX_PIN(PIN_PA2, 2, 1)
19 #define PIN_PA2__D2 PINMUX_PIN(PIN_PA2, 6, 2)
23 #define PIN_PA3__QSPI0_IO1 PINMUX_PIN(PIN_PA3, 2, 1)
24 #define PIN_PA3__D3 PINMUX_PIN(PIN_PA3, 6, 2)
28 #define PIN_PA4__QSPI0_IO2 PINMUX_PIN(PIN_PA4, 2, 1)
[all …]
/Linux-v5.10/arch/xtensa/variants/csp/include/variant/
Dtie.h81 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
82 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
85 * galign = group byte alignment (power of 2) (galign >= align)
86 * align = register byte alignment (power of 2)
113 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0) \
148 #define XCHAL_OP0_FORMAT_LENGTHS 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
151 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
152 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
153 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
154 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
[all …]
/Linux-v5.10/arch/xtensa/variants/test_kc705_be/include/variant/
Dtie.h35 #define XCHAL_CP_NUM 2 /* number of coprocessors */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
85 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
88 * galign = group byte alignment (power of 2) (galign >= align)
89 * align = register byte alignment (power of 2)
116 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0) \
137 XCHAL_SA_REG(s,0,0,2,0, aep0, 8, 8, 8,0x0060, aep,0 , 48,0,0,0) \
138 XCHAL_SA_REG(s,0,0,2,0, aep1, 8, 8, 8,0x0061, aep,1 , 48,0,0,0) \
139 XCHAL_SA_REG(s,0,0,2,0, aep2, 8, 8, 8,0x0062, aep,2 , 48,0,0,0) \
140 XCHAL_SA_REG(s,0,0,2,0, aep3, 8, 8, 8,0x0063, aep,3 , 48,0,0,0) \
[all …]

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