| /Linux-v5.15/arch/xtensa/variants/de212/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
40 /* Save area for non-coprocessor optional and custom (TIE) state: */
45 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
58 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
59 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
62 * galign = group byte alignment (power of 2) (galign >= align)
63 * align = register byte alignment (power of 2)
66 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
68 * regnum = reg index in regfile, or special/TIE-user reg number
[all …]
|
| /Linux-v5.15/arch/xtensa/variants/csp/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
63 /* Save area for non-coprocessor optional and custom (TIE) state: */
68 #define XCHAL_TOTAL_SA_SIZE 48 /* with 16-byte align padding */
81 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
82 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
85 * galign = group byte alignment (power of 2) (galign >= align)
86 * align = register byte alignment (power of 2)
89 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
91 * regnum = reg index in regfile, or special/TIE-user reg number
[all …]
|
| /Linux-v5.15/arch/xtensa/variants/test_kc705_be/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
35 #define XCHAL_CP_NUM 2 /* number of coprocessors */
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
71 #define XCHAL_TOTAL_SA_SIZE 160 /* with 16-byte align padding */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
85 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
88 * galign = group byte alignment (power of 2) (galign >= align)
89 * align = register byte alignment (power of 2)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
[all …]
|
| /Linux-v5.15/arch/xtensa/variants/test_kc705_hifi/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
35 #define XCHAL_CP_NUM 2 /* number of coprocessors */
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
71 #define XCHAL_TOTAL_SA_SIZE 240 /* with 16-byte align padding */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
85 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
88 * galign = group byte alignment (power of 2) (galign >= align)
89 * align = register byte alignment (power of 2)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
[all …]
|
| /Linux-v5.15/arch/powerpc/lib/ |
| D | feature-fixups-test.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
20 or 2,2,2 /* fixup will nop out this instruction */
21 or 3,3,3
27 or 2,2,2
28 or 3,3,3
33 or 3,3,3
37 or 2,2,2 /* fixup will replace this with ftr_fixup_test2_alt */
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/sandybridge/ |
| D | pipeline.json | 4 "Counter": "Fixed counter 2",
9 "CounterHTOff": "Fixed counter 2"
12 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
40 "Counter": "0,1,2,3",
45 "CounterHTOff": "0,1,2,3,4,5,6,7"
48 … See the table of not supported store forwards in the Intel\u00ae 64 and IA-32 Architectures Opti…
50 "Counter": "0,1,2,3",
54 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
55 "CounterHTOff": "0,1,2,3,4,5,6,7"
59 "Counter": "0,1,2,3",
[all …]
|
| D | cache.json | 4 "Counter": "0,1,2,3",
9 "CounterHTOff": "0,1,2,3,4,5,6,7"
13 "Counter": "0,1,2,3",
18 "CounterHTOff": "0,1,2,3,4,5,6,7"
22 "Counter": "0,1,2,3",
27 "CounterHTOff": "0,1,2,3,4,5,6,7"
31 "Counter": "0,1,2,3",
36 "CounterHTOff": "0,1,2,3,4,5,6,7"
40 "Counter": "0,1,2,3",
45 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/ivybridge/ |
| D | pipeline.json | 29 "Counter": "Fixed counter 2",
34 "CounterHTOff": "Fixed counter 2"
39 "Counter": "0,1,2,3",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
44 "CounterHTOff": "0,1,2,3,4,5,6,7"
49 "Counter": "0,1,2,3",
54 "CounterHTOff": "0,1,2,3,4,5,6,7"
59 "Counter": "0,1,2,3",
64 "CounterHTOff": "0,1,2,3,4,5,6,7"
68 "Counter": "0,1,2,3",
[all …]
|
| D | cache.json | 5 "Counter": "0,1,2,3",
10 "CounterHTOff": "0,1,2,3,4,5,6,7"
15 "Counter": "0,1,2,3",
20 "CounterHTOff": "0,1,2,3,4,5,6,7"
25 "Counter": "0,1,2,3",
30 "CounterHTOff": "0,1,2,3,4,5,6,7"
35 "Counter": "0,1,2,3",
40 "CounterHTOff": "0,1,2,3,4,5,6,7"
45 "Counter": "0,1,2,3",
50 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/ivytown/ |
| D | pipeline.json | 29 "Counter": "Fixed counter 2",
34 "CounterHTOff": "Fixed counter 2"
39 "Counter": "0,1,2,3",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
44 "CounterHTOff": "0,1,2,3,4,5,6,7"
49 "Counter": "0,1,2,3",
54 "CounterHTOff": "0,1,2,3,4,5,6,7"
59 "Counter": "0,1,2,3",
64 "CounterHTOff": "0,1,2,3,4,5,6,7"
68 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/jaketown/ |
| D | pipeline.json | 3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
13 "Counter": "Fixed counter 2",
18 "CounterHTOff": "Fixed counter 2"
22 "Counter": "Fixed counter 3",
27 "CounterHTOff": "Fixed counter 3"
31 "Counter": "0,1,2,3",
35 "BriefDescription": "Not taken macro-conditional branches.",
36 "CounterHTOff": "0,1,2,3,4,5,6,7"
40 "Counter": "0,1,2,3",
44 "BriefDescription": "Taken speculative and retired macro-conditional branches.",
[all …]
|
| D | cache.json | 5 "Counter": "0,1,2,3",
10 "CounterHTOff": "0,1,2,3"
15 "Counter": "0,1,2,3",
20 "CounterHTOff": "0,1,2,3"
25 "Counter": "0,1,2,3",
30 "CounterHTOff": "0,1,2,3"
34 …ription": "This event counts line-splitted load uops retired to the architected path. A line split…
36 "Counter": "0,1,2,3",
41 "CounterHTOff": "0,1,2,3"
45 …ription": "This event counts line-splitted store uops retired to the architected path. A line spli…
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/broadwellx/ |
| D | pipeline.json | 7 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
32 "Counter": "Fixed counter 2",
36 "CounterHTOff": "Fixed counter 2"
41 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
42 "Counter": "0,1,2,3",
44 …-on-Store blocking code preventing store forwarding. This includes cases when:\n - preceding store…
46 "CounterHTOff": "0,1,2,3,4,5,6,7"
52 "Counter": "0,1,2,3",
55 "CounterHTOff": "0,1,2,3,4,5,6,7"
61 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/tigerlake/ |
| D | cache.json | 4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
9 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
15 "CollectPEBSRecord": "2",
16 "Counter": "0,1,2,3",
19 "PEBScounters": "0,1,2,3",
26 "CollectPEBSRecord": "2",
27 "Counter": "0,1,2,3",
32 "PEBScounters": "0,1,2,3",
[all …]
|
| D | pipeline.json | 4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3,4,5,6,7",
9 "PEBScounters": "0,1,2,3,4,5,6,7",
10 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
16 "CollectPEBSRecord": "2",
17 "Counter": "0,1,2,3,4,5,6,7",
21 "PEBScounters": "0,1,2,3,4,5,6,7",
27 "CollectPEBSRecord": "2",
28 "Counter": "0,1,2,3,4,5,6,7",
32 "PEBScounters": "0,1,2,3,4,5,6,7",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/haswellx/ |
| D | pipeline.json | 8 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
33 "Counter": "Fixed counter 2",
37 "CounterHTOff": "Fixed counter 2"
43 "Counter": "0,1,2,3",
47 "CounterHTOff": "0,1,2,3,4,5,6,7"
53 "Counter": "0,1,2,3",
57 "CounterHTOff": "0,1,2,3,4,5,6,7"
63 "Counter": "0,1,2,3",
67 "CounterHTOff": "0,1,2,3,4,5,6,7"
73 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/haswell/ |
| D | pipeline.json | 3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
32 "Counter": "Fixed counter 2",
37 "CounterHTOff": "Fixed counter 2"
42 "Counter": "0,1,2,3",
47 "CounterHTOff": "0,1,2,3,4,5,6,7"
52 "Counter": "0,1,2,3",
57 "CounterHTOff": "0,1,2,3,4,5,6,7"
62 "Counter": "0,1,2,3",
67 "CounterHTOff": "0,1,2,3,4,5,6,7"
72 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/icelake/ |
| D | cache.json | 4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
15 …tired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core …
16 "CollectPEBSRecord": "2",
17 "Counter": "0,1,2,3",
22 "PEBScounters": "0,1,2,3",
23 …tired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core …
29 "CollectPEBSRecord": "2",
30 "Counter": "0,1,2,3",
[all …]
|
| D | pipeline.json | 4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3,4,5,6,7",
9 "PEBScounters": "0,1,2,3,4,5,6,7",
16 "CollectPEBSRecord": "2",
17 "Counter": "0,1,2,3,4,5,6,7",
20 "PEBScounters": "0,1,2,3,4,5,6,7",
28 "CollectPEBSRecord": "2",
29 "Counter": "0,1,2,3,4,5,6,7",
32 "PEBScounters": "0,1,2,3,4,5,6,7",
33 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | pipeline.json | 7 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
32 "Counter": "Fixed counter 2",
36 "CounterHTOff": "Fixed counter 2"
41 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
42 "Counter": "0,1,2,3",
44 …-on-Store blocking code preventing store forwarding. This includes cases when:\n - preceding store…
46 "CounterHTOff": "0,1,2,3,4,5,6,7"
52 "Counter": "0,1,2,3",
55 "CounterHTOff": "0,1,2,3,4,5,6,7"
61 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/broadwell/ |
| D | pipeline.json | 3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
31 "Counter": "Fixed counter 2",
36 "CounterHTOff": "Fixed counter 2"
39 …-on-Store blocking code preventing store forwarding. This includes cases when:\n - preceding store…
41 "Counter": "0,1,2,3",
45 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
46 "CounterHTOff": "0,1,2,3,4,5,6,7"
50 "Counter": "0,1,2,3",
55 "CounterHTOff": "0,1,2,3,4,5,6,7"
60 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | pipeline.json | 3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3",
29 "PEBS": "2",
36 "Counter": "0,1,2,3",
37 "CounterHTOff": "0,1,2,3,4,5,6,7",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | pipeline.json | 3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3",
29 "PEBS": "2",
36 "Counter": "0,1,2,3",
37 "CounterHTOff": "0,1,2,3,4,5,6,7",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/skylake/ |
| D | pipeline.json | 3 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
9 …n": "Counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in…
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
26 "Counter": "0,1,2,3",
27 "CounterHTOff": "0,1,2,3,4,5,6,7",
35 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
36 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/icelakex/ |
| D | cache.json | 4 "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
16 "CollectPEBSRecord": "2",
17 "Counter": "0,1,2,3",
20 "PEBScounters": "0,1,2,3",
21 "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",
28 "CollectPEBSRecord": "2",
29 "Counter": "0,1,2,3",
32 "PEBScounters": "0,1,2,3",
[all …]
|
