Home
last modified time | relevance | path

Searched +full:1 +full:c00000 (Results 1 – 25 of 90) sorted by relevance

1234

/Linux-v5.4/Documentation/devicetree/bindings/display/exynos/
Dsamsung-fimd.txt41 - display-timings: timing settings for FIMD, as described in document [1].
53 If not specified, the default value(1) will be used.
63 | cs-setup+1 | : : :
66 | wr-setup+1 | | wr-hold+1 |
69 | wr-active+1|
77 1 - for CAMIF1 input,
82 [1]: Documentation/devicetree/bindings/display/panel/display-timing.txt
89 fimd@11c00000 {
94 interrupts = <11 0>, <11 1>, <11 2>;
103 fimd@11c00000 {
/Linux-v5.4/arch/mips/boot/dts/ingenic/
Dci20.dts93 nandc: nand-controller@1 {
95 reg = <1 0 0x1000000>;
97 #address-cells = <1>;
115 nand@1 {
116 reg = <1>;
146 partition@c00000 {
151 partition@4c00000 {
166 reg = <6 0 1 /* addr */
167 6 2 1>; /* data */
232 groups = "mmc0-1bit-e", "mmc0-4bit-e";
[all …]
/Linux-v5.4/arch/arm/boot/dts/
Dsocfpga_arria10_socdk_nand.dts14 #address-cells = <1>;
15 #size-cells = <1>;
21 partition@1c00000 {
Dopenbmc-flash-layout.dtsi5 #address-cells = <1>;
6 #size-cells = <1>;
28 rwfs@1c00000 {
Dfacebook-bmc-flash-layout.dtsi6 #address-cells = <1>;
7 #size-cells = <1>;
28 data0@1c00000 {
Dda850-enbw-cmc.dts15 soc@1c00000 {
Dqcom-msm8660-surf.dts19 gsbi@19c00000 {
56 MATRIX_KEY(0, 1, KEY_UP)
59 MATRIX_KEY(1, 0, KEY_FN_F2)
60 MATRIX_KEY(1, 1, KEY_RIGHT)
61 MATRIX_KEY(1, 2, KEY_DOWN)
62 MATRIX_KEY(1, 3, KEY_VOLUMEDOWN)
65 MATRIX_KEY(4, 1, KEY_UP)
70 MATRIX_KEY(5, 1, KEY_RIGHT)
Dimx1-apf9328.dts53 #address-cells = <1>;
54 #size-cells = <1>;
57 eth: eth@4,c00000 {
Dsuniv-f1c100s.dtsi8 #address-cells = <1>;
9 #size-cells = <1>;
37 #address-cells = <1>;
38 #size-cells = <1>;
41 sram-controller@1c00000 {
45 #address-cells = <1>;
46 #size-cells = <1>;
52 #address-cells = <1>;
53 #size-cells = <1>;
65 ccu: clock@1c20000 {
[all …]
Dzx296702.dtsi7 #address-cells = <1>;
8 #size-cells = <1>;
11 #address-cells = <1>;
22 cpu@1 {
26 reg = <1>;
32 #address-cells = <1>;
33 #size-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <1>;
61 l2cc: l2-cache-controller@c00000 {
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/misc/
Dallwinner,syscon.txt17 syscon: syscon@1c00000 {
/Linux-v5.4/Documentation/devicetree/bindings/dma/
Dzxdma.txt7 - #dma-cells: see dma.txt, should be 1, para number
16 dma: dma-controller@09c00000{
21 #dma-cells = <1>;
/Linux-v5.4/Documentation/devicetree/bindings/mailbox/
Dti,secure-proxy.txt20 - #mbox-cells Shall be 1 and shall refer to the transfer path
31 secure_proxy: mailbox@32c00000 {
33 #mbox-cells = <1>;
/Linux-v5.4/Documentation/devicetree/bindings/soc/ti/
Dwkup_m3_ipc.txt35 l4_wkup: l4_wkup@44c00000 {
41 #address-cells = <1>;
42 #size-cells = <1>;
/Linux-v5.4/Documentation/devicetree/bindings/remoteproc/
Dwkup_m3_rproc.txt35 l4_wkup: l4_wkup@44c00000 {
38 #address-cells = <1>;
39 #size-cells = <1>;
/Linux-v5.4/arch/microblaze/boot/dts/
Dsystem.dts18 #address-cells = <1>;
19 #size-cells = <1>;
35 #address-cells = <1>;
119 #address-cells = <1>;
120 #size-cells = <1>;
129 xlnx,include-datawidth-matching-1 = <0x0>;
159 xlnx,synch-mem-1 = <0x0>;
163 xlnx,synch-pipedelay-1 = <0x2>;
167 xlnx,tavdv-ps-mem-1 = <0x3a98>;
171 xlnx,tcedv-ps-mem-1 = <0x3a98>;
[all …]
/Linux-v5.4/arch/arm64/boot/dts/nvidia/
Dtegra186-p3310.dtsi43 #address-cells = <1>;
56 memory-controller@2c00000 {
70 #address-cells = <1>;
79 channel@1 {
95 #address-cells = <1>;
104 channel@1 {
157 hsp@3c00000 {
193 cpu@1 {
259 drive-push-pull = <1>;
271 drive-push-pull = <1>;
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/display/
Darm,komeda.txt11 - #address-cells: Must be 1
41 dp0: display@c00000 {
42 #address-cells = <1>;
49 iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
65 dp0_pipe1: pipeline@1 {
68 reg = <1>;
/Linux-v5.4/arch/powerpc/boot/dts/
Dvirtex440-ml507.dts24 #address-cells = <1>;
25 #size-cells = <1>;
38 #address-cells = <1>;
39 #cpus = <1>;
54 xlnx,apu-control = <1>;
56 xlnx,apu-udi-1 = <0>;
71 xlnx,dcr-autolock-enable = <1>;
104 xlnx,generate-plb-timespecs = <1>;
109 xlnx,mplb-allow-lock-xfer = <1>;
120 xlnx,mplb-prio-splb0 = <1>;
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/iommu/
Dqcom,iommu.txt23 - #address-cells : must be 1.
25 - #size-cells : must be 1.
27 - #iommu-cells : Must be 1. Index identifies the context-bank #.
53 apps_iommu: iommu@1e20000 {
54 #address-cells = <1>;
55 #size-cells = <1>;
56 #iommu-cells = <1>;
80 gpu_iommu: iommu@1f08000 {
81 #address-cells = <1>;
82 #size-cells = <1>;
[all …]
/Linux-v5.4/arch/arm64/boot/dts/ti/
Dk3-am65-mcu.dtsi20 mcu_ram: sram@41c00000 {
24 #address-cells = <1>;
25 #size-cells = <1>;
32 #address-cells = <1>;
35 clocks = <&k3_clks 114 1>;
43 clocks = <&k3_clks 142 1>;
45 #address-cells = <1>;
53 clocks = <&k3_clks 143 1>;
55 #address-cells = <1>;
63 clocks = <&k3_clks 144 1>;
[all …]
Dk3-j721e-mcu-wakeup.dtsi41 #pinctrl-cells = <1>;
46 mcu_ram: sram@41c00000 {
50 #address-cells = <1>;
51 #size-cells = <1>;
82 ti,intr-trigger-type = <1>;
97 interrupts = <113 0>, <113 1>, <113 2>,
114 interrupts = <114 0>, <114 1>, <114 2>,
/Linux-v5.4/Documentation/devicetree/bindings/net/
Dxilinx_axienet.txt4 Also called AXI 1G/2.5G Ethernet Subsystem, the xilinx axi ethernet IP core
38 1 to enable partial TX checksum offload,
56 axi_ethernet_eth: ethernet@40c00000 {
60 interrupts = <2 0 1>;
69 #address-cells = <1>;
73 reg = <1>;
/Linux-v5.4/Documentation/devicetree/bindings/firmware/
Dnvidia,tegra186-bpmp.txt18 - #clock-cells : Should be 1.
19 - #power-domain-cells : Should be 1.
20 - #reset-cells : Should be 1.
68 hsp_top0: hsp@3c00000 {
99 #clock-cells = <1>;
100 #power-domain-cells = <1>;
101 #reset-cells = <1>;
/Linux-v5.4/Documentation/devicetree/bindings/clock/
Dexynos5260-clock.txt35 - "phyclk_dptx_phy_ch1_txd_clk" - dp phy clock for channel 1
52 1) "samsung,exynos5260-clock-top"
69 - #clock-cells: should be 1.
169 Example 1: An example of a clock controller node is listed below.
176 #clock-cells = <1>;
183 serial@12c00000 {

1234