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/Linux-v5.15/drivers/pinctrl/mvebu/
Dpinctrl-kirkwood.c19 #define V(f6180, f6190, f6192, f6281, f6282, dx4122, dx1135) \ macro
20 ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \
25 VARIANT_MV88F6180 = V(1, 0, 0, 0, 0, 0, 0),
26 VARIANT_MV88F6190 = V(0, 1, 0, 0, 0, 0, 0),
27 VARIANT_MV88F6192 = V(0, 0, 1, 0, 0, 0, 0),
28 VARIANT_MV88F6281 = V(0, 0, 0, 1, 0, 0, 0),
29 VARIANT_MV88F6282 = V(0, 0, 0, 0, 1, 0, 0),
30 VARIANT_MV98DX4122 = V(0, 0, 0, 0, 0, 1, 0),
31 VARIANT_MV98DX1135 = V(0, 0, 0, 0, 0, 0, 1),
36 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1, 1, 1)),
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_mode_vba_30.c744 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
746 // max = such that compression is 1:1 in dscceComputeDelay()
748 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
760 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
762 pixelsPerClock = 1; in dscceComputeDelay()
766 pixelsPerClock = 1; in dscceComputeDelay()
786 s = 1; in dscceComputeDelay()
794 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
795 L = (ax + wx - 1) / wx; in dscceComputeDelay()
797 lstall = 1; in dscceComputeDelay()
[all …]
/Linux-v5.15/arch/x86/lib/
Datomic64_386_32.S27 LOCK v;
32 UNLOCK v; \
39 #define v %ecx macro
41 movl (v), %eax
42 movl 4(v), %edx
44 #undef v
46 #define v %esi macro
48 movl %ebx, (v)
49 movl %ecx, 4(v)
51 #undef v
[all …]
/Linux-v5.15/tools/memory-model/
Dlinux-kernel.def10 WRITE_ONCE(X,V) { __store{once}(X,V); }
13 smp_store_release(X,V) { __store{release}(*X,V); }
15 rcu_assign_pointer(X,V) { __store{release}(X,V); }
17 smp_store_mb(X,V) { __store{once}(X,V); __fence{mb}; }
30 xchg(X,V) __xchg{mb}(X,V)
31 xchg_relaxed(X,V) __xchg{once}(X,V)
32 xchg_release(X,V) __xchg{release}(X,V)
33 xchg_acquire(X,V) __xchg{acquire}(X,V)
34 cmpxchg(X,V,W) __cmpxchg{mb}(X,V,W)
35 cmpxchg_relaxed(X,V,W) __cmpxchg{once}(X,V,W)
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calc_auto.c40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument
43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation()
44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation()
45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
56 …v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation()
[all …]
/Linux-v5.15/arch/powerpc/include/asm/
Datomic.h26 static __inline__ int arch_atomic_read(const atomic_t *v) in arch_atomic_read() argument
30 __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"UPD_CONSTR(v->counter)); in arch_atomic_read()
35 static __inline__ void arch_atomic_set(atomic_t *v, int i) in arch_atomic_set() argument
37 __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"UPD_CONSTR(v->counter) : "r"(i)); in arch_atomic_set()
41 static __inline__ void arch_atomic_##op(int a, atomic_t *v) \
46 "1: lwarx %0,0,%3 # atomic_" #op "\n" \
49 " bne- 1b\n" \
50 : "=&r" (t), "+m" (v->counter) \
51 : "r" (a), "r" (&v->counter) \
56 static inline int arch_atomic_##op##_return_relaxed(int a, atomic_t *v) \
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_mode_vba_31.c54 // Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET)
795 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
797 // max = such that compression is 1:1 in dscceComputeDelay()
799 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
811 pixelsPerClock = 1; in dscceComputeDelay()
814 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
816 pixelsPerClock = 1; in dscceComputeDelay()
836 s = 1; in dscceComputeDelay()
844 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
845 L = (ax + wx - 1) / wx; in dscceComputeDelay()
[all …]
/Linux-v5.15/drivers/md/
Ddm-verity-target.c46 struct dm_verity *v; member
56 * it can be changed to 1 and it is never reset to 0 again.
60 * and write 1 to hash_verified simultaneously.
80 static sector_t verity_map_sector(struct dm_verity *v, sector_t bi_sector) in verity_map_sector() argument
82 return v->data_start + dm_target_offset(v->ti, bi_sector); in verity_map_sector()
91 static sector_t verity_position_at_level(struct dm_verity *v, sector_t block, in verity_position_at_level() argument
94 return block >> (level * v->hash_per_block_bits); in verity_position_at_level()
97 static int verity_hash_update(struct dm_verity *v, struct ahash_request *req, in verity_hash_update() argument
112 sg_init_table(&sg, 1); in verity_hash_update()
128 static int verity_hash_init(struct dm_verity *v, struct ahash_request *req, in verity_hash_init() argument
[all …]
/Linux-v5.15/sound/soc/qcom/
Dlpass-lpaif-reg.h11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument
12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port))
14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument
17 #define LPAIF_I2SCTL_LOOPBACK_ENABLE 1
20 #define LPAIF_I2SCTL_SPKEN_ENABLE 1
23 #define LPAIF_I2SCTL_MODE_SD0 1
46 #define LPAIF_I2SCTL_SPKMONO_MONO 1
49 #define LPAIF_I2SCTL_MICEN_ENABLE 1
54 #define LPAIF_I2SCTL_MICMONO_MONO 1
57 #define LPAIF_I2SCTL_WSSRC_EXTERNAL 1
[all …]
/Linux-v5.15/include/linux/atomic/
Datomic-arch-fallback.h152 arch_atomic_read_acquire(const atomic_t *v) in arch_atomic_read_acquire() argument
154 return smp_load_acquire(&(v)->counter); in arch_atomic_read_acquire()
161 arch_atomic_set_release(atomic_t *v, int i) in arch_atomic_set_release() argument
163 smp_store_release(&(v)->counter, i); in arch_atomic_set_release()
176 arch_atomic_add_return_acquire(int i, atomic_t *v) in arch_atomic_add_return_acquire() argument
178 int ret = arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return_acquire()
187 arch_atomic_add_return_release(int i, atomic_t *v) in arch_atomic_add_return_release() argument
190 return arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return_release()
197 arch_atomic_add_return(int i, atomic_t *v) in arch_atomic_add_return() argument
201 ret = arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return()
[all …]
/Linux-v5.15/arch/sh/mm/
Dflush-sh4.c16 reg_size_t aligned_start, v, cnt, end; in sh4__flush_wback_region() local
19 v = aligned_start & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region()
20 end = (aligned_start + size + L1_CACHE_BYTES-1) in sh4__flush_wback_region()
21 & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region()
22 cnt = (end - v) / L1_CACHE_BYTES; in sh4__flush_wback_region()
25 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
26 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
27 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
28 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
29 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
[all …]
/Linux-v5.15/drivers/staging/media/hantro/
Drockchip_vpu2_hw_mpeg2_dec.c23 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
26 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
27 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
28 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
30 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
31 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
33 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
34 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
35 #define VDPU_REG_STARTMB_Y(v) (((v) << 0) & GENMASK(7, 0)) argument
[all …]
Dhantro_g1_mpeg2_dec.c25 #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
26 #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) argument
27 #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) argument
28 #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) argument
29 #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) argument
30 #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) argument
31 #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) argument
32 #define G1_REG_DEC_LATENCY(v) (((v) << 11) & GENMASK(16, 11)) argument
33 #define G1_REG_DEC_CLK_GATE_E(v) ((v) ? BIT(10) : 0) argument
34 #define G1_REG_DEC_IN_ENDIAN(v) ((v) ? BIT(9) : 0) argument
[all …]
Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
/Linux-v5.15/drivers/gpu/drm/exynos/
Dregs-scaler.h56 * 1 70 74 78 7c 150 154 158 15c
61 * 6 c0 c4 c8 cc 1a0 1a4 1a8 1ac
62 * 7 d0 d4 d8 dc 1b0 1b4 1b8 1bc
63 * 8 e0 e4 e8 ec 1c0 1c4 1c8 1cc
69 * 0 f0 f4 1d0 1d4
70 * 1 f8 fc 1d8 1dc
71 * 2 100 104 1e0 1e4
72 * 3 108 10c 1e8 1ec
73 * 4 110 114 1f0 1f4
74 * 5 118 11c 1f8 1fc
[all …]
/Linux-v5.15/tools/testing/selftests/kvm/aarch64/
Dvgic_init.c46 GUEST_SYNC(1); in guest_code()
63 struct vm_gic v; in vm_gic_create() local
65 v.vm = vm_create_default_with_vcpus(NR_VCPUS, 0, 0, guest_code, NULL); in vm_gic_create()
66 v.gic_fd = kvm_create_device(v.vm, KVM_DEV_TYPE_ARM_VGIC_V3, false); in vm_gic_create()
68 return v; in vm_gic_create()
71 static void vm_gic_destroy(struct vm_gic *v) in vm_gic_destroy() argument
73 close(v->gic_fd); in vm_gic_destroy()
74 kvm_vm_free(v->vm); in vm_gic_destroy()
83 static void subtest_dist_rdist(struct vm_gic *v) in subtest_dist_rdist() argument
89 kvm_device_check_attr(v->gic_fd, KVM_DEV_ARM_VGIC_GRP_ADDR, in subtest_dist_rdist()
[all …]
/Linux-v5.15/drivers/mtd/nand/raw/
Dnand_ids.c29 {"TC58NVG0S3E 1G 3.3V 8-bit",
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
41 {"TC58NVG5D2 32G 3.3V 8-bit",
44 {"TC58NVG6D2 64G 3.3V 8-bit",
47 {"SDTNRGAMA 64G 3.3V 8-bit",
50 {"H27UCG8T2ATR-BC 64G 3.3V 8-bit",
54 {"TH58NVG2S3HBAI4 4G 3.3V 8-bit",
[all …]
/Linux-v5.15/crypto/
Daegis128-neon-inner.c25 uint8x16_t v[5]; member
43 vst1q_u8(state, st.v[0]); in aegis128_save_state_neon()
44 vst1q_u8(state + 16, st.v[1]); in aegis128_save_state_neon()
45 vst1q_u8(state + 32, st.v[2]); in aegis128_save_state_neon()
46 vst1q_u8(state + 48, st.v[3]); in aegis128_save_state_neon()
47 vst1q_u8(state + 64, st.v[4]); in aegis128_save_state_neon()
56 if (!__builtin_expect(aegis128_have_aes_insn, 1)) { in aegis_aes_round()
65 uint8x16_t v; in aegis_aes_round() local
72 v = vqtbl4q_u8(vld1q_u8_x4(crypto_aes_sbox), w); in aegis_aes_round()
73 v = vqtbx4q_u8(v, vld1q_u8_x4(crypto_aes_sbox + 0x40), w - 0x40); in aegis_aes_round()
[all …]
/Linux-v5.15/drivers/media/dvb-frontends/
Dmb86a16.c39 #define MB86A16_NOTICE 1
59 #define TRACE_IN dprintk(verbose, MB86A16_DEBUG, 1, "-->()")
60 #define TRACE_OUT dprintk(verbose, MB86A16_DEBUG, 1, "()-->")
74 dprintk(verbose, MB86A16_DEBUG, 1, in mb86a16_write()
76 state->config->demod_address, buf[0], buf[1]); in mb86a16_write()
78 ret = i2c_transfer(state->i2c_adap, &msg, 1); in mb86a16_write()
80 return (ret != 1) ? -EREMOTEIO : 0; in mb86a16_write()
94 .len = 1 in mb86a16_read()
99 .len = 1 in mb86a16_read()
104 dprintk(verbose, MB86A16_ERROR, 1, "read error(reg=0x%02x, ret=%i)", in mb86a16_read()
[all …]
/Linux-v5.15/lib/crypto/
Dblake2s-generic.c21 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
22 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
23 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
24 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
25 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
26 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
27 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
28 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
29 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
30 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/Linux-v5.15/Documentation/hwmon/
Ddme1737.rst64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and
65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement
66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and
69 For the DME1737, A8000 and SCH5027, fan[1-2] and pwm[1-2] are always present.
74 For the SCH311x and SCH5127, fan[1-3] and pwm[1-3] are always present and
94 in0: +5VTR (+5V standby) 0V - 6.64V
95 in1: Vccp (processor core) 0V - 3V
96 in2: VCC (internal +3.3V) 0V - 4.38V
97 in3: +5V 0V - 6.64V
98 in4: +12V 0V - 16V
[all …]
/Linux-v5.15/arch/m68k/include/asm/
Datomic.h19 #define arch_atomic_read(v) READ_ONCE((v)->counter) argument
20 #define arch_atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) argument
33 static inline void arch_atomic_##op(int i, atomic_t *v) \
35 __asm__ __volatile__(#asm_op "l %1,%0" : "+m" (*v) : ASM_DI (i));\
41 static inline int arch_atomic_##op##_return(int i, atomic_t *v) \
46 "1: movel %2,%1\n" \
47 " " #asm_op "l %3,%1\n" \
48 " casl %2,%1,%0\n" \
49 " jne 1b" \
50 : "+m" (*v), "=&d" (t), "=&d" (tmp) \
[all …]
/Linux-v5.15/sound/soc/fsl/
Dfsl_easrc.h22 /* ASRC Context Control Extended 1 */
68 /* ASRC Channel Status 1 */
98 #define EASRC_CC_FIFO_WTMK_MASK ((BIT(EASRC_CC_FIFO_WTMK_WIDTH) - 1) \
100 #define EASRC_CC_FIFO_WTMK(v) (((v) << EASRC_CC_FIFO_WTMK_SHIFT) \ argument
104 #define EASRC_CC_SAMPLE_POS_MASK ((BIT(EASRC_CC_SAMPLE_POS_WIDTH) - 1) \
106 #define EASRC_CC_SAMPLE_POS(v) (((v) << EASRC_CC_SAMPLE_POS_SHIFT) \ argument
113 #define EASRC_CC_BPS_MASK ((BIT(EASRC_CC_BPS_WIDTH) - 1) \
115 #define EASRC_CC_BPS(v) (((v) << EASRC_CC_BPS_SHIFT) \ argument
125 #define EASRC_CC_CHEN_MASK ((BIT(EASRC_CC_CHEN_WIDTH) - 1) \
127 #define EASRC_CC_CHEN(v) (((v) << EASRC_CC_CHEN_SHIFT) \ argument
[all …]
/Linux-v5.15/arch/x86/include/asm/
Datomic64_64.h15 * @v: pointer of type atomic64_t
17 * Atomically reads the value of @v.
20 static inline s64 arch_atomic64_read(const atomic64_t *v) in arch_atomic64_read() argument
22 return __READ_ONCE((v)->counter); in arch_atomic64_read()
27 * @v: pointer to type atomic64_t
30 * Atomically sets the value of @v to @i.
32 static inline void arch_atomic64_set(atomic64_t *v, s64 i) in arch_atomic64_set() argument
34 __WRITE_ONCE(v->counter, i); in arch_atomic64_set()
40 * @v: pointer to type atomic64_t
42 * Atomically adds @i to @v.
[all …]
/Linux-v5.15/arch/arm/include/asm/
Datomic.h25 #define arch_atomic_read(v) READ_ONCE((v)->counter) argument
26 #define arch_atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
37 static inline void arch_atomic_##op(int i, atomic_t *v) \
42 prefetchw(&v->counter); \
44 "1: ldrex %0, [%3]\n" \
46 " strex %1, %0, [%3]\n" \
47 " teq %1, #0\n" \
48 " bne 1b" \
49 : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \
50 : "r" (&v->counter), "Ir" (i) \
[all …]

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