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/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dv3-v360epc-pci.txt11 second the configuration area register space, 16MB
18 each be exactly 256MB (0x10000000) in size.
22 be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB,
23 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked
44 0x60000000 0 0x01000000 /* 16 MiB @ LB 60000000 */
50 0x20000000 0 0x20000000 /* 512 MB @ LB 20000000 1:1 */
59 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
63 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
67 0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */
71 0x6000 0 0 1 &pic 16 /* INT A on slot 12 is irq 16 */
/Linux-v6.1/drivers/misc/habanalabs/include/gaudi2/
Dgaudi2.h16 #define CFG_BAR_SIZE 0x10000000ull /* 256MB */
18 #define MSIX_BAR_SIZE 0x4000ull /* 16KB */
21 #define CFG_SIZE 0x8000000ull /* 96MB CFG + 32MB DBG*/
22 #define CFG_REGION_SIZE 0xC000000ull /* 192MB */
24 #define STM_FLASH_BASE_ADDR 0x1000007FF4000000ull /* Not 256MB aligned */
25 #define STM_FLASH_ALIGNED_OFF 0x4000000ull /* 256 MB alignment */
26 #define STM_FLASH_SIZE 0x2000000ull /* 32MB */
29 #define SPI_FLASH_SIZE 0x1000000ull /* 16MB */
38 #define BAR0_RSRVD_SIZE 0x1000000ull /* 16MB */
41 #define SRAM_SIZE 0x3000000ull /* 48MB */
[all …]
/Linux-v6.1/arch/alpha/kernel/
Dcore_mcpcia.c27 * NOTE: Herein lie back-to-back mb instructions. They are magic.
72 * 23:16 bus number (8 bits = 128 possible buses)
104 mb(); in conf_read()
108 mb(); in conf_read()
113 mb(); in conf_read()
117 mb(); in conf_read()
118 mb(); /* magic */ in conf_read()
123 mb(); in conf_read()
126 mb(); in conf_read()
148 *(vuip)MCPCIA_CAP_ERR(mid) = stat0; mb(); in conf_write()
[all …]
Dsys_alcor.c42 mb(); in alcor_update_irq_hw()
48 alcor_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); in alcor_enable_irq()
54 alcor_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); in alcor_disable_irq()
63 *(vuip)GRU_INT_CLEAR = 1 << (d->irq - 16); mb(); in alcor_mask_and_ack_irq()
64 *(vuip)GRU_INT_CLEAR = 0; mb(); in alcor_mask_and_ack_irq()
73 *(vuip)GRU_INT_CLEAR = 0x80000000; mb(); in alcor_isa_mask_and_ack_irq()
74 *(vuip)GRU_INT_CLEAR = 0; mb(); in alcor_isa_mask_and_ack_irq()
103 handle_irq(16 + i); in alcor_device_interrupt()
116 *(vuip)GRU_INT_MASK = 0; mb(); /* all disabled */ in alcor_init_irq()
117 *(vuip)GRU_INT_EDGE = 0; mb(); /* all are level */ in alcor_init_irq()
[all …]
Dpci.c123 #define MB (1024*KB) macro
124 #define GB (1024*MB)
156 * octant (16MB) of every 128MB segment is in pcibios_align_resource()
157 * aliased to the very first 16 MB of the in pcibios_align_resource()
162 * Devices that need more than 112MB of in pcibios_align_resource()
170 if (hose->sparse_mem_base && size <= 7 * 16*MB) { in pcibios_align_resource()
171 if (((start / (16*MB)) & 0x7) == 0) { in pcibios_align_resource()
172 start &= ~(128*MB - 1); in pcibios_align_resource()
173 start += 16*MB; in pcibios_align_resource()
176 if (start/(128*MB) != (start + size - 1)/(128*MB)) { in pcibios_align_resource()
[all …]
Dio.c20 mb(); in ioread8()
22 mb(); in ioread8()
29 mb(); in ioread16()
31 mb(); in ioread16()
38 mb(); in ioread32()
40 mb(); in ioread32()
47 mb(); in ioread64()
49 mb(); in ioread64()
55 mb(); in iowrite8()
61 mb(); in iowrite16()
[all …]
/Linux-v6.1/Documentation/x86/x86_64/
Dmm.rst20 from TB to GB and then MB/KB.
22 - "16M TB" might look weird at first sight, but it's an easier way to visualize size
23 notation than "16 EB", which few will recognize at first sight as 16 exabytes.
35 …0000800000000000 | +128 TB | ffff7fffffffffff | ~16M TB | ... huge, almost 64 bits wide hole of…
51 ffffec0000000000 | -20 TB | fffffbffffffffff | 16 TB | KASAN shadow memory
65 …ffffffff80000000 | -2 GB | ffffffff9fffffff | 512 MB | kernel text mapping, mapped to physic…
66 ffffffff80000000 |-2048 MB | | |
67 ffffffffa0000000 |-1536 MB | fffffffffeffffff | 1520 MB | module mapping space
68 ffffffffff000000 | -16 MB | | |
69 …FIXADDR_START | ~-11 MB | ffffffffff5fffff | ~0.5 MB | kernel-internal fixmap range, variable s…
[all …]
/Linux-v6.1/arch/microblaze/kernel/
Dhead.S147 * kernel initialization. This maps the first 16 MBytes of memory 1:1
184 bgei r11, GT16 /* size is greater than 16MB */
186 bgei r11, GT8 /* size is greater than 8MB */
188 bgei r11, GT4 /* size is greater than 4MB */
189 /* size is less than 4MB */
191 bgei r11, GT2 /* size is greater than 2MB */
192 addik r9, r0, 0x0100000 /* TLB0 must be 1MB */
194 bgei r11, GT1 /* size is greater than 1MB */
198 ori r9, r0, 0x400000 /* TLB0 is 4MB */
200 GT16: /* TLB0 is 16MB */
[all …]
/Linux-v6.1/arch/arm/mach-s3c/
Dbast.h127 * whether the access is for 8 or 16bit IO... this ensures that
133 * 0x04000000 to 0x08000000 16bit, slow
134 * 0x08000000 to 0x0C000000 16bit, net
135 * 0x0C000000 to 0x10000000 16bit, fast
139 * 0x00000000 to 0x01000000 16MB ISA IO space
140 * 0x01000000 to 0x02000000 16MB ISA memory space
141 * 0x02000000 to 0x02100000 1MB IDE primary channel
142 * 0x02100000 to 0x02200000 1MB IDE primary channel aux
143 * 0x02200000 to 0x02400000 1MB IDE secondary channel
144 * 0x02300000 to 0x02400000 1MB IDE secondary channel aux
[all …]
Dvr1000.h57 * whether the access is for 8 or 16bit IO... this ensures that
63 * 0x04000000 to 0x08000000 16bit, slow
64 * 0x08000000 to 0x0C000000 16bit, net
65 * 0x0C000000 to 0x10000000 16bit, fast
69 * 0x02000000 to 0x02100000 1MB IDE primary channel
70 * 0x02100000 to 0x02200000 1MB IDE primary channel aux
71 * 0x02200000 to 0x02400000 1MB IDE secondary channel
72 * 0x02300000 to 0x02400000 1MB IDE secondary channel aux
73 * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controllers
74 * 0x02600000 to 0x02700000 1MB
[all …]
/Linux-v6.1/drivers/net/ethernet/apple/
Dmace.c73 * and another 16 bytes to allow us to align the dma command
74 * buffers on a 16 byte boundary.
307 out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16); in dbdma_reset()
321 volatile struct mace __iomem *mb = mp->mace; in mace_reset() local
327 out_8(&mb->biucc, SWRST); in mace_reset()
328 if (in_8(&mb->biucc) & SWRST) { in mace_reset()
339 out_8(&mb->imr, 0xff); /* disable all intrs for now */ in mace_reset()
340 i = in_8(&mb->ir); in mace_reset()
341 out_8(&mb->maccc, 0); /* turn off tx, rx */ in mace_reset()
343 out_8(&mb->biucc, XMTSP_64); in mace_reset()
[all …]
/Linux-v6.1/arch/arm/mach-footbridge/include/mach/
Dhardware.h13 * 0xff800000 0x40000000 1MB X-Bus
14 * 0xff000000 0x7c000000 1MB PCI I/O space
15 * 0xfe000000 0x42000000 1MB CSR
16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
17 * 0xfc000000 0x79000000 1MB PCI IACK/special space
18 * 0xfb000000 0x7a000000 16MB PCI Config type 1
19 * 0xfa000000 0x7b000000 16MB PCI Config type 0
20 * 0xf9000000 0x50000000 1MB Cache flush
21 * 0xf0000000 0x80000000 16MB ISA memory
/Linux-v6.1/arch/arc/plat-axs10x/
Daxs10x.c45 * | snps,dw-apb-intc (MB)| in axs10x_enable_gpio_intc_wire()
56 * DT hardware topology - connect MB intc directly to cpu intc in axs10x_enable_gpio_intc_wire()
95 char mb[32]; in axs10x_early_init() local
105 scnprintf(mb, 32, "MainBoard v%d", mb_rev); in axs10x_early_init()
106 axs10x_print_board_ver(CREG_MB_VER, mb); in axs10x_early_init()
122 * Each AXI master has a 4GB memory map specified as 16 apertures of 256MB, each
123 * of which maps to a corresponding 256MB aperture in Target slave memory map.
128 * Access from cpu to MB controllers such as GMAC is setup using AXI Tunnel:
132 * MB AXI Tunnel Master, which also has a mem map setup
134 * In the reverse direction, MB AXI Masters (e.g. GMAC) mem map is setup
[all …]
/Linux-v6.1/Documentation/fb/
Dmatroxfb.rst51 16 0x111 0x182 0x114 0x18A
66 16 0x117 0x192 0x11A 0x19A 0x11E
94 architectures there are some glitches for 24bpp videomodes. 8, 16 and 32bpp
128 memory usable for on-screen display (i.e. max. 8 MB).
165 - 0 -> 2x128Kx32 chips, 2MB onboard, probably sgram
166 - 1 -> 2x128Kx32 chips, 4MB onboard, probably sgram
167 - 2 -> 2x256Kx32 chips, 4MB onboard, probably sgram
168 - 3 -> 2x256Kx32 chips, 8MB onboard, probably sgram
169 - 4 -> 2x512Kx16 chips, 8/16MB onboard, probably sdram only
171 - 6 -> 4x128Kx32 chips, 4MB onboard, probably sgram
[all …]
Dintel810.rst37 - Supports color depths of 8, 16, 24 and 32 bits per pixel
41 - Full and optimized hardware acceleration at 8, 16 and 24 bpp
88 select amount of system RAM in MB to allocate for the video memory
90 Recommendation: 1 - 4 MB.
123 select at what offset in MB of the logical memory to allocate the
126 offset (16 MB for a 64 MB aperture, 8 MB for a 32 MB aperture) will
127 avoid XFree86's usage and allows up to 7 MB/15 MB of framebuffer
129 (0 for maximum usage, 31/63 MB for the least amount). Note, an
133 (default = 8 or 16 MB)
195 will use 2 MB of System RAM. MTRR support will be enabled. The refresh rate
[all …]
/Linux-v6.1/sound/isa/gus/
Dgus_io.c17 mb(); in snd_gf1_delay()
36 mb(); in __snd_gf1_ctrl_stop()
38 mb(); in __snd_gf1_ctrl_stop()
40 mb(); in __snd_gf1_ctrl_stop()
42 mb(); in __snd_gf1_ctrl_stop()
50 mb(); in __snd_gf1_write8()
52 mb(); in __snd_gf1_write8()
59 mb(); in __snd_gf1_look8()
67 mb(); in __snd_gf1_write16()
69 mb(); in __snd_gf1_write16()
[all …]
/Linux-v6.1/drivers/eisa/
Deisa.ids86 ALR3023 "ALR 16-bit VGA without Parallel port"
108 ARC0020 "Alta TokenCombo-16 S/U"
156 COG5000 "Cogent eMASTER+ AT Combo 16-Bit Workstation Ethernet Adapter"
246 CPQ5251 "Compaq 5/133 System Processor Board-2MB"
247 CPQ5253 "Compaq 5/166 System Processor Board-2MB"
248 CPQ5255 "Compaq 5/133 System Processor Board-1MB"
249 CPQ525D "Compaq 5/100 System Processor Board-1MB"
281 CPQ9018 "Compaq 486/33 Processor Board (8 MB)"
283 CPQ9035 "Compaq 486SX/16 Processor Board"
284 CPQ9036 "Compaq 486SX/25 Processor Board (8 MB)"
[all …]
/Linux-v6.1/drivers/scsi/qla2xxx/
Dqla_isr.c135 fctl = ~(abts->f_ctl[2] | 0x7F) << 16 | in qla24xx_process_abts()
139 abts_rsp->f_ctl[2] = fctl >> 16 & 0xff; in qla24xx_process_abts()
333 uint16_t mb[8]; in qla2100_intr_handler() local
377 mb[0] = RD_MAILBOX_REG(ha, reg, 0); in qla2100_intr_handler()
378 if (mb[0] > 0x3fff && mb[0] < 0x8000) { in qla2100_intr_handler()
379 qla2x00_mbx_completion(vha, mb[0]); in qla2100_intr_handler()
381 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) { in qla2100_intr_handler()
382 mb[1] = RD_MAILBOX_REG(ha, reg, 1); in qla2100_intr_handler()
383 mb[2] = RD_MAILBOX_REG(ha, reg, 2); in qla2100_intr_handler()
384 mb[3] = RD_MAILBOX_REG(ha, reg, 3); in qla2100_intr_handler()
[all …]
Dqla_mbx.c95 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
161 mcp->mb[0] = MBS_LINK_DOWN_ERROR; in qla2x00_mailbox_command()
171 !is_rom_cmd(mcp->mb[0])) || ha->flags.eeh_busy) { in qla2x00_mailbox_command()
174 mcp->mb[0]); in qla2x00_mailbox_command()
188 mcp->mb[0]); in qla2x00_mailbox_command()
198 ha->flags.purge_mbox, ha->flags.eeh_busy, mcp->mb[0]); in qla2x00_mailbox_command()
208 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); in qla2x00_mailbox_command()
228 iptr = mcp->mb; in qla2x00_mailbox_command()
229 command = mcp->mb[0]; in qla2x00_mailbox_command()
387 mcp->mb[0] = MBS_LINK_DOWN_ERROR; in qla2x00_mailbox_command()
[all …]
/Linux-v6.1/arch/x86/kernel/cpu/
Dcacheinfo.c44 #define MB(x) ((x) * 1024) macro
52 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
55 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */
56 { 0x0d, LVL_1_DATA, 16 }, /* 4-way set assoc, 64 byte line size */
60 { 0x23, LVL_3, MB(1) }, /* 8-way set assoc, sectored cache, 64 byte line size */
61 { 0x25, LVL_3, MB(2) }, /* 8-way set assoc, sectored cache, 64 byte line size */
62 { 0x29, LVL_3, MB(4) }, /* 8-way set assoc, sectored cache, 64 byte line size */
75 { 0x44, LVL_2, MB(1) }, /* 4-way set assoc, 32 byte line size */
76 { 0x45, LVL_2, MB(2) }, /* 4-way set assoc, 32 byte line size */
77 { 0x46, LVL_3, MB(4) }, /* 4-way set assoc, 64 byte line size */
[all …]
/Linux-v6.1/arch/mips/include/asm/dec/
Dkn05.h7 * KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC
23 * The oncard MB (Memory Buffer) ASIC provides an additional address
24 * decoder. Certain address ranges within the "high" 16 slots are
34 #define KN4K_MB_INT (4*IOASIC_SLOT_SIZE) /* MB interrupt register */
35 #define KN4K_MB_EA (5*IOASIC_SLOT_SIZE) /* MB error address? */
36 #define KN4K_MB_EC (6*IOASIC_SLOT_SIZE) /* MB error ??? */
37 #define KN4K_MB_CSR (7*IOASIC_SLOT_SIZE) /* MB control & status */
48 * MB ASIC interrupt bits.
57 * Bits for the MB interrupt register.
64 * Bits for the MB control & status register.
[all …]
/Linux-v6.1/arch/arm64/boot/dts/broadcom/northstar2/
Dns2-xmc.dts83 nand-bus-width = <16>;
84 brcm,nand-oob-sector-size = <16>;
90 reg = <0x00000000 0x00280000>; /* 2.5MB */
96 reg = <0x00280000 0x00040000>; /* 0.25MB */
102 reg = <0x002c0000 0x00040000>; /* 0.25MB */
108 reg = <0x00300000 0x03d00000>; /* 61MB */
114 reg = <0x04000000 0x06400000>; /* 100MB */
119 reg = <0x0a400000 0x35c00000>; /* 860MB */
179 reg = <0x00200000 0x00e00000>; /* 14MB */
184 reg = <0x01000000 0x01000000>; /* 16MB */
/Linux-v6.1/drivers/scsi/csiostor/
Dcsio_mb.c49 /* MB Command/Response Helpers */
60 hdr = (struct fw_cmd_hdr *)(mbp->mb); in csio_mb_fw_retval()
80 struct fw_hello_cmd *cmdp = (struct fw_hello_cmd *)(mbp->mb); in csio_mb_hello()
86 cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); in csio_mb_hello()
112 struct fw_hello_cmd *rsp = (struct fw_hello_cmd *)(mbp->mb); in csio_mb_process_hello_rsp()
143 struct fw_bye_cmd *cmdp = (struct fw_bye_cmd *)(mbp->mb); in csio_mb_bye()
149 cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); in csio_mb_bye()
166 struct fw_reset_cmd *cmdp = (struct fw_reset_cmd *)(mbp->mb); in csio_mb_reset()
172 cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); in csio_mb_reset()
200 struct fw_params_cmd *cmdp = (struct fw_params_cmd *)(mbp->mb); in csio_mb_params()
[all …]
/Linux-v6.1/Documentation/arm64/
Dmemory.rst36 ffff800000000000 ffff800007ffffff 128MB modules
38 fffffbfff0000000 fffffbfffdffffff 224MB fixed mappings (top down)
39 fffffbfffe000000 fffffbfffe7fffff 8MB [guard region]
40 fffffbfffe800000 fffffbffff7fffff 16MB PCI I/O space
41 fffffbffff800000 fffffbffffffffff 8MB [guard region]
53 ffff800000000000 ffff800007ffffff 128MB modules
55 fffffbfff0000000 fffffbfffdffffff 224MB fixed mappings (top down)
56 fffffbfffe000000 fffffbfffe7fffff 8MB [guard region]
57 fffffbfffe800000 fffffbffff7fffff 16MB PCI I/O space
58 fffffbffff800000 fffffbffffffffff 8MB [guard region]
[all …]
/Linux-v6.1/arch/mips/include/asm/sgi/
Dgio.h20 * There is 10MB of GIO address space for GIO64 slot devices
23 * 0 GFX 0x1f000000 - 0x1f3fffff 4MB
24 * 1 EXP0 0x1f400000 - 0x1f5fffff 2MB
25 * 2 EXP1 0x1f600000 - 0x1f9fffff 4MB
29 * - MISC 0x1fb00000 - 0x1fbfffff 1MB
32 * - RESERVED 0x18000000 - 0x1effffff 112MB
46 * bit 16 0=GIO32 and GIO32-bis, 1=GIO64.
60 * 0x07 16 bit SCSI Card [*]

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