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/Linux-v6.1/drivers/scsi/mvsas/
Dmv_94xx.h133 PHY_MAX_SPP_PHYS_LINK_RATE_MASK = (0x7 << 12),
153 MVS_IRQ_PCIF_DRBL0 = (1 << 12),
180 * bit 2: 6Gbps support
181 * bit 1: 3Gbps support
182 * bit 0: 1.5Gbps support
188 * bit 5: G1 (1.5Gbps) Without SSC
189 * bit 4: G1 (1.5Gbps) with SSC
190 * bit 3: G2 (3.0Gbps) Without SSC
191 * bit 2: G2 (3.0Gbps) with SSC
192 * bit 1: G3 (6.0Gbps) without SSC
[all …]
Dmv_94xx.c177 /* support 1.5 Gbps */ in set_phy_rate()
185 /* support 1.5, 3.0 Gbps */ in set_phy_rate()
192 /* support 1.5, 3.0, 6.0 Gbps */ in set_phy_rate()
233 /*set default phy_rate = 6Gbps*/ in mvs_94xx_config_reg_from_hba()
348 (12 - 1) << MVS_SGPIO_CFG0_AUT_BITLEN_SHIFT in mvs_94xx_sgpio_init()
901 lrmax = (rates->maximum_linkrate - SAS_LINK_RATE_1_5_GBPS) << 12; in mvs_94xx_phy_set_link_rate()
904 tmp &= ~(0x3 << 12); in mvs_94xx_phy_set_link_rate()
/Linux-v6.1/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
Dsmu11_driver_if_arcturus.h69 #define FEATURE_GFX_ULV_BIT 12
199 #define THROTTLER_PPT3_BIT 12
429 XGMI_LINK_RATE_2 = 2, // 2Gbps
430 XGMI_LINK_RATE_4 = 4, // 4Gbps
431 XGMI_LINK_RATE_8 = 8, // 8Gbps
432 XGMI_LINK_RATE_12 = 12, // 12Gbps
433 XGMI_LINK_RATE_16 = 16, // 16Gbps
434 XGMI_LINK_RATE_17 = 17, // 17Gbps
435 XGMI_LINK_RATE_18 = 18, // 18Gbps
436 XGMI_LINK_RATE_19 = 19, // 19Gbps
[all …]
Dsmu11_driver_if_sienna_cichlid.h90 #define FEATURE_DS_GFXCLK_BIT 12
207 #define THROTTLER_TDC_SOC_BIT 12
231 #define FW_DSTATE_HSR_NON_STROBE_BIT 12
524 XGMI_LINK_RATE_2 = 2, // 2Gbps
525 XGMI_LINK_RATE_4 = 4, // 4Gbps
526 XGMI_LINK_RATE_8 = 8, // 8Gbps
527 XGMI_LINK_RATE_12 = 12, // 12Gbps
528 XGMI_LINK_RATE_16 = 16, // 16Gbps
529 XGMI_LINK_RATE_17 = 17, // 17Gbps
530 XGMI_LINK_RATE_18 = 18, // 18Gbps
[all …]
Dsmu13_driver_if_aldebaran.h48 #define FEATURE_GFX_SS_BIT 12
121 #define THROTTLER_TEMP_VR_SOC_BIT 12
355 uint8_t XgmiLinkSpeed[NUM_XGMI_DPM_LEVELS]; //Gbps [EX: 32 = 32Gbps]
/Linux-v6.1/drivers/net/ethernet/ezchip/
Dnps_enet.h59 /* Gbps Eth MAC Configuration 0 register masks and shifts */
81 #define CFG_0_RX_IFG_SHIFT 12
93 /* Gbps Eth MAC Configuration 1 register masks and shifts */
103 /* Gbps Eth MAC Configuration 2 register masks and shifts */
119 /* Gbps Eth MAC Configuration 3 register masks and shifts */
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/
Ddc_dp_types.h49 LINK_RATE_LOW = 0x06, // Rate_1 (RBR) - 1.62 Gbps/Lane
50 LINK_RATE_RATE_2 = 0x08, // Rate_2 - 2.16 Gbps/Lane
51 LINK_RATE_RATE_3 = 0x09, // Rate_3 - 2.43 Gbps/Lane
52 LINK_RATE_HIGH = 0x0A, // Rate_4 (HBR) - 2.70 Gbps/Lane
53 LINK_RATE_RBR2 = 0x0C, // Rate_5 (RBR2)- 3.24 Gbps/Lane
54 LINK_RATE_RATE_6 = 0x10, // Rate_6 - 4.32 Gbps/Lane
55 LINK_RATE_HIGH2 = 0x14, // Rate_7 (HBR2)- 5.40 Gbps/Lane
56 LINK_RATE_HIGH3 = 0x1E, // Rate_8 (HBR3)- 8.10 Gbps/Lane
60 LINK_RATE_UHBR10 = 1000, // UHBR10 - 10.0 Gbps/Lane
61 LINK_RATE_UHBR13_5 = 1350, // UHBR13.5 - 13.5 Gbps/Lane
[all …]
/Linux-v6.1/drivers/gpu/drm/meson/
Dmeson_dw_hdmi.c301 /* 5.94Gbps, 3.7125Gbps */ in meson_hdmi_phy_setup_mode()
305 /* 2.97Gbps */ in meson_hdmi_phy_setup_mode()
309 /* 1.485Gbps */ in meson_hdmi_phy_setup_mode()
320 /* 5.94Gbps, 3.7125Gbps */ in meson_hdmi_phy_setup_mode()
324 /* 2.97Gbps */ in meson_hdmi_phy_setup_mode()
328 /* 1.485Gbps, and below */ in meson_hdmi_phy_setup_mode()
335 /* 5.94Gbps, 3.7125Gbps */ in meson_hdmi_phy_setup_mode()
340 /* 2.97Gbps */ in meson_hdmi_phy_setup_mode()
345 /* 1.485Gbps, and below */ in meson_hdmi_phy_setup_mode()
405 dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12)); in dw_hdmi_phy_init()
[all …]
/Linux-v6.1/include/rdma/
Dopa_port_info.h24 #define OPA_PORT_LTP_CRC_MODE_PER_LANE 8 /* 12/16-bit per lane LTP CRC mode */
39 #define OPA_LINKDOWN_REASON_PREEMPT_ERROR 12
96 #define OPA_LINK_SPEED_NOP 0x0000 /* Reserved (1-5 Gbps) */
97 #define OPA_LINK_SPEED_12_5G 0x0001 /* 12.5 Gbps */
98 #define OPA_LINK_SPEED_25G 0x0002 /* 25.78125? Gbps (EDR) */
179 OPA_PI_MASK_INTERLEAVE_DIST_SUP = (0x0003 << 12),
332 __be32 buffer_units; /* 9 res, 12, 5, 3, 3 */
/Linux-v6.1/drivers/net/phy/
Drealtek.c39 #define RTL8211F_ALDPS_XTAL_OFF BIT(12)
42 #define RTL8211E_TX_DELAY BIT(12)
57 #define RTL8366RB_POWER_SAVE_ON BIT(12)
167 val = BIT(13) | BIT(12) | BIT(11); in rtl8201_config_intr()
464 * 12 = RX Delay, 11 = TX Delay in rtl8211e_config_init()
957 .name = "RTL8226 2.5Gbps PHY",
970 .name = "RTL8226B_RTL8221B 2.5Gbps PHY",
982 .name = "RTL8226-CG 2.5Gbps PHY",
992 .name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
1002 .name = "RTL8221B-VB-CG 2.5Gbps PHY",
[all …]
/Linux-v6.1/tools/testing/selftests/drivers/net/mlxsw/
Dqos_mc_aware.sh39 # | >1Gbps | | >1Gbps |
48 # | | 1Gbps bottleneck |
160 devlink_port_pool_th_set $swp3 4 12
265 # degradation on 1Gbps link.
/Linux-v6.1/Documentation/networking/device_drivers/ethernet/pensando/
Dionic.rst36 ionic 0000:b5:00.0 enp181s0: Link up - 100 Gbps
39 ionic 0000:b6:00.0 enp182s0: Link up - 100 Gbps
130 tx_packets: 12
136 tx_csum_none: 12
/Linux-v6.1/tools/testing/selftests/net/forwarding/
Dsch_ets_core.sh22 # | + $h1.10 + $h1.11 + $h1.12 |
33 # | | >1Gbps |
37 # | | + $swp1.10 | | + $swp1.11 | | + $swp1.12 | |
43 # | | + $swp2.10 | | + $swp2.11 | | + $swp2.12 | |
48 # | | 1Gbps (ethtool or HTB qdisc) |
57 # | + $h2.10 + $h2.11 + $h2.12 |
287 ping_test $h1.12 $(dip 2) " vlan 12"
/Linux-v6.1/drivers/net/ethernet/ibm/ehea/
Dehea_phyp.h132 u32 max_num_addr_handles; /* 12 */
190 #define H_SPEED_1G_F 6 /* 1 Gbps, Full Duplex */
191 #define H_SPEED_10G_F 8 /* 10 Gbps, Full Duplex */
271 u64 wsth; /* 12 */
301 u64 rxjab; /* 12 */
/Linux-v6.1/drivers/phy/marvell/
Dphy-mvebu-a3700-comphy.c49 #define PU_TX_BIT BIT(12)
67 #define USE_MAX_PLL_RATE_BIT BIT(12)
106 #define IDLE_SYNC_EN BIT(12)
166 #define CFG_PM_OSCCLK_WAIT_MASK GENMASK(15, 12)
193 #define PIN_RESET_COMPHY_BIT BIT(12)
607 * All PHY register values are defined in full for 3.125Gbps in comphy_gbe_phy_init()
608 * SERDES speed. The values required for 1.25 Gbps are almost in comphy_gbe_phy_init()
610 * comparison to 3.125 Gbps values. These register values are in comphy_gbe_phy_init()
713 * (not SERDES). For instance, it selects SATA speed 1.5/3/6 Gbps or in mvebu_a3700_comphy_ethernet_power_on()
714 * PCIe speed 2.5/5 Gbps in mvebu_a3700_comphy_ethernet_power_on()
[all …]
Dphy-berlin-sata.c38 #define USE_MAX_PLL_RATE BIT(12)
108 /* set PHY up to 6 Gbps */ in phy_berlin_sata_power_on()
/Linux-v6.1/drivers/usb/host/
Dxhci-hub.c25 0x00050034, /* USB 3.0 SS Gen1x1 id:4 symmetric rx 5Gbps */
26 0x000500b4, /* USB 3.0 SS Gen1x1 id:4 symmetric tx 5Gbps */
27 0x000a4035, /* USB 3.1 SSP Gen2x1 id:5 symmetric rx 10Gbps */
28 0x000a40b5, /* USB 3.1 SSP Gen2x1 id:5 symmetric tx 10Gbps */
29 0x00054036, /* USB 3.2 SSP Gen1x2 id:6 symmetric rx 5Gbps */
30 0x000540b6, /* USB 3.2 SSP Gen1x2 id:6 symmetric tx 5Gbps */
31 0x000a4037, /* USB 3.2 SSP Gen2x2 id:7 symmetric rx 10Gbps */
32 0x000a40b7, /* USB 3.2 SSP Gen2x2 id:7 symmetric tx 10Gbps */
169 /* Shift to Gbps and set SSP Link Protocol if 10Gpbs */ in xhci_create_usb3x_bos_desc()
186 * is 20Gbps, but the BOS descriptor lane speed mantissa is in xhci_create_usb3x_bos_desc()
[all …]
/Linux-v6.1/arch/x86/include/uapi/asm/
Damd_hsmp.h33 HSMP_SET_NBIO_DPM_LEVEL, /* 12h Set max/min LCLK DPM Level for a given NBIO */
200 * output: args[0] = max bw in Gbps[31:20] + utilised bw in Gbps[19:8] +
/Linux-v6.1/arch/mips/cavium-octeon/executive/
Dcvmx-helper-board.c221 /* The simulator gives you a simulated 1Gbps full duplex link */ in __cvmx_helper_board_link_get()
253 case 2: /* 1 Gbps */ in __cvmx_helper_board_link_get()
344 /* Most boards except NIC10e use a 12MHz crystal */ in __cvmx_helper_board_usb_get_clock_type()
Dcvmx-helper-rgmii.c138 cvmx_write_csr(CVMX_ASXX_TX_HI_WATERX(port, interface), 12); in __cvmx_helper_errata_asx_pass1()
272 /* Force 1Gbps full duplex on internal loopback */ in __cvmx_helper_rgmii_link_get()
372 /* Set the link speed. Anything unknown is set to 1Gbps */ in __cvmx_helper_rgmii_link_set()
/Linux-v6.1/Documentation/networking/
Dphy.rst72 The Reduced Gigabit Medium Independent Interface (RGMII) is a 12-pin
249 data rate of 1Gbps. Embedded in the data stream is a 16-bit control
251 remote end. This does not include "up-clocked" variants such as 2.5Gbps
262 encoding. The underlying data rate is 1Gbps, with the slower speeds of
266 receipt. This does not include "up-clocked" variants such as 2.5Gbps
/Linux-v6.1/drivers/net/ethernet/intel/igc/
Digc_mac.c688 /* For I225, STATUS will indicate 1G speed in both 1 Gbps in igc_get_speed_and_duplex_copper()
689 * and 2.5 Gbps link modes. An additional bit is used in igc_get_speed_and_duplex_copper()
690 * to differentiate between 1 Gbps and 2.5 Gbps. in igc_get_speed_and_duplex_copper()
819 * 01 AA 00 12 34 56 in igc_hash_mc_addr()
Digc_defines.h65 #define IGC_WUFC_EXT_FLX12 BIT(12) /* Flexible Filter 12 Enable */
126 #define IGC_ERR_BLK_PHY_RESET 12
219 #define IGC_COLD_SHIFT 12
238 /* 1Gbps and 2.5Gbps half duplex is not supported, nor spec-compliant. */
388 #define IGC_RCTL_MO_SHIFT 12 /* multicast offset shift */
500 #define IGC_TS_SDP2_SEL_TT0 (0u << 12) /* Target time 0 is output on SDP2. */
501 #define IGC_TS_SDP2_SEL_TT1 (1u << 12) /* Target time 1 is output on SDP2. */
502 #define IGC_TS_SDP2_SEL_FC0 (2u << 12) /* Freq clock 0 is output on SDP2. */
503 #define IGC_TS_SDP2_SEL_FC1 (3u << 12) /* Freq clock 1 is output on SDP2. */
/Linux-v6.1/drivers/gpu/drm/amd/display/dmub/inc/
Ddmub_cmd.h490 uint32_t command_code : 12; /**< GPINT command */
538 DMUB_GPINT__NOTIFY_DETECTION_DONE = 12,
1681 * Rate_1 (RBR) - 1.62 Gbps/Lane
1685 * Rate_2 - 2.16 Gbps/Lane
1689 * Rate_3 - 2.43 Gbps/Lane
1693 * Rate_4 (HBR) - 2.70 Gbps/Lane
1697 * Rate_5 (RBR2)- 3.24 Gbps/Lane
1701 * Rate_6 - 4.32 Gbps/Lane
1705 * Rate_7 (HBR2)- 5.40 Gbps/Lane
1709 * Rate_8 (HBR3)- 8.10 Gbps/Lane
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/net/dsa/
Dmediatek,mt7530.yaml35 directly to the CPU to achieve 2 Gbps routing in total.
54 Gbps routing in total.
114 port 4 LED 0..2 as GPIO 12..14

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