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/Linux-v5.15/arch/mips/include/asm/
Dunaligned-emul.h10 __asm__ __volatile__ (".set\tnoat\n" \
11 "1:\t"type##_lb("%0", "0(%2)")"\n" \
12 "2:\t"type##_lbu("$1", "1(%2)")"\n\t"\
13 "sll\t%0, 0x8\n\t" \
14 "or\t%0, $1\n\t" \
15 "li\t%1, 0\n" \
16 "3:\t.set\tat\n\t" \
17 ".insn\n\t" \
18 ".section\t.fixup,\"ax\"\n\t" \
19 "4:\tli\t%1, %3\n\t" \
[all …]
Dasmmacro.h235 .word 0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
239 .word 0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
333 .macro copy_s_w ws, n
338 copy_s.w $1, $w\ws[\n]
342 .macro copy_s_d ws, n
347 copy_s.d $1, $w\ws[\n]
351 .macro insert_w wd, n
356 insert.w $w\wd[\n], $1
360 .macro insert_d wd, n
365 insert.d $w\wd[\n], $1
[all …]
/Linux-v5.15/kernel/locking/
Dlockdep_proc.c65 seq_printf(m, "all lock classes:\n"); in l_show()
83 seq_puts(m, "\n"); in l_show()
90 seq_puts(m, "\n"); in l_show()
93 seq_puts(m, "\n"); in l_show()
144 seq_printf(m, "all lock chains:\n"); in lc_show()
148 seq_printf(m, "irq_context: %s\n", irq_strs[chain->irq_context]); in lc_show()
157 seq_puts(m, "\n"); in lc_show()
159 seq_puts(m, "\n"); in lc_show()
184 seq_printf(m, " chain lookup misses: %11llu\n", in lockdep_stats_debug_show()
186 seq_printf(m, " chain lookup hits: %11llu\n", in lockdep_stats_debug_show()
[all …]
/Linux-v5.15/drivers/media/pci/cobalt/
Dcobalt-cpld.c30 cobalt_info("CPLD System control register (read/write)\n"); in cpld_info_ver3()
31 cobalt_info("\t\tSystem control: 0x%04x (0x0f00)\n", in cpld_info_ver3()
33 cobalt_info("CPLD Clock control register (read/write)\n"); in cpld_info_ver3()
34 cobalt_info("\t\tClock control: 0x%04x (0x0000)\n", in cpld_info_ver3()
36 …alt_info("CPLD HSMA Clk Osc register (read/write) - Must set wr trigger to load default values\n"); in cpld_info_ver3()
37 cobalt_info("\t\tRegister #7:\t0x%04x (0x0022)\n", in cpld_info_ver3()
39 cobalt_info("\t\tRegister #8:\t0x%04x (0x0047)\n", in cpld_info_ver3()
41 cobalt_info("\t\tRegister #9:\t0x%04x (0x00fa)\n", in cpld_info_ver3()
43 cobalt_info("\t\tRegister #10:\t0x%04x (0x0061)\n", in cpld_info_ver3()
45 cobalt_info("\t\tRegister #11:\t0x%04x (0x001e)\n", in cpld_info_ver3()
[all …]
/Linux-v5.15/arch/m68k/include/asm/
Ddelay.h26 #define DELAY_ALIGN ".balignw 4, 0x4a8e\n\t"
38 "1: subql #1,%0\n\t" in __delay()
56 __delay(((((u) * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6)
75 #define __const_udelay(n) (__xdelay((n) * 4295)) argument
91 #define udelay(n) (__builtin_constant_p(n) ? \ argument
92 ((n) > 20000 ? __bad_udelay() : __const_udelay(n)) : __udelay(n))
97 * ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6) is the number of loops
100 * 1000 / ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6) is the number of
103 * So n / ( 1000 / ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6) ) would
104 * be the number of loops for n nanoseconds
[all …]
/Linux-v5.15/arch/mips/include/asm/mach-loongson64/
Dloongson_regs.h24 "parse_r __res,%0\n\t" in read_cpucfg()
25 "parse_r reg,%1\n\t" in read_cpucfg()
26 ".insn \n\t" in read_cpucfg()
27 ".word (0xc8080118 | (reg << 21) | (__res << 11))\n\t" in read_cpucfg()
49 #define LOONGSON_CFG1_LASX BIT(11)
82 #define LOONGSON_CFG2_LPMREV GENMASK(11, 9)
105 #define LOONGSON_CFG3_LCAMNUM GENMASK(11, 4)
146 "parse_r __res,%0\n\t" in csr_readl()
147 "parse_r reg,%1\n\t" in csr_readl()
148 ".insn \n\t" in csr_readl()
[all …]
/Linux-v5.15/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
Ddm.c28 0x0F2, /* 11, -6.5dB */
68 0x0F2, /* 11, -6.5dB */
124 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
128 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11};
136 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11};
144 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11};
152 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11};
160 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13},
162 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 13, 13},
163 {0, 1, 1, 2, 3, 3, 4, 4, 5, 6, 6, 7, 8, 9, 10, 11,
[all …]
/Linux-v5.15/tools/testing/selftests/kvm/s390x/
Dsync_regs_test.c34 "0: diag 0,0,0x501\n" in guest_code()
35 " ahi 11,1\n" in guest_code()
36 " j 0b\n" in guest_code()
43 " values did not match: 0x%llx, 0x%llx\n", \
49 " values did not match: 0x%x, 0x%x\n", \
103 "Invalid kvm_valid_regs did not cause expected KVM_RUN error: %d\n", in main()
110 "Invalid kvm_valid_regs did not cause expected KVM_RUN error: %d\n", in main()
118 "Invalid kvm_dirty_regs did not cause expected KVM_RUN error: %d\n", in main()
125 "Invalid kvm_dirty_regs did not cause expected KVM_RUN error: %d\n", in main()
132 TEST_ASSERT(rv == 0, "vcpu_run failed: %d\n", rv); in main()
[all …]
/Linux-v5.15/arch/x86/lib/
Dmemcpy_32.c8 __visible void *memcpy(void *to, const void *from, size_t n) in memcpy() argument
11 return __memcpy3d(to, from, n); in memcpy()
13 return __memcpy(to, from, n); in memcpy()
24 __visible void *memmove(void *dest, const void *src, size_t n) in memmove() argument
31 "cmp $0x10, %0\n\t" in memmove()
32 "jb 1f\n\t" in memmove()
35 "cmp %2, %1\n\t" in memmove()
36 "jb 2f\n\t" in memmove()
42 "cmp $680, %0\n\t" in memmove()
43 "jb 3f\n\t" in memmove()
[all …]
/Linux-v5.15/arch/s390/kernel/
Dfpu.c14 asm(".include \"asm/vx-insn.h\"\n");
42 asm volatile("std 11,%0" : "=Q" (state->fprs[11])); in __kernel_fpu_begin()
57 " la 1,%[vxrs]\n" /* load save area */ in __kernel_fpu_begin()
58 " tmll %[m],30\n" /* KERNEL_VXR */ in __kernel_fpu_begin()
59 " jz 7f\n" /* no work -> done */ in __kernel_fpu_begin()
60 " jo 5f\n" /* -> save V0..V31 */ in __kernel_fpu_begin()
65 " chi %[m],12\n" /* KERNEL_VXR_MID */ in __kernel_fpu_begin()
66 " jne 0f\n" /* -> save V8..V23 */ in __kernel_fpu_begin()
67 " VSTM 8,23,128,1\n" /* vstm %v8,%v23,128(%r1) */ in __kernel_fpu_begin()
68 " j 7f\n" in __kernel_fpu_begin()
[all …]
/Linux-v5.15/drivers/pci/hotplug/
Dcpqphp_sysfs.c34 out += sprintf(buf, "Free resources: memory\n"); in show_ctrl()
35 index = 11; in show_ctrl()
38 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); in show_ctrl()
41 out += sprintf(out, "Free resources: prefetchable memory\n"); in show_ctrl()
42 index = 11; in show_ctrl()
45 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); in show_ctrl()
48 out += sprintf(out, "Free resources: IO\n"); in show_ctrl()
49 index = 11; in show_ctrl()
52 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); in show_ctrl()
55 out += sprintf(out, "Free resources: bus numbers\n"); in show_ctrl()
[all …]
/Linux-v5.15/drivers/net/wireless/ath/wcn36xx/
Dtxrx.c35 /* 11b rates */
41 /* 11b SP (short preamble) */
47 /* 11ag */
55 { 540, 11, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
57 /* 11n */
67 /* 11n SGI */
77 /* 11n GF (greenfield) */
87 /* 11n CB (channel bonding) */
97 /* 11n CB + SGI */
107 /* 11n GF + CB */
[all …]
/Linux-v5.15/drivers/net/wireless/mediatek/mt76/mt7603/
Dregs.h64 #define MT_TXTIME_THRESH(n) (MT_TXTIME_THRESH_BASE + ((n) * 4)) argument
67 #define MT_PAGE_COUNT(n) (MT_PAGE_COUNT_BASE + ((n) * 4)) argument
79 #define MT_GROUP_THRESH(n) (MT_GROUP_THRESH_BASE + ((n) * 4)) argument
104 #define MT_PSE_FC_P0_MIN_RESERVE GENMASK(11, 0)
111 #define MT_PSE_FRP_P2_RQ1 GENMASK(11, 9)
115 #define MT_FC_RSV_COUNT_0_P0 GENMASK(11, 0)
119 #define MT_FC_SP2_Q0Q1_SRC_COUNT_Q0 GENMASK(11, 0)
137 #define MT_AGC(n) (MT_AGC_BASE + ((n) * 4)) argument
140 #define MT_AGC1(n) (MT_AGC1_BASE + ((n) * 4)) argument
146 #define MT_RXTD(n) (MT_RXTD_BASE + ((n) * 4)) argument
[all …]
/Linux-v5.15/arch/csky/lib/
Dusercopy.c8 unsigned long n) in raw_copy_from_user() argument
13 "0: cmpnei %1, 0 \n" in raw_copy_from_user()
14 " bf 7f \n" in raw_copy_from_user()
15 " mov %3, %1 \n" in raw_copy_from_user()
16 " or %3, %2 \n" in raw_copy_from_user()
17 " andi %3, 3 \n" in raw_copy_from_user()
18 " cmpnei %3, 0 \n" in raw_copy_from_user()
19 " bf 1f \n" in raw_copy_from_user()
20 " br 5f \n" in raw_copy_from_user()
21 "1: cmplti %0, 16 \n" in raw_copy_from_user()
[all …]
/Linux-v5.15/drivers/hwmon/
Dpc87360.c16 * PC87365 11 3 3 2 0xE5
17 * PC87366 11 3 3 3-4 0xE9
46 "Chip initialization level:\n"
47 " 0: None\n"
48 "*1: Forcibly enable internal voltage and temperature channels, except in9\n"
49 " 2: Forcibly enable all voltage and temperature channels, except in9\n"
249 return sprintf(buf, "%u\n", FAN_FROM_REG(data->fan[attr->index], in fan_input_show()
257 return sprintf(buf, "%u\n", FAN_FROM_REG(data->fan_min[attr->index], in fan_min_show()
265 return sprintf(buf, "%u\n", in fan_div_show()
273 return sprintf(buf, "%u\n", in fan_status_show()
[all …]
/Linux-v5.15/arch/arm64/include/asm/
Dsysreg.h23 * [11-8] : CRm
57 #define __emit_inst(x) ".inst " __stringify((x)) "\n\t"
74 #define __emit_inst(x) ".long " __stringify(__INSTR_BSWAP(x)) "\n\t"
117 * where the architected name contains an index. e.g. ID_MMFR<n>_EL1.
124 #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4) argument
125 #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5) argument
126 #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6) argument
127 #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7) argument
299 (GENMASK_ULL(47, 32) | GENMASK_ULL(23, 16) | GENMASK_ULL(11, 8) |\
302 (SYS_PMSEVFR_EL1_RES0_8_2 & ~(BIT_ULL(18) | BIT_ULL(17) | BIT_ULL(11)))
[all …]
/Linux-v5.15/drivers/net/ethernet/neterion/vxge/
Dvxge-reg.h29 * vxge_bVALn(bits, loc, n) - Get the value of n bits at location
31 #define vxge_bVALn(bits, loc, n) \ argument
32 ((((u64)bits) >> (64-(loc+n))) & ((0x1ULL << n) - 1))
159 #define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_DS 11
200 #define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DS 11
211 #define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_ETYPE(bits) vxge_bVALn(bits, 0, 11)
662 #define VXGE_HW_PRC_STATUS1_PRC_VP_QUIESCENT(n) vxge_mBIT(n) argument
664 #define VXGE_HW_RXDCM_RESET_IN_PROGRESS_PRC_VP(n) vxge_mBIT(n) argument
666 #define VXGE_HW_REPLICQ_FLUSH_IN_PROGRESS_NOA_VP(n) vxge_mBIT(n) argument
668 #define VXGE_HW_RXPE_CMDS_RESET_IN_PROGRESS_NOA_VP(n) vxge_mBIT(n) argument
[all …]
/Linux-v5.15/drivers/net/ethernet/3com/
D3c589_cs.c70 * 11 bits are the parameter, if applicable.
74 TotalReset = 0<<11,
75 SelectWindow = 1<<11,
76 StartCoax = 2<<11,
77 RxDisable = 3<<11,
78 RxEnable = 4<<11,
79 RxReset = 5<<11,
80 RxDiscard = 8<<11,
81 TxEnable = 9<<11,
82 TxDisable = 10<<11,
[all …]
D3c574_cs.c39 RunnerWrCtrl. These are 11 bit down-counters that are preloaded with the
106 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) argument
134 11 bits are the parameter, if applicable. */
136 TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,
137 RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11, RxDiscard = 8<<11,
138 TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,
139 FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,
140 SetStatusEnb = 15<<11, SetRxFilter = 16<<11, SetRxThreshold = 17<<11,
141 SetTxThreshold = 18<<11, SetTxStart = 19<<11, StatsEnable = 21<<11,
142 StatsDisable = 22<<11, StopCoax = 23<<11,
[all …]
/Linux-v5.15/drivers/usb/dwc2/
Ddebugfs.c45 else if (!strncmp(buf, "test_packet", 11)) in testmode_write()
79 seq_puts(s, "no test\n"); in testmode_show()
82 seq_puts(s, "test_j\n"); in testmode_show()
85 seq_puts(s, "test_k\n"); in testmode_show()
88 seq_puts(s, "test_se0_nak\n"); in testmode_show()
91 seq_puts(s, "test_packet\n"); in testmode_show()
94 seq_puts(s, "test_force_enable\n"); in testmode_show()
97 seq_printf(s, "UNKNOWN %d\n", dctl); in testmode_show()
131 seq_printf(seq, "DCFG=0x%08x, DCTL=0x%08x, DSTS=0x%08x\n", in state_show()
136 seq_printf(seq, "DIEPMSK=0x%08x, DOEPMASK=0x%08x\n", in state_show()
[all …]
/Linux-v5.15/arch/arm/probes/kprobes/
Dtest-thumb.c32 "50: nop \n\t" \
33 "1: "code" \n\t" \
34 " mov r1, #0x11 \n\t" \
35 " mov r2, #0x22 \n\t" \
36 " mov r3, #0x33 \n\t" \
37 "2: nop \n\t" \
47 " nop \n\t" /* To align 1f */ \
48 "50: nop \n\t" \
49 "1: "code1 #reg code2" \n\t" \
50 " bx lr \n\t" \
[all …]
/Linux-v5.15/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_1.0/
Dia_css_ynr.host.c83 uDIGIT_FITTING(from->ee.detail_gain, 11, in ia_css_yee_encode()
93 (asiWk1 + asiWk2) >> (11 - SH_CSS_YEE_SCALE_SHIFT); in ia_css_yee_encode()
96 (0 - asiWk3) >> (11 - SH_CSS_YEE_SCALE_SHIFT); in ia_css_yee_encode()
99 (asiWk1 - asiWk2) >> (11 - SH_CSS_YEE_SCALE_SHIFT); in ia_css_yee_encode()
102 (asiWk3) >> (11 - SH_CSS_YEE_SCALE_SHIFT); in ia_css_yee_encode()
120 "Y Noise Reduction:\n"); in ia_css_nr_dump()
121 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_nr_dump()
123 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_nr_dump()
125 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_nr_dump()
127 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_nr_dump()
[all …]
/Linux-v5.15/arch/arm/mm/
Dalignment.c114 pr_warn("alignment: ignoring faults is unsafe on this CPU. Defaulting to fixup mode.\n"); in safe_usermode()
132 seq_printf(m, "User:\t\t%lu\n", ai_user); in alignment_proc_show()
133 seq_printf(m, "System:\t\t%lu (%pS)\n", ai_sys, ai_sys_last_pc); in alignment_proc_show()
134 seq_printf(m, "Skipped:\t%lu\n", ai_skipped); in alignment_proc_show()
135 seq_printf(m, "Half:\t\t%lu\n", ai_half); in alignment_proc_show()
136 seq_printf(m, "Word:\t\t%lu\n", ai_word); in alignment_proc_show()
138 seq_printf(m, "DWord:\t\t%lu\n", ai_dword); in alignment_proc_show()
139 seq_printf(m, "Multi:\t\t%lu\n", ai_multi); in alignment_proc_show()
140 seq_printf(m, "User faults:\t%i (%s)\n", ai_usermode, in alignment_proc_show()
186 #define FIRST_BYTE_16 "mov %1, %1, ror #8\n"
[all …]
/Linux-v5.15/drivers/staging/wlan-ng/
Dprism2usb.c14 PRISM_DEV(0x07aa, 0x0012, "Corega Wireless LAN USB Stick-11"),
15 PRISM_DEV(0x09aa, 0x3642, "Prism2.x 11Mbps WLAN USB Adapter"),
16 PRISM_DEV(0x1668, 0x0408, "Actiontec Prism2.5 11Mbps WLAN USB Adapter"),
17 PRISM_DEV(0x1668, 0x0421, "Actiontec Prism2.5 11Mbps WLAN USB Adapter"),
18 PRISM_DEV(0x1915, 0x2236, "Linksys WUSB11v3.0 11Mbps WLAN USB Adapter"),
19 PRISM_DEV(0x066b, 0x2212, "Linksys WUSB11v2.5 11Mbps WLAN USB Adapter"),
20 PRISM_DEV(0x066b, 0x2213, "Linksys WUSB12v1.1 11Mbps WLAN USB Adapter"),
21 PRISM_DEV(0x0411, 0x0016, "Melco WLI-USB-S11 11Mbps WLAN Adapter"),
30 PRISM_DEV(0x0b3b, 0x1601, "ALLNET 0193 11Mbps WLAN USB Adapter"),
33 PRISM_DEV(0x0411, 0x0027, "Melco WLI-USB-KS11G 11Mbps WLAN Adapter"),
[all …]
/Linux-v5.15/drivers/gpu/drm/v3d/
Dv3d_regs.h36 # define V3D_HUB_IDENT1_NCORES_MASK V3D_MASK(11, 8)
157 # define V3D_MMU_CTL_WRITE_VIOLATION_ABORT BIT(11)
173 # define V3D_MMU_ADDR_CAP_MPAGE_MASK V3D_MASK(11, 0)
196 # define V3D_MMU_PA_WIDTH_MASK V3D_MASK(11, 8)
217 # define V3D_IDENT1_QUPS_MASK V3D_MASK(11, 8)
242 # define V3D_SLCACTL_UCC_MASK V3D_MASK(11, 8)
281 #define V3D_CLE_CTNCS(n) (V3D_CLE_CT0CS + 4 * n) argument
284 #define V3D_CLE_CTNEA(n) (V3D_CLE_CT0EA + 4 * n) argument
287 #define V3D_CLE_CTNCA(n) (V3D_CLE_CT0CA + 4 * n) argument
290 #define V3D_CLE_CTNRA(n) (V3D_CLE_CT0RA + 4 * n) argument
[all …]

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