Searched +full:0 +full:xfeb00000 (Results 1 – 25 of 28) sorted by relevance
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15 #define SP5100_WDT_MEM_MAP_SIZE 0x0816 #define SP5100_WDT_CONTROL(base) ((base) + 0x00) /* Watchdog Control */17 #define SP5100_WDT_COUNT(base) ((base) + 0x04) /* Watchdog Count */19 #define SP5100_WDT_START_STOP_BIT BIT(0)25 #define SP5100_PM_IOPORTS_SIZE 0x0233 #define SP5100_IO_PM_INDEX_REG 0xCD634 #define SP5100_IO_PM_DATA_REG 0xCD737 #define SP5100_SB_RESOURCE_MMIO_BASE 0x9C39 #define SP5100_PM_WATCHDOG_CONTROL 0x6940 #define SP5100_PM_WATCHDOG_BASE 0x6C[all …]
68 "^port@[0-3]$":73 - port@0121 - const: du.0133 port@0:134 description: DPAD 0142 - port@0170 - const: du.0183 - const: du.0187 port@0:188 description: DPAD 0[all …]
40 #clock-cells = <0>;42 clock-frequency = <0>;47 #size-cells = <0>;49 cpu0: cpu@0 {52 reg = <0>;71 L2_CA15: cache-controller-0 {82 #clock-cells = <0>;84 clock-frequency = <0>;97 #clock-cells = <0>;99 clock-frequency = <0>;[all …]
27 #size-cells = <0>;29 cpu0: cpu@0 {32 reg = <0>;51 L2_CA7: cache-controller-0 {62 #clock-cells = <0>;64 clock-frequency = <0>;77 #clock-cells = <0>;79 clock-frequency = <0>;93 reg = <0 0xe6020000 0 0x0c>;104 reg = <0 0xe6050000 0 0x50>;[all …]
34 * The external audio clocks are configured as 0 Hz fixed frequency40 #clock-cells = <0>;41 clock-frequency = <0>;45 #clock-cells = <0>;46 clock-frequency = <0>;50 #clock-cells = <0>;51 clock-frequency = <0>;57 #clock-cells = <0>;59 clock-frequency = <0>;64 #size-cells = <0>;[all …]
32 * The external audio clocks are configured as 0 Hz fixed frequency38 #clock-cells = <0>;39 clock-frequency = <0>;43 #clock-cells = <0>;44 clock-frequency = <0>;48 #clock-cells = <0>;49 clock-frequency = <0>;55 #clock-cells = <0>;57 clock-frequency = <0>;62 #size-cells = <0>;[all …]
36 * The external audio clocks are configured as 0 Hz fixed42 #clock-cells = <0>;43 clock-frequency = <0>;47 #clock-cells = <0>;48 clock-frequency = <0>;52 #clock-cells = <0>;53 clock-frequency = <0>;59 #clock-cells = <0>;61 clock-frequency = <0>;66 #size-cells = <0>;[all …]
19 * The external audio clocks are configured as 0 Hz fixed frequency25 #clock-cells = <0>;26 clock-frequency = <0>;30 #clock-cells = <0>;31 clock-frequency = <0>;35 #clock-cells = <0>;36 clock-frequency = <0>;42 #clock-cells = <0>;44 clock-frequency = <0>;49 #size-cells = <0>;[all …]
40 * The external audio clocks are configured as 0 Hz fixed frequency46 #clock-cells = <0>;47 clock-frequency = <0>;51 #clock-cells = <0>;52 clock-frequency = <0>;56 #clock-cells = <0>;57 clock-frequency = <0>;63 #clock-cells = <0>;65 clock-frequency = <0>;70 #size-cells = <0>;[all …]
19 * The external audio clocks are configured as 0 Hz fixed frequency25 #clock-cells = <0>;26 clock-frequency = <0>;31 #clock-cells = <0>;32 clock-frequency = <0>;37 #clock-cells = <0>;38 clock-frequency = <0>;44 #clock-cells = <0>;46 clock-frequency = <0>;51 #size-cells = <0>;[all …]
41 * The external audio clocks are configured as 0 Hz fixed frequency47 #clock-cells = <0>;48 clock-frequency = <0>;52 #clock-cells = <0>;53 clock-frequency = <0>;57 #clock-cells = <0>;58 clock-frequency = <0>;64 #clock-cells = <0>;66 clock-frequency = <0>;71 #size-cells = <0>;[all …]
22 #clock-cells = <0>;23 clock-frequency = <0>;28 #size-cells = <0>;30 a53_0: cpu@0 {33 reg = <0>;60 #clock-cells = <0>;62 clock-frequency = <0>;67 #clock-cells = <0>;69 clock-frequency = <0>;87 #clock-cells = <0>;[all …]
22 #clock-cells = <0>;23 clock-frequency = <0>;28 #size-cells = <0>;30 a53_0: cpu@0 {33 reg = <0>;80 #clock-cells = <0>;82 clock-frequency = <0>;87 #clock-cells = <0>;89 clock-frequency = <0>;95 #clock-cells = <0>;[all …]
19 * The external audio clocks are configured as 0 Hz fixed frequency25 #clock-cells = <0>;26 clock-frequency = <0>;31 #clock-cells = <0>;32 clock-frequency = <0>;38 #clock-cells = <0>;39 clock-frequency = <0>;44 #size-cells = <0>;46 a53_0: cpu@0 {48 reg = <0x0>;[all …]
20 #clock-cells = <0>;21 clock-frequency = <0>;27 #clock-cells = <0>;28 clock-frequency = <0>;31 cluster0_opp: opp-table-0 {66 #size-cells = <0>;88 a76_0: cpu@0 {90 reg = <0>;102 reg = <0x100>;114 reg = <0x10000>;[all …]
18 * The external audio clocks are configured as 0 Hz fixed frequency24 #clock-cells = <0>;25 clock-frequency = <0>;30 #clock-cells = <0>;31 clock-frequency = <0>;36 #clock-cells = <0>;37 clock-frequency = <0>;43 #clock-cells = <0>;44 clock-frequency = <0>;67 #size-cells = <0>;[all …]
20 #clock-cells = <0>;21 clock-frequency = <0>;26 #size-cells = <0>;28 a76_0: cpu@0 {30 reg = <0>;37 L3_CA76_0: cache-controller-0 {47 #clock-cells = <0>;49 clock-frequency = <0>;54 #clock-cells = <0>;56 clock-frequency = <0>;[all …]
25 * The external audio clocks are configured as 0 Hz fixed frequency31 #clock-cells = <0>;32 clock-frequency = <0>;37 #clock-cells = <0>;38 clock-frequency = <0>;43 #clock-cells = <0>;44 clock-frequency = <0>;50 #clock-cells = <0>;51 clock-frequency = <0>;54 cluster0_opp: opp-table-0 {[all …]
21 * The external audio clocks are configured as 0 Hz fixed frequency27 #clock-cells = <0>;28 clock-frequency = <0>;33 #clock-cells = <0>;34 clock-frequency = <0>;39 #clock-cells = <0>;40 clock-frequency = <0>;46 #clock-cells = <0>;47 clock-frequency = <0>;50 cluster0_opp: opp-table-0 {[all …]
20 * The external audio clocks are configured as 0 Hz fixed frequency26 #clock-cells = <0>;27 clock-frequency = <0>;32 #clock-cells = <0>;33 clock-frequency = <0>;38 #clock-cells = <0>;39 clock-frequency = <0>;45 #clock-cells = <0>;46 clock-frequency = <0>;49 cluster0_opp: opp-table-0 {[all …]
149 0x80000000 | 0xf0000000 | UART0150 0x80004000 | 0xf0004000 | UART1151 0x80008000 | 0xf0008000 | UART2152 0x8000c000 | 0xf000c000 | UART3153 0x80010000 | 0xf0010000 | UART4154 0x80014000 | 0xf0014000 | UART5155 0x80018000 | 0xf0018000 | UART6156 0x8001c000 | 0xf001c000 | UART7157 0x80020000 | 0xf0020000 | UART8158 0x80024000 | 0xf0024000 | UART9[all …]
23 #size-cells = <0>;58 cpu_l0: cpu@0 {61 reg = <0x0>;82 reg = <0x100>;101 reg = <0x200>;120 reg = <0x300>;139 reg = <0x400>;160 reg = <0x500>;179 reg = <0x600>;200 reg = <0x700>;[all …]
