Searched +full:0 +full:xfd400000 (Results 1 – 5 of 5) sorted by relevance
24 minimum: 034 minimum: 038 minimum: 050 Clock for each PS_MGTREFCLK[0-3] reference clock input. Unconnected57 pattern: "^ref[0-3]$"97 reg = <0xfd400000 0x40000>,98 <0xfd3d0000 0x1000>;100 clocks = <&refclks 3>, <&refclks 2>, <&refclks 0>;
20 #size-cells = <0>;22 cpu0: cpu@0 {25 reg = <0x0 0x0>;31 reg = <0x0 0x1>;38 reg = <0x0 0x2>;45 reg = <0x0 0x3>;57 cpu_suspend = <0x84000001>;58 cpu_off = <0x84000002>;59 cpu_on = <0x84000003>;66 reg = <0x0 0xc0001000 0x1000>,[all …]
26 #size-cells = <0>;28 cpu0: cpu@0 {33 reg = <0x0>;41 reg = <0x1>;50 reg = <0x2>;59 reg = <0x3>;67 CPU_SLEEP_0: cpu-sleep-0 {69 arm,psci-suspend-param = <0x40000000>;106 interrupts = <0 35 4>;107 xlnx,ipi-id = <0>;[all …]
50 #size-cells = <0>;52 cpu0: cpu@0 {55 reg = <0x0 0x0>;56 clocks = <&scmi_clk 0>;65 reg = <0x0 0x100>;74 reg = <0x0 0x200>;83 reg = <0x0 0x300>;90 cpu0_opp_table: opp-table-0 {140 arm,smc-id = <0x82000010>;143 #size-cells = <0>;[all …]